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    • 23. 发明授权
    • Plasma treating method and apparatus therefor
    • 等离子体处理方法及其设备
    • US4943361A
    • 1990-07-24
    • US289512
    • 1988-12-27
    • Yutaka KakehiYutaka OmotoTakeshi Harada
    • Yutaka KakehiYutaka OmotoTakeshi Harada
    • H01L21/302H01J37/32H01L21/3065
    • H01J37/32082H01J37/32623H01J37/3266
    • The present invention relates to a plasma treating method and apparatus therefor, wherein a plasma treating method is carried out in which an electric field is generated between the electrodes of parallel plate electrodes (anode and cathode), and a magnetic field starting from the anode side, toward the cathode side, the other of said parallel plate electrodes, and back to the anode side, is used. The magnetic field has relatively short lines of magnetic force where it orthogonally intersects the electric field, near the cathode, as compared to that of lines of magnetic force parallel to the electric field, so as to make a cycloidal motion of electrons restricted and to cause mainly a cyclotronic motion of electrons to occur in large quantities. A power supply is connected to the cathode, one of said parallel plate electrodes, and a magnetic field generating means is provided on the anode side, the other of said parallel plate electrodes, at the counter-cathode side thereof, the said magnetic field generating means having NS poles in proximity to each other to provide the previously discussed magnetic lines of force, so as to make the cycloidal motion of electrons restricted and to cause the cyclotronic motion of electrons to occur in large quantities. By use of such method and apparatus, it is made possible to facilitate a treatment of a specimen at a high rate and uniformly without damaging the specimen.
    • 等离子体处理方法及其设备技术领域本发明涉及一种等离子体处理方法及其设备,其中进行在平行板电极(阳极和阴极)的电极之间产生电场的等离子体处理方法和从阳极侧开始的磁场 ,朝向阴极侧,使用另一个所述平行板电极,并且返回到阳极侧。 与平行于电场的磁力线相比,磁场具有相对短的磁力线,其与阴极附近的电场正交相交,从而使电子的摆线运动受到限制,并导致 主要是电子发生大量的自旋运动。 电源连接到阴极,所述平行板电极之一和磁场产生装置设置在阳极侧,另一个平行板电极在其反向阴极侧产生所述磁场产生 意味着具有彼此接近的NS极以提供先前讨论的磁力线,以便使电子的摆线运动受到限制并且引起电子的大量循环运动。 通过使用这种方法和装置,能够以高速率和均匀的方式促进样品的处理,而不会损害试样。
    • 27. 发明申请
    • Front Release Buckle
    • 前扣带
    • US20130091671A1
    • 2013-04-18
    • US13806155
    • 2010-06-24
    • Yasutaka NishidaTakeshi Harada
    • Yasutaka NishidaTakeshi Harada
    • A44B11/26
    • A44B11/263Y10T24/45545
    • A front release buckle of the invention includes a plug and a socket. The plug includes: a base; a leg that projects from the base; and an engaging portion formed to the leg. The socket includes: a body having an insertion opening; a housing space that is defined inside the body and capable of housing the leg inserted through the insertion opening; an engaged portion that is formed on the body and engageable with the engaging portion; and a manipulation portion that disengages an engagement between the engaging portion and the engaged portion. The plug and the socket are formed to be flat. The leg is flat and flexible in a thickness direction. The engaging portion and the engaged portion are engaged with each other in the thickness direction. The engaging portion projects in a width direction of the leg and is formed within the thickness of the leg.
    • 本发明的前释放带扣包括插头和插座。 插头包括:底座; 从基地开始的一条腿; 以及形成在腿部的接合部。 插座包括:具有插入开口的主体; 容纳空间,其限定在所述主体内部并且能够容纳插入穿过所述插入开口的所述腿部; 接合部,其形成在所述主体上并与所述接合部接合; 以及解除接合部和被接合部之间的接合的操作部。 插头和插座形成为平坦的。 该腿在厚度方向上是扁平的和柔性的。 接合部和被接合部在厚度方向上彼此接合。 接合部在腿的宽度方向上突出并形成在腿的厚度内。
    • 28. 发明授权
    • Method for fabricating semiconductor device
    • 制造半导体器件的方法
    • US08034693B2
    • 2011-10-11
    • US12493673
    • 2009-06-29
    • Junichi ShibataTakeshi HaradaAkira Ueki
    • Junichi ShibataTakeshi HaradaAkira Ueki
    • H01L21/678
    • H01L21/76816H01L21/7682H01L23/5222H01L2924/0002H01L2924/00
    • A method for fabricating a semiconductor device includes the steps of forming an insulating film on a semiconductor substrate, forming a plurality of wiring trenches in the insulating film, forming a plurality of wirings in the plurality of wiring trenches, forming a resist mask having an opening for selectively exposing one of regions between the plurality of wirings, on the insulating film and the plurality of wirings, forming an air gap trench by removing the insulating film from the selectively exposed one of the regions between the plurality of wirings by etching using the resist mask, and forming an air gap in the air gap trench by depositing an inter-layer insulating film over the plurality of wirings after removal of the resist mask.
    • 一种制造半导体器件的方法包括以下步骤:在半导体衬底上形成绝缘膜,在绝缘膜中形成多个布线沟槽,在多个布线沟槽中形成多个布线,形成具有开口的抗蚀剂掩模 用于选择性地暴露多个布线中的一个区域,在绝缘膜和多个布线之间,通过使用抗蚀剂通过蚀刻从多个布线中的选择性暴露的一个区域中去除绝缘膜而形成气隙沟槽 掩模,并且在除去抗蚀剂掩模之后,在多个布线之间沉积层间绝缘膜,在气隙沟槽中形成气隙。
    • 29. 发明申请
    • METHOD FOR MANUFACTURING GROUP III NITRIDE SEMICONDUCTOR LIGHT EMITTING ELEMENT, GROUP III NITRIDE SEMICONDUCTOR LIGHT EMITTING ELEMENT AND LAMP
    • 制备III类氮化物半导体发光元件的方法,III类氮化物半导体发光元件和灯
    • US20110163349A1
    • 2011-07-07
    • US13119127
    • 2009-09-14
    • Hiromitsu SakaiTakeshi Harada
    • Hiromitsu SakaiTakeshi Harada
    • H01L33/30H01L33/36
    • H01L21/0254H01L21/0237H01L21/0242H01L21/02458H01L21/02573H01L21/02609H01L21/0262H01L21/02631H01L33/007H01L2224/32245H01L2224/32257H01L2224/45144H01L2224/48091H01L2224/48247H01L2224/48257H01L2224/49107H01L2224/73265H01L2924/181H01L2924/00014H01L2924/00H01L2924/00012
    • The present invention provides a method for manufacturing a group III nitride semiconductor light emitting element, with which warping can be suppressed upon the formation of respective layers on the substrate, a semiconductor layer including a light emitting layer of excellent crystallinity can be formed, and excellent light emission characteristics can be obtained; such a group III nitride semiconductor light emitting element; and a lamp. Specifically disclosed is a method for manufacturing a group III nitride semiconductor light emitting element, in which an intermediate layer, an underlayer, an n-type contact layer, an n-type cladding layer, a light emitting layer, a p-type cladding layer, and a p-type contact layer are laminated in sequence on a principal plane of a substrate, wherein a substrate having a diameter of 4 inches (100 mm) or larger, with having an amount of warping H within a range from 0.1 to 30 μm and at least a part of the edge of the substrate warping toward the principal plane at room temperature, is prepared as the substrate; the X-ray rocking curve full width at half maximum (FWHM) of the (0002) plane is 100 arcsec or less and the X-ray rocking curve FWHM of the (10-10) plane is 300 arcsec or less, in a state where the intermediate layer has been formed on the substrate and where thereafter the underlayer and the n-type contact layer are formed on the intermediate layer; and furthermore the n-type cladding layer, the light emitting layer, the p-type cladding layer, and the p-type contact layer are formed on the n-type contact layer.
    • 本发明提供一种制造III族氮化物半导体发光元件的方法,可以在基板上形成各层的同时抑制翘曲,可以形成包括具有优异结晶性的发光层的半导体层,并且优异 可获得发光特性; 这样的III族氮化物半导体发光元件; 和一盏灯。 具体公开了一种III族氮化物半导体发光元件的制造方法,其中中间层,下层,n型接触层,n型包覆层,发光层,p型包覆层 和p型接触层依次层叠在基板的主平面上,其中直径为4英寸(100mm)以上的基板,其翘曲度H在0.1〜30的范围内 并且准备在室温下朝向主平面翘曲的基板的边缘的至少一部分作为基板; (0002)面的X射线摇摆曲线半峰全宽(FWHM)为100弧秒以下,(10-10)面的X射线摇摆曲线FWHM为300arcsec以下,处于 其中中间层已经形成在衬底上,然后在中间层上形成底层和n型接触层; 此外,在n型接触层上形成n型包覆层,发光层,p型覆层和p型接触层。