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21. 发明授权

US07585331B2 Long-term antibiotic and deodorant textile with mesoporous structure and processing method thereof 有权
标题翻译：长效抗生素和除臭纺织品，具有介孔结构及其加工方法
公开(公告)号：US07585331B2
公开(公告)日：2009-09-08
申请号：US11419106
申请日：2006-05-18
申请人： Pui-Leng Lai , Cheng-Chieh Chen , Chun-Hung Lin , Jia-Peng Lin , Nai-Yun Liang
发明人： Pui-Leng Lai , Cheng-Chieh Chen , Chun-Hung Lin , Jia-Peng Lin , Nai-Yun Liang
IPC分类号： D06M13/50 , D06M11/79
CPC分类号： D06M11/44 , D06M11/46 , D06M11/79 , D06M11/83 , D06M23/08
摘要： A long-term antibiotic and deodorant textile with mesoporous structure and processing method thereof are provided. At first, a textile is dipped into an aqueous solution of a surfactant containing nanoparticles. An aqueous solution of a silicon source is prepared and its pH value is adjusted to about 5˜9. Then, the aqueous solution of the surfactant and the aqueous solution of the silicon source are mixed to form a mixture solution. The mixture solution is stirred until silica powder form therein. The textile is taken out and dipped into water and organic solvent separately several times. Finally, the textile is dried to obtain the long-term antibiotic and deodorant textile with mesoporous structure.
摘要翻译：提供了具有介孔结构及其加工方法的长期抗生素和除臭织物。首先，将织物浸入含有纳米颗粒的表面活性剂的水溶液中。制备硅源的水溶液，将其pH值调节至约5〜9。然后，将表面活性剂的水溶液和硅源的水溶液混合，形成混合溶液。将混合溶液搅拌直至形成二氧化硅粉末。将纺织品取出并分别浸入水和有机溶剂中几次。最后，将纺织品干燥，得到具有中孔结构的长期抗生素和除臭纺织品。

22. 发明授权

US07571021B2 Method and system for improving critical dimension uniformity 有权
标题翻译：改善临界尺寸均匀性的方法和系统
公开(公告)号：US07571021B2
公开(公告)日：2009-08-04
申请号：US11674497
申请日：2007-02-13
申请人： Chun-Hung Lin , Shy-Jay Lin , Heng-Hsin Liu , Chien-Hsun Lin , Jui-Chung Peng , Yao-Wen Guo
发明人： Chun-Hung Lin , Shy-Jay Lin , Heng-Hsin Liu , Chien-Hsun Lin , Jui-Chung Peng , Yao-Wen Guo
IPC分类号： G06F19/00 , G05B13/02
CPC分类号： H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： A method for improving critical dimension of a substrate is provided. Manufacturing data of a plurality of critical dimension deviations corresponding to a plurality of areas on the substrate is collected. A plurality of sensitivity data corresponding to the plurality of areas is also collected. A plurality of exposure dosage offsets corresponding to the plurality of areas are calculated based on the plurality of critical dimension deviations and the plurality of sensitivity data.
摘要翻译：提供了一种改善基板临界尺寸的方法。收集对应于基板上的多个区域的多个临界尺寸偏差的制造数据。还收集对应于多个区域的多个灵敏度数据。基于多个临界尺寸偏差和多个灵敏度数据来计算对应于多个区域的多个曝光剂量偏移量。

23. 发明授权

US07554197B2 High frequency IC package and method for fabricating the same 有权
标题翻译：高频IC封装及其制造方法
公开(公告)号：US07554197B2
公开(公告)日：2009-06-30
申请号：US11400182
申请日：2006-04-10
申请人： Hsiang-Ming Huang , An-Hong Liu , Yeong-Jyh Lin , Yi-Chang Lee , Wu-Chang Tu , Chun-Hung Lin , Shih Feng Chiu
发明人： Hsiang-Ming Huang , An-Hong Liu , Yeong-Jyh Lin , Yi-Chang Lee , Wu-Chang Tu , Chun-Hung Lin , Shih Feng Chiu
IPC分类号： H01L23/48 , H01L23/28 , H01L23/29
CPC分类号： H01L24/10 , H01L23/13 , H01L23/3114 , H01L23/49816 , H01L24/06 , H01L24/13 , H01L24/48 , H01L24/81 , H01L24/83 , H01L24/90 , H01L2224/0401 , H01L2224/04042 , H01L2224/06136 , H01L2224/13 , H01L2224/13099 , H01L2224/13144 , H01L2224/16225 , H01L2224/16235 , H01L2224/32225 , H01L2224/48091 , H01L2224/4824 , H01L2224/73204 , H01L2224/73215 , H01L2224/8121 , H01L2224/81815 , H01L2224/83194 , H01L2224/838 , H01L2224/9202 , H01L2924/00014 , H01L2924/01005 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A high frequency IC package mainly includes a substrate, a bumped chip, and a plurality of conductive fillers where the substrate has a plurality of bump holes penetrating from the top surface to the bottom surface. The active surface of the chip is attached to the top surface of the substrate in a manner that the bumps are inserted into the bump holes respectively. The conductive fillers are formed in the bump holes to electrically connect the bumps to the circuit layer of the substrate. The high frequency IC package has a shorter electrical path and a thinner package thickness.
摘要翻译：高频IC封装主要包括衬底，凸起芯片和多个导电填料，其中衬底具有从顶表面到底表面穿透的多个凸起孔。芯片的有源表面以分别插入到凸块孔中的方式附接到基板的顶表面。导电填料形成在凸起孔中，以将凸块电连接到基板的电路层。高频IC封装具有更短的电路径和更薄的封装厚度。

24. 发明申请

US20090075397A1 Method for characterizing sugar-binding interactions of biomolecules 审中-公开
标题翻译：表征生物分子糖结合相互作用的方法
公开(公告)号：US20090075397A1
公开(公告)日：2009-03-19
申请号：US12283469
申请日：2008-09-12
申请人： Chun-Hung Lin , Chuan-Fa Chang
发明人： Chun-Hung Lin , Chuan-Fa Chang
IPC分类号： G01N33/543
CPC分类号： G01N33/54353
摘要： This invention provides a donor bead for use in an assay, wherein the bead (a) is coated with a layer of hydrogel having directly or indirectly bound thereto a polyacrylamide-supported sugar or a polyacrylamide-supported glycan, and (b) comprises a photosensitizer which, upon excitation by laser light of a suitable wavelength, converts ambient oxygen to singlet state oxygen. This invention also provides an acceptor bead for use in an assay, wherein the bead (a) is coated with a layer of hydrogel having directly or indirectly bound thereto a polyacrylamide-supported sugar or a polyacrylamide-supported glycan, and (b) comprises a chemiluminescer and a fluorophore, whereby when the bead is contacted with singlet state oxygen, the singlet state oxygen reacts with the chemiluminescer which in turn activates the fluorophore so as to cause the emission of light of a predetermined wavelength. This invention further provides related kits, detection methods and characterization methods.
摘要翻译：本发明提供用于测定中的供体珠粒，其中珠粒（a）涂覆有直接或间接结合聚丙烯酰胺负载的糖或聚丙烯酰胺负载的聚糖的水凝胶层，（b）包含光敏剂其在经适当波长的激光激发后将环境氧转化为单态态氧。本发明还提供用于测定中的受体珠粒，其中珠粒（a）涂覆有直接或间接结合有聚丙烯酰胺负载的糖或聚丙烯酰胺负载的聚糖的水凝胶层，（b）包含化学发光体和荧光团，由此当珠粒与单态态氧接触时，单线态氧与化学发光体反应，其又激活荧光团，从而引起预定波长的光的发射。本发明还提供了相关试剂盒，检测方法和表征方法。

25. 发明申请

US20090026632A1 CHIP-TO-CHIP PACKAGE AND PROCESS THEREOF 审中-公开
标题翻译：芯片到芯片包装及其处理
公开(公告)号：US20090026632A1
公开(公告)日：2009-01-29
申请号：US12244553
申请日：2008-10-02
申请人： Geng-Shin Shen , Chun-Hung Lin
发明人： Geng-Shin Shen , Chun-Hung Lin
IPC分类号： H01L23/52 , H01L21/00
CPC分类号： H01L23/49575 , H01L21/563 , H01L21/6836 , H01L23/3107 , H01L23/4951 , H01L23/49513 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/85 , H01L25/0657 , H01L25/50 , H01L2221/68327 , H01L2224/0401 , H01L2224/06135 , H01L2224/06136 , H01L2224/16145 , H01L2224/16225 , H01L2224/274 , H01L2224/29007 , H01L2224/29101 , H01L2224/32014 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/4824 , H01L2224/48247 , H01L2224/4826 , H01L2224/73204 , H01L2224/73207 , H01L2224/73215 , H01L2224/73265 , H01L2224/81192 , H01L2224/81801 , H01L2224/83191 , H01L2224/83194 , H01L2224/83855 , H01L2224/83856 , H01L2224/85 , H01L2224/92147 , H01L2224/92247 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06575 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01047 , H01L2924/01082 , H01L2924/014 , H01L2924/07802 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A wafer treating method for making adhesive chips is provided. A liquid adhesive with two-stage property is coated on a surface of a wafer. Then, the wafer is pre-cured to make the liquid adhesive transform an adhesive film having B-stage property which has a glass transition temperature between −40 and 175 degree C., for example. After positioning the wafer, the wafer is singulated to form a plurality of chips with adhesive for chip-to-chip stacking, chip-to-substrate or chip-to-lead frame attaching.
摘要翻译：提供了制造粘合剂芯片的晶片处理方法。具有两级特性的液体粘合剂涂覆在晶片的表面上。然后，将晶片预固化，以使液体粘合剂例如具有玻璃化转变温度在-40至175℃之间的具有B阶特性的粘合剂膜。在晶片定位之后，晶片被单片化以形成具有用于芯片到芯片堆叠，芯片到衬底或芯片到引线框架连接的粘合剂的多个芯片。

26. 发明申请

US20080017961A1 CHIP PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：芯片包装结构及其制造方法
公开(公告)号：US20080017961A1
公开(公告)日：2008-01-24
申请号：US11530165
申请日：2006-09-08
申请人： Chun-Hung Lin , Shih-Wen Chou , Yu-Tang Pan
发明人： Chun-Hung Lin , Shih-Wen Chou , Yu-Tang Pan
IPC分类号： H01L21/00
CPC分类号： H01L23/49816 , H01L21/561 , H01L23/3128 , H01L24/48 , H01L24/97 , H01L2224/32225 , H01L2224/48091 , H01L2224/4824 , H01L2224/73215 , H01L2224/92147 , H01L2224/97 , H01L2924/00014 , H01L2924/01006 , H01L2924/01033 , H01L2924/01082 , H01L2924/15311 , H01L2924/181 , H01L2224/85 , H01L2224/83 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A manufacturing method of a chip package structure is provided. A circuit substrate having a first surface, a second surface, and a through hole connecting the first surface and the second surface is provided. A chip having an active surface and bonding pads disposed on the active surface is provided. The chip is fixed on the circuit substrate, wherein the second surface is opposite to the active surface and the bonding pads are exposed to the through hole. Bonding wires connecting the bonding pads and the first surface are formed through the through hole. A film having an opening is formed on the first surface. The bonding wires, the bonding pads, the through hole, and part of the first surface are exposed by the opening. An encapsulant is formed to encapsulate part of the active surface, the bonding wires, and part of the first surface. The film is removed.
摘要翻译：提供了一种芯片封装结构的制造方法。提供具有第一表面，第二表面和连接第一表面和第二表面的通孔的电路基板。提供具有有源表面的芯片和设置在有源表面上的接合焊盘。芯片固定在电路基板上，其中第二表面与有源表面相对，并且焊盘暴露于通孔。通过通孔形成连接接合焊盘和第一表面的接合线。具有开口的膜形成在第一表面上。接合线，接合焊盘，通孔和第一表面的一部分由开口露出。形成密封剂以封装部分活性表面，接合线和第一表面的一部分。电影被删除。

27. 发明申请

US20070228581A1 UNIVERSAL CHIP PACKAGE STRUCTURE 审中-公开
标题翻译：通用芯片包装结构
公开(公告)号：US20070228581A1
公开(公告)日：2007-10-04
申请号：US11761299
申请日：2007-06-11
申请人： Shih-Wen Chou , Chun-Hung Lin , Wu-Chang Tu , Yu-Tang Pan
发明人： Shih-Wen Chou , Chun-Hung Lin , Wu-Chang Tu , Yu-Tang Pan
IPC分类号： H01L23/52
CPC分类号： H01L23/13 , H01L23/3114 , H01L23/49816 , H01L24/10 , H01L24/45 , H01L24/48 , H01L2224/06135 , H01L2224/06136 , H01L2224/32225 , H01L2224/45144 , H01L2224/4824 , H01L2224/73215 , H01L2224/85186 , H01L2924/00014 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： A universal chip package structure including a carrier, a chip, a plurality of bonding wires, and a molding compound is provided. The carrier has a plurality of through holes, a carrying surface, and a back surface corresponding to the carrying surface. The back surface has a plurality of contacts around the through holes. The chip with an active surface and a plurality of bonding pads on the active surface is disposed on the carrying surface. The active surface is attached to the carrying surface and the through holes expose the bonding pads. The bonding wires go through the through holes to electrically connect with the bonding pads and the contacts. In addition, the shape and size of the molding compound can be adjusted for covering the chip, the contacts, and the bonding wires.
摘要翻译：提供了包括载体，芯片，多个接合线和模塑料的通用芯片封装结构。载体具有多个通孔，承载表面和对应于承载表面的后表面。后表面具有围绕通孔的多个触点。具有活性表面的芯片和有源表面上的多个接合焊盘设置在承载表面上。活性表面附着在承载表面上，通孔露出接合垫。接合线穿过通孔，以与接合焊盘和触点电连接。此外，可以调整模塑料的形状和尺寸以覆盖芯片，触点和接合线。

28. 发明申请

US20070063344A1 Chip package structure and bumping process 审中-公开
公开(公告)号：US20070063344A1
公开(公告)日：2007-03-22
申请号：US11234774
申请日：2005-09-22
申请人： Chun-Hung Lin , Geng-Shin Shen
发明人： Chun-Hung Lin , Geng-Shin Shen
IPC分类号： H01L23/48 , H01L21/44
CPC分类号： H01L25/0657 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/83 , H01L24/90 , H01L2224/05571 , H01L2224/05573 , H01L2224/13144 , H01L2224/16145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/731 , H01L2224/73265 , H01L2224/83192 , H01L2224/83856 , H01L2225/0651 , H01L2225/06513 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/0781 , H01L2924/14 , H01L2924/351 , H01L2924/00 , H01L2924/00012 , H01L2224/05599
摘要： A chip package structure including a first substrate, a second substrate, bumps and adhesive blocks is provided. The first substrate has first bonding pads. The second substrate is disposed above the first substrate and has second bonding pads. The bumps are respectively arranged on the first bonding pads or the second bonding pads, and the second substrate is electrically connected to the first substrate through the bumps. The adhesive material with B-stage property are respectively arranged between the first bonding pads and the second bonding pads and enclose each bump. The bumps can be stud bumps or plating bumps.

29. 发明授权

US06946062B2 Electropolish/grinding means for an inner surface of a long tube 有权
标题翻译：用于长管内表面的电抛光/研磨装置
公开(公告)号：US06946062B2
公开(公告)日：2005-09-20
申请号：US10085074
申请日：2002-03-01
申请人： Chun-Hung Lin , Chen-Der Tsai , Hann-Tsong Wang , Jiun-Hung Chen , De-Chang Lin
发明人： Chun-Hung Lin , Chen-Der Tsai , Hann-Tsong Wang , Jiun-Hung Chen , De-Chang Lin
IPC分类号： C25F7/00 , C25F3/16 , B23H5/06 , B23H5/10
CPC分类号： C25F7/00
摘要： The present invention is an electropolishing/grinding device for an inner surface of a long tube, including at least one long tube, one electrode, at least two partitions, one fixed magnet mechanism, one driving apparatus and an axial driven mechanism. The fixed magnet mechanism and the driving apparatus form a magnetic levitation effect, which uses magnetic repulsiveness and magnetic attraction to keep the partitions away from the inner surface and avoid an eccentric situation. One of the two partitions has a plurality of springs, a plurality of protruding objects and a plurality of abrasive devices interconnected and firmly touching the inner surface of the tube for grinding.
摘要翻译：本发明是一种用于长管内表面的电抛光/研磨装置，包括至少一个长管，一个电极，至少两个隔板，一个固定磁铁机构，一个驱动装置和轴向驱动机构。固定磁体机构和驱动装置形成磁悬浮效应，其使用磁性斥力和磁吸引力将分隔物远离内表面并避免偏心的情况。两个隔板中的一个具有多个弹簧，多个突出物体和多个研磨装置，其互连并牢固地接触管的内表面用于研磨。

30. 发明授权

US06931295B2 Method and system of calculating lot hold time 失效
标题翻译：计算批次持续时间的方法和系统
公开(公告)号：US06931295B2
公开(公告)日：2005-08-16
申请号：US10725239
申请日：2003-12-01
申请人： Chun-Hung Lin , Ta-Chin Lin
发明人： Chun-Hung Lin , Ta-Chin Lin
IPC分类号： G06F19/00 , G06Q10/00
CPC分类号： G06Q10/06
摘要： A method of calculating lot hold time. First, identification parameters of a lot are input. The lot may be a split child lot or an unsplit parent lot. The identification parameters include an identification code and a customer hold code of the lot. The identification code identifies the lot type. The customer hold code identifies the holder. Lot hold time is then calculated according to the identification parameters. Finally, the lot hold time is output for further utilization.
摘要翻译：计算批次持续时间的方法。首先，输入很多的识别参数。这个地段可能是一个分裂的小孩，也可能是一个非分裂的父母。识别参数包括批次的识别码和客户保留码。识别码识别批次类型。客户保留代码标识持有人。然后根据识别参数计算批次保持时间。最后，批次保留时间输出以供进一步利用。

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