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    • 29. 发明授权
    • Hole impact ionization mechanism of hot electron injection and
four-terminal .rho.FET semiconductor structure for long-term learning
    • 热电子注入和四端rho FET半导体结构的孔冲击电离机理进行长期学习
    • US5990512A
    • 1999-11-23
    • US845018
    • 1997-04-22
    • Christopher J. DiorioPaul E. HaslerBradley A. MinchCarver A. Mead
    • Christopher J. DiorioPaul E. HaslerBradley A. MinchCarver A. Mead
    • H01L29/76
    • H01L29/76
    • Hot-electron injection driven by a hole impact ionization mechanism at the channel-drain junction provides a new method of hot electron injection. Using this mechanism, a four-terminal pFET floating-gate silicon MOS transistor for analog learning applications provides nonvolatile memory storage. Electron tunneling permits bidirectional memory updates. Because these updates depend on both the stored memory value and the transistor terminal voltages, the synapses can implement a learning function. The synapse learning follows a simple power law. Unlike conventional EEPROMs, the synapses allow simultaneous memory reading and writing. Synapse transistor arrays can therefore compute both the array output, and local memory updates, in parallel. Synaptic arrays employing these devices enjoy write and erase isolation between array synapses is better than 0.01% because the tunneling and injection processes are exponential in the transistor terminal voltages. The synapses are small, and typically are operated at subthreshold current levels.
    • 在通道 - 漏极连接处由孔冲击电离机制驱动的热电子注入提供了一种新的热电子注入方法。 使用这种机制,用于模拟学习应用的四端子pFET浮栅硅MOS晶体管提供非易失性存储器存储。 电子隧道允许双向内存更新。 因为这些更新取决于存储的存储器值和晶体管端子电压两者,所以突触可以实现学习功能。 突触学习遵循简单的幂律。 与常规EEPROM不同,突触允许同时进行存储器读写。 因此,Synapse晶体管阵列可以同时计算阵列输出和本地存储器更新。 使用这些器件的突触阵列享受阵列突触之间的写入和擦除隔离优于0.01%,因为隧道和注入过程在晶体管端子电压中是指数的。 突触很小,通常以亚阈值电流水平操作。