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21. 发明授权

US08392786B2 LDPC coding systems for 60 GHz millimeter wave based physical layer extension 有权
公开(公告)号：US08392786B2
公开(公告)日：2013-03-05
申请号：US12435821
申请日：2009-05-05
申请人： Jason A. Trachewsky , Ba-Zhong Shen , Andrew J. Blanksby , Joonsuk Kim
发明人： Jason A. Trachewsky , Ba-Zhong Shen , Andrew J. Blanksby , Joonsuk Kim
IPC分类号： H03M13/00 , H03M13/03
CPC分类号： H04L1/0041 , H03M13/116 , H03M13/1185 , H03M13/6544 , H03M13/655 , H04L1/005 , H04L1/0057 , H04L1/0065 , H04L1/0071
摘要： LDPC coding systems for 60 GHz millimeter wave based physical layer extension. LDPC (Low Density Parity Check) encoding in cooperation with sub-carrier interleaving, in the context of orthogonal frequency division multiplexing (OFDM), and appropriate symbol mapping is performed in accordance with transmit processing as may be performed within a communication device. In a receiving communication device, receive processing may be performed on a received signal based on the type of LDPC, sub-carrier interleaving, and symbol mapping thereof. The LDPC code employed in accordance with such LDPC encoding may have a partial-tree like structure. In addition, appropriate manipulation of the bits assigned to respective sub-carriers may be performed to ensure that the bits emplaced in the MSB (Most Significant Bit) location of various symbols has some desired diversity (e.g., from different codewords, from appropriately different locations within a given codeword, etc.).

22. 发明授权

US08341488B2 Accumulating LDPC (low density parity check) decoder 有权
标题翻译：累积LDPC（低密度奇偶校验）解码器
公开(公告)号：US08341488B2
公开(公告)日：2012-12-25
申请号：US12512490
申请日：2009-07-30
申请人： Andrew J. Blanksby , Alvin Lai Lin
发明人： Andrew J. Blanksby , Alvin Lai Lin
IPC分类号： H03M13/00
CPC分类号： H03M13/13 , H03M13/1137 , H03M13/1145 , H03M13/116 , H04L1/005 , H04L1/0057
摘要： Accumulating LDPC (Low Density Parity Check) decoder. The accumulating decoding architecture described herein is applicable to LDPC codes operating on a parity check matrix, H, consisting of CSI (Cyclic Shifted Identity) sub-matrices (or matrix sub-blocks) or permuted identity sub-matrices (or matrix sub-blocks). In such a structure, the entire LDPC matrix is broken into square sub-matrices such that each sub-matrix consists of either a CSI sub-matrix or a permuted identity sub-matrix, or a null matrix. The iterative decoding process operates by updating of APP (a posteriori probability) or gamma (γ) values and check edge message (λ) values, and this by updating one or more individual rows within a number of sub-matrix rows (or all sub-matrix or sub-block rows) are processed in parallel. The amount of parallelism is specified by the designer and is typically an integer divisor of the sub-matrix (or sub-block) size.
摘要翻译：累积LDPC（低密度奇偶校验）解码器。本文描述的累积解码架构可应用于由奇偶校验矩阵H操作的LDPC码，H由CSI（循环移位身份）子矩阵（或矩阵子块）或置换的身份子矩阵（或矩阵子块）。在这种结构中，整个LDPC矩阵被分解为方形子矩阵，使得每个子矩阵由CSI子矩阵或置换的身份子矩阵或空矩阵组成。迭代解码过程通过更新APP（后验概率）或γ（γ）值并检查边缘消息（λ）值来操作，并且通过更新多个子矩阵行（或全部子帧）中的一个或多个单独行 - 矩阵或子块行）并行处理。并行度由设计者指定，通常是子矩阵（或子块）大小的整数除数。

23. 发明申请

US20110283161A1 Multi-code LDPC (Low Density Parity Check) decoder 有权
标题翻译：多码LDPC（低密度奇偶校验）解码器
公开(公告)号：US20110283161A1
公开(公告)日：2011-11-17
申请号：US13191664
申请日：2011-07-27
申请人： Andrew J. Blanksby , Alvin Lai Lin
发明人： Andrew J. Blanksby , Alvin Lai Lin
IPC分类号： H03M13/05 , G06F11/10
CPC分类号： H03M13/116 , H03M13/1137 , H03M13/114 , H03M13/6516 , H03M13/6527 , H03M13/6544 , H03M13/6566 , H04L1/0052
摘要： Multi-code LDPC (Low Density Parity Check) decoder. Multiple LDPC coded signals can be decoded using hardware provisioned for a minimum requirement needed to decode each of the multiple LDPC coded signals. In embodiments where each LDPC matrix (e.g., employed to decode each LDPC coded signal) includes a common number of non-null sub-matrices, then a same number of memories are employed when decoding each LDPC coded signal. However, those particular memories employed can be different subsets for when decoding each LDPC coded signal. In embodiments where each LDPC code includes a different number of non-null sub-matrices within its respective LDPC matrix, then a different number of memories are employed when decoding each LDPC coded signal. Various degrees of parallelism in decoding can also be employed in which different numbers of bit engines and check engines can be employed when decoding different LDPC coded signals.
摘要翻译：多码LDPC（低密度奇偶校验）解码器。可以使用提供用于解码多个LDPC编码信号中的每一个所需的最小要求的硬件来解码多个LDPC编码信号。在每个LDPC矩阵（例如，用于解码每个LDPC编码信号）包括公共数量的非零子矩阵的实施例中，在解码每个LDPC编码信号时采用相同数量的存储器。然而，在对每个LDPC编码信号进行解码时，所采用的那些特定存储器可以是不同的子集。在每个LDPC码在其各自的LDPC矩阵内包括不同数目的非空子矩阵的实施例中，在解码每个LDPC编码信号时采用不同数量的存储器。也可以采用解码中的不同程度的并行性，在解码不同的LDPC编码信号时可以采用不同数量的比特引擎和检查引擎。

24. 发明申请

US20100281335A1 Communication device architecture for in-place constructed LDPC (Low Density Parity Check) code 有权
标题翻译：用于就地构造的LDPC（低密度奇偶校验）码的通信设备架构
公开(公告)号：US20100281335A1
公开(公告)日：2010-11-04
申请号：US12770068
申请日：2010-04-29
申请人： Andrew J. Blanksby , Ba-Zhong Shen , Jason A. Trachewsky
发明人： Andrew J. Blanksby , Ba-Zhong Shen , Jason A. Trachewsky
IPC分类号： H03M13/29 , G06F11/10
CPC分类号： H03M13/1102 , H03M13/033 , H03M13/1134 , H03M13/1137 , H03M13/116 , H03M13/1185 , H03M13/1188 , H03M13/618 , H03M13/6362 , H03M13/6393 , H03M13/6502 , H03M13/6516 , H03M13/6527 , H04L1/005 , H04L1/0057
摘要： Communication device architecture for in-place constructed LDPC (Low Density Parity Check) code. Intelligent design of LDPC codes having similar characteristics there between allows for a very efficient hardware implementation of a communication device that is operative to perform encoding of respective information bit groups using more than one type of LDPC codes. A switching module can select any one of the LDPC codes within an in-place LDPC code for use by an LDPC encoder circuitry to generate an LDPC coded signal. Depending on which sub-matrices of a superimposed LDPC matrix are enabled or disabled, one of the LDPC matrices from within an in-place LDPC code matrix set may be selected. A corresponding, respective generator matrix may be generated from each respective LDPC matrix. Selection among the various LDPC codes may be in accordance with a predetermined sequence, of based operating conditions of the communication device or communication system.
摘要翻译：用于就地构造的LDPC（低密度奇偶校验）码的通信设备架构。具有相似特性的LDPC码的智能设计允许通信设备的非常有效的硬件实现，其可操作以使用多于一种类型的LDPC码执行各个信息位组的编码。交换模块可以在就地LDPC码内选择任何一个LDPC码，供LDPC编码器电路使用以产生LDPC编码信号。根据叠加的LDPC矩阵的哪些子矩阵被使能或禁用，可以选择来自就地内LDPC码矩阵集合的LDPC矩阵之一。可以从每个相应的LDPC矩阵生成相应的相应的生成器矩阵。各种LDPC码之间的选择可以与通信设备或通信系统的基于操作条件的预定顺序相一致。

25. 发明申请

US20100281330A1 Low complexity communication device employing in-place constructed LDPC (Low Density Parity Check) code 有权
标题翻译：低复杂度通信设备采用就地构造的LDPC（低密度奇偶校验）码
公开(公告)号：US20100281330A1
公开(公告)日：2010-11-04
申请号：US12769818
申请日：2010-04-29
申请人： Andrew J. Blanksby , Ba-Zhong Shen , Jason A. Trachewsky
发明人： Andrew J. Blanksby , Ba-Zhong Shen , Jason A. Trachewsky
IPC分类号： H03M13/05 , G06F11/10
CPC分类号： H03M13/1102 , H03M13/033 , H03M13/1134 , H03M13/1137 , H03M13/116 , H03M13/1185 , H03M13/1188 , H03M13/618 , H03M13/6362 , H03M13/6393 , H03M13/6502 , H03M13/6516 , H03M13/6527 , H04L1/005 , H04L1/0057
摘要： Low complexity communication device employing in-place constructed LDPC (Low Density Parity Check) code. Intelligent design of LDPC codes having similar characteristics there between allows for a very efficient hardware implementation of a communication device that is operative to perform decoding of more than one type of LDPC coded signals. A common basis of decoder hardware (e.g., decoder circuitry) is employed when decoding all of the various types of LDPC coded signals that such a communication device can decode. However, all of the decoder hardware is only employed to decode signals corresponding to the lowest code rate LDPC code supported by the communication device. A first subset of the decoder hardware is employed to decode signals corresponding to the second to lowest code rate LDPC code, a second subset (being less than the first subset) is employed to decode signals corresponding to the third to lowest code rate LDPC code, etc.
摘要翻译：低复杂度通信设备采用就地构造的LDPC（低密度奇偶校验）码。具有相似特征的LDPC码的智能设计允许可操作地执行多于一种类型的LDPC编码信号的解码的通信设备的非常有效的硬件实现。在解码这种通信设备可以解码的各种类型的LDPC编码信号的全部时，采用解码器硬件（例如，解码器电路）的通用基础。然而，所有解码器硬件仅用于对与由通信设备支持的最低码率LDPC码相对应的信号进行解码。采用解码器硬件的第一子集来解码与第二至第二码率LDPC码相对应的信号，采用第二子集（小于第一子集）来对与第三至第二码率LDPC码相对应的信号进行解码，等等

26. 发明授权

US08341487B2 Low complexity communication device employing in-place constructed LDPC (low density parity check) code 有权
标题翻译：采用就地构造的LDPC（低密度奇偶校验）码的低复杂度通信设备
公开(公告)号：US08341487B2
公开(公告)日：2012-12-25
申请号：US12769818
申请日：2010-04-29
申请人： Andrew J. Blanksby , Ba-Zhong Shen , Jason A. Trachewsky
发明人： Andrew J. Blanksby , Ba-Zhong Shen , Jason A. Trachewsky
IPC分类号： H03M13/00
CPC分类号： H03M13/1102 , H03M13/033 , H03M13/1134 , H03M13/1137 , H03M13/116 , H03M13/1185 , H03M13/1188 , H03M13/618 , H03M13/6362 , H03M13/6393 , H03M13/6502 , H03M13/6516 , H03M13/6527 , H04L1/005 , H04L1/0057
摘要： Low complexity communication device employing in-place constructed LDPC (Low Density Parity Check) code. Intelligent design of LDPC codes having similar characteristics there between allows for a very efficient hardware implementation of a communication device that is operative to perform decoding of more than one type of LDPC coded signals. A common basis of decoder hardware (e.g., decoder circuitry) is employed when decoding all of the various types of LDPC coded signals that such a communication device can decode. However, all of the decoder hardware is only employed to decode signals corresponding to the lowest code rate LDPC code supported by the communication device. A first subset of the decoder hardware is employed to decode signals corresponding to the second to lowest code rate LDPC code, a second subset (being less than the first subset) is employed to decode signals corresponding to the third to lowest code rate LDPC code, etc.
摘要翻译：低复杂度通信设备采用就地构造的LDPC（低密度奇偶校验）码。具有相似特征的LDPC码的智能设计允许可操作地执行多于一种类型的LDPC编码信号的解码的通信设备的非常有效的硬件实现。在解码这种通信设备可以解码的各种类型的LDPC编码信号的全部时，采用解码器硬件（例如，解码器电路）的通用基础。然而，所有解码器硬件仅用于对与由通信设备支持的最低码率LDPC码相对应的信号进行解码。采用解码器硬件的第一子集来解码与第二至第二码率LDPC码相对应的信号，采用第二子集（小于第一子集）来对与第三至第二码率LDPC码相对应的信号进行解码，等等

27. 发明授权

US08010881B2 Multi-code LDPC (low density parity check) decoder 失效
标题翻译：多码LDPC（低密度奇偶校验）解码器
公开(公告)号：US08010881B2
公开(公告)日：2011-08-30
申请号：US11843553
申请日：2007-08-22
申请人： Andrew J. Blanksby , Alvin Lai Lin
发明人： Andrew J. Blanksby , Alvin Lai Lin
IPC分类号： H03M13/03
CPC分类号： H03M13/116 , H03M13/1137 , H03M13/114 , H03M13/6516 , H03M13/6527 , H03M13/6544 , H03M13/6566 , H04L1/0052
摘要： Multi-code LDPC (Low Density Parity Check) decoder. Multiple LDPC coded signals can be decoded using hardware provisioned for a minimum requirement needed to decode each of the multiple LDPC coded signals. In embodiments where each LDPC matrix (e.g., employed to decode each LDPC coded signal) includes a common number of non-null sub-matrices, then a same number of memories are employed when decoding each LDPC coded signal. However, those particular memories employed can be different subsets for when decoding each LDPC coded signal. In embodiments where each LDPC code includes a different number of non-null sub-matrices within its respective LDPC matrix, then a different number of memories are employed when decoding each LDPC coded signal. Various degrees of parallelism in decoding can also be employed in which different numbers of bit engines and check engines can be employed when decoding different LDPC coded signals.
摘要翻译：多码LDPC（低密度奇偶校验）解码器。可以使用提供用于解码多个LDPC编码信号中的每一个所需的最小要求的硬件来解码多个LDPC编码信号。在每个LDPC矩阵（例如，用于解码每个LDPC编码信号）包括公共数量的非零子矩阵的实施例中，在解码每个LDPC编码信号时采用相同数量的存储器。然而，在对每个LDPC编码信号进行解码时，所采用的那些特定存储器可以是不同的子集。在每个LDPC码在其各自的LDPC矩阵内包括不同数目的非空子矩阵的实施例中，在解码每个LDPC编码信号时采用不同数量的存储器。也可以采用解码中的不同程度的并行性，在解码不同的LDPC编码信号时可以采用不同数量的比特引擎和检查引擎。

28. 发明申请

US20090282315A1 LDPC coding systems for 60 GHz millimeter wave based physical layer extension 有权
标题翻译：基于60 GHz毫米波的物理层扩展的LDPC编码系统
公开(公告)号：US20090282315A1
公开(公告)日：2009-11-12
申请号：US12435821
申请日：2009-05-05
申请人： Jason A. Trachewsky , Ba-Zhong Shen , Andrew J. Blanksby , Joonsuk Kim
发明人： Jason A. Trachewsky , Ba-Zhong Shen , Andrew J. Blanksby , Joonsuk Kim
IPC分类号： H03M13/29 , H03M13/05 , G06F11/10
CPC分类号： H04L1/0041 , H03M13/116 , H03M13/1185 , H03M13/6544 , H03M13/655 , H04L1/005 , H04L1/0057 , H04L1/0065 , H04L1/0071
摘要： LDPC coding systems for 60 GHz millimeter wave based physical layer extension. LDPC (Low Density Parity Check) encoding in cooperation with sub-carrier interleaving, in the context of orthogonal frequency division multiplexing (OFDM), and appropriate symbol mapping is performed in accordance with transmit processing as may be performed within a communication device. In a receiving communication device, receive processing may be performed on a received signal based on the type of LDPC, sub-carrier interleaving, and symbol mapping thereof. The LDPC code employed in accordance with such LDPC encoding may have a partial-tree like structure. In addition, appropriate manipulation of the bits assigned to respective sub-carriers may be performed to ensure that the bits emplaced in the MSB (Most Significant Bit) location of various symbols has some desired diversity (e.g., from different codewords, from appropriately different locations within a given codeword, etc.).
摘要翻译：基于60 GHz毫米波的物理层扩展的LDPC编码系统。在正交频分复用（OFDM）的上下文中，与子载波交织协作的LDPC（低密度奇偶校验）编码和适当的符号映射是根据通信设备内可能执行的发送处理来执行的。在接收通信设备中，可以基于LDPC的类型，子载波交织及其符号映射对接收到的信号执行接收处理。根据这样的LDPC编码采用的LDPC码可以具有部分树状结构。此外，可以执行对分配给各个子载波的比特的适当的操纵，以确保放置在各种符号的MSB（最高有效位）位置中的比特具有一些期望的分集（例如，从不同的码字，从适当不同的位置在给定码字内等）。

29. 发明申请

US20080282129A1 Operational parameter adaptable LDPC (Low Density Parity Check) decoder 有权
标题翻译：操作参数适应型LDPC（低密度奇偶校验）解码器
公开(公告)号：US20080282129A1
公开(公告)日：2008-11-13
申请号：US11807885
申请日：2007-05-30
申请人： Andrew J. Blanksby
发明人： Andrew J. Blanksby
IPC分类号： G06F11/10
CPC分类号： H03M13/112 , H03M13/1117 , H03M13/1134 , H03M13/1137 , H03M13/658 , H03M13/6583 , H03M13/6588 , H03M13/6591
摘要： Operational parameter adaptable LDPC (Low Density Parity Check) decoder. A novel means is presented by which LDPC coded signal can be decoded, and any one or more operational parameters can be adjusted during the decoding processing. For example, the original information extracted from a received LDPC coded signal (e.g., log likelihood ratios (LLRs)), can be modified during (or before) the iterative decoding processing performed in accordance with decoding an LDPC coded signal. Such modification of an operational parameter can include any one or combination of scaling, compression (and expansion/decompression), adding an offset to or subtracting an offset from, scaling, rounding, and/or some other modification of an operational parameter. The bit (or variable) edge messages and/or the check edge messages can also undergo modification during decoding processing. In addition, the operational parameter modification can be selective, in that, different modification can be performed to different parameters and/or during different decoding iterations.
摘要翻译：操作参数适应型LDPC（低密度奇偶校验）解码器。提出了可以解码LDPC编码信号的新颖手段，并且可以在解码处理期间调整任何一个或多个操作参数。例如，可以根据对LDPC编码信号的解码执行的迭代解码处理（或之前）修改从接收的LDPC编码信号（例如对数似然比（LLR））提取的原始信息。操作参数的这种修改可以包括缩放，压缩（和扩展/解压缩），向偏移量增加偏移量，减少偏移量，缩放，舍入和/或操作参数的某些其他修改的任何一个或组合。位（或可变）边消息和/或校验边消息也可以在解码处理期间进行修改。此外，操作参数修改可以是选择性的，因为可以对不同的参数和/或在不同的解码迭代期间执行不同的修改。

30. 发明授权

US06744814B1 Method and apparatus for reduced state sequence estimation with tap-selectable decision-feedback 有权
标题翻译：用抽头选择决策反馈减少状态序列估计的方法和装置
公开(公告)号：US06744814B1
公开(公告)日：2004-06-01
申请号：US09540031
申请日：2000-03-31
申请人： Andrew J. Blanksby , Erich Franz Haratsch
发明人： Andrew J. Blanksby , Erich Franz Haratsch
IPC分类号： H03H730
CPC分类号： H04L25/03235
摘要： A method and apparatus are disclosed for reducing the computational complexity of the RSSE technique. The apparatus and associated method does not assume that the signal energy of a pulse that has gone through a channel is always concentrated primarily in the initial taps, as is true for a minimum phase channel. The present invention, however, recognizes that the signal energy is often concentrated in just a few channel coefficients, with the remaining channel coefficients being close to zero. A receiver apparatus and associated method is disclosed for reducing the number of channel coefficients to be processed with a high complexity cancellation algorithm from L to V+K which contain the majority of the signal energy, while processing the L−(K+V) non-selected coefficients with a lower complexity algorithm. By only processing the intersymbol interference caused by a reduced number of channel coefficients (i.e., L−(K+V)) using the tap-selectable TS-RSSE technique, while processing the intersymbol interference caused by the remaining channel coefficients with the tap-selectable decision feedback prefilter TS-DFP technique, a good bit error rate (BER) versus signal-to-noise ratio (SNR) performance is insured for a well-chosen value of V, where V represents the number of channel coefficients processed with the TS-RSSE technique (i.e., high complexity algorithm). No presumption is made apriori concerning which V taps will be processed by the TS-RSSE algorithm, but rather, an a posteriori determination is made in response to a changing channel impulse response.
摘要翻译：公开了一种降低RSSE技术的计算复杂度的方法和装置。该装置和相关联的方法不假设已经经过通道的脉冲的信号能量总是主要集中在初始抽头中，如同对于最小相位通道一样。然而，本发明认识到信号能量通常集中在仅仅几个信道系数中，其余信道系数接近于零。公开了一种接收机装置和相关方法，用于通过高复杂性消除算法从包含大部分信号能量的L到V + K减少要处理的信道系数的数量，同时处理L-（K + V）非 - 具有较低复杂度算法的选择系数。通过使用分接头可选择的TS-RSSE技术处理由减少数量的信道系数（即，L-（K + V））引起的码间干扰，同时处理由剩余信道系数引起的码间干扰，可选择的决策反馈预滤波器TS-DFP技术，对于良好选择的V值，保证良好的误码率（BER）与信噪比（SNR）性能，其中V表示用 TS-RSSE技术（即高复杂度算法）。对于由TS-RSSE算法处理哪个V抽头而言，不考虑推测，而是响应于改变的信道脉冲响应进行后验确定。

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