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    • 22. 发明授权
    • Dynamic data restore in thyristor-based memory device
    • 基于晶闸管的存储器件中的动态数据恢复
    • US07405963B2
    • 2008-07-29
    • US11361334
    • 2006-02-24
    • Farid NematiHyun-Jin ChoRobert Homan Igehy
    • Farid NematiHyun-Jin ChoRobert Homan Igehy
    • G11C11/00
    • G11C11/39
    • A dynamically-operating restoration circuit is used to apply a voltage or current restore pulse signal to thyristor-based memory cells and therein restore data in the cell using the internal positive feedback loop of the thyristor. In one example implementation, the internal positive feedback loop in the thyristor is used to restore the conducting state of a device after the thyristor current drops below the holding current. A pulse and/or periodic waveform are defined and applied to ensure that the thyristor is not released from its conducting state. The time average of the periodic restore current in the thyristor may be lower than the holding current threshold. While not necessarily limited to memory cells that are thyristor-based, various embodiments of the invention have been found to be the particularly useful for high-speed, low-power memory cells in which a thin capacitively-coupled thyristor is used to provide a bi-stable storage element.
    • 使用动态操作的恢复电路将电压或电流恢复脉冲信号施加到基于晶闸管的存储器单元,并且其中使用晶闸管的内部正反馈回路在单元中恢复数据。 在一个示例实现中,晶闸管中的内部正反馈环路用于在晶闸管电流下降到保持电流以下之前恢复器件的导通状态。 定义并施加脉冲和/或周期波形以确保晶闸管不从其导通状态释放。 晶闸管周期性恢复电流的时间平均值可能低于保持电流阈值。 虽然不一定限于基于晶闸管的存储器单元,但是已经发现本发明的各种实施例对于其中使用薄电容耦合晶闸管来提供双向的高速,低功率存储器单元特别有用 稳定存储元件
    • 23. 发明授权
    • Reduction of charge leakage from a thyristor-based memory cell
    • 减少基于晶闸管的存储单元的电荷泄漏
    • US07786505B1
    • 2010-08-31
    • US11303237
    • 2005-12-16
    • Kevin J. YangHyun-Jin Cho
    • Kevin J. YangHyun-Jin Cho
    • H01L29/74
    • H01L29/7436H01L27/1027H01L29/66393
    • Formation of a thyristor-based memory cell is described. A first gate dielectric of the storage element is formed over a base region thereof located in a silicon layer. A transistor is coupled to the storage element via a cathode region located in the silicon layer. The transistor has a gate electrode formed over a second gate dielectric. A spacer is formed at least in part along a sidewall of the gate electrode facing a gate electrode of the storage element. A shallow implant region is formed in the silicon layer responsive at least in part to the spacer. The spacer offsets the shallow implant region from the sidewall. A portion of the shallow implant region is for an extension region. The first gate dielectric and the second gate dielectric are formed at least in part by deposition of a dielectric material.
    • 描述了基于晶闸管的存储单元的形成。 存储元件的第一栅极电介质形成在位于硅层中的基极区域上。 晶体管经由位于硅层中的阴极区耦合到存储元件。 晶体管具有形成在第二栅极电介质上的栅电极。 至少部分地沿着栅电极的侧壁与存储元件的栅电极形成间隔物。 在硅层中形成浅的注入区域,至少部分地响应于间隔物。 间隔件从浅侧植入区域偏离侧壁。 浅植入区域的一部分用于延伸区域。 至少部分地通过沉积介电材料形成第一栅极电介质和第二栅极电介质。
    • 24. 发明授权
    • Methods for distributing log block associativity for real-time system and flash memory devices performing the same
    • 用于分发执行相同功能的实时系统和闪存设备的日志块关联性的方法
    • US08261010B2
    • 2012-09-04
    • US12356306
    • 2009-01-20
    • Young-Ik EomDong-Kun ShinHyun-Jin Cho
    • Young-Ik EomDong-Kun ShinHyun-Jin Cho
    • G06F13/00G06F13/28
    • G06F12/0246G06F2212/7201G06F2212/7202G06F2212/7203
    • A method for distributing log block associativity in log buffer-based flash translation layer (FTL) includes, if write request on page p is generated, checking whether log block associated with corresponding data block that write request is generated exists or not by checking log block mapping table storing mapping information between data blocks and log blocks, wherein the associativity of each log block to data block is set to equal to or less than predetermined value K in advance, and K is a natural number, if log block associated with corresponding data block that write request is generated exists, checking whether associated log block is random log block or sequential log block, and if associated log block is random log block, writing data that write request is generated in first free page of random log block.
    • 在基于日志缓冲的闪存转换层(FTL)中分配日志块关联性的方法包括:如果生成了第p页上的写请求,则通过检查日志块来检查是否存在与写入请求相关联的数据块相关联的日志块是否存在 映射表存储数据块和日志块之间的映射信息,其中每个日志块与数据块的相关性被预先设置为等于或小于预定值K,并且如果与对应数据相关联的日志块,则K是自然数 产生写请求的块,检查关联的日志块是随机日志块还是顺序日志块,如果关联的日志块是随机日志块,则写入请求的数据在随机日志块的第一个空闲页中生成。
    • 26. 发明授权
    • Semiconductor switching device
    • 半导体开关装置
    • US08048724B2
    • 2011-11-01
    • US12707519
    • 2010-02-17
    • Hyun-Jin Cho
    • Hyun-Jin Cho
    • H01L21/332
    • G11C13/0004
    • A switching device and methods of making and operating the same are provided. In one aspect, a method of operating a switching device is provided that includes providing a MOS transistor that has a gate, a source region, a drain region and a body region. A bipolar transistor is provided that has a collector, a base and an emitter. The body region of the MOS transistor serves as the base of the bipolar transistor and the drain region of the MOS transistor serves as the collector of the bipolar transistor. Activation of the MOS transistor causes the bipolar transistor to turn on. The MOS transistor is activated to turn on the bipolar transistor and the bipolar transistor delivers current to the source region.
    • 提供了一种开关装置及其制作和操作方法。 一方面,提供了一种操作开关器件的方法,其包括提供具有栅极,源极区域,漏极区域和体区域的MOS晶体管。 提供了具有集电极,基极和发射极的双极晶体管。 MOS晶体管的体区用作双极晶体管的基极,MOS晶体管的漏极区域用作双极晶体管的集电极。 MOS晶体管的激活导致双极晶体管导通。 MOS晶体管被激活以导通双极晶体管,并且双极晶体管将电流传送到源极区域。
    • 28. 发明申请
    • Semiconductor Switching Device
    • 半导体开关器件
    • US20080031036A1
    • 2008-02-07
    • US11615983
    • 2006-12-24
    • Hyun-Jin Cho
    • Hyun-Jin Cho
    • G11C11/34
    • G11C13/0004
    • A switching device and methods of making and operating the same are provided. In one aspect, a method of operating a switching device is provided that includes providing a MOS transistor that has a gate, a source region, a drain region and a body region. A bipolar transistor is provided that has a collector, a base and an emitter. The body region of the MOS transistor serves as the base of the bipolar transistor and the drain region of the MOS transistor serves as the collector of the bipolar transistor. Activation of the MOS transistor causes the bipolar transistor to turn on. The MOS transistor is activated to turn on the bipolar transistor and the bipolar transistor delivers current to the source region.
    • 提供了一种开关装置及其制作和操作方法。 一方面,提供了一种操作开关器件的方法,其包括提供具有栅极,源极区域,漏极区域和体区域的MOS晶体管。 提供了具有集电极,基极和发射极的双极晶体管。 MOS晶体管的体区用作双极晶体管的基极,MOS晶体管的漏极区域用作双极晶体管的集电极。 MOS晶体管的激活导致双极晶体管导通。 MOS晶体管被激活以导通双极晶体管,并且双极晶体管将电流传送到源极区域。
    • 30. 发明授权
    • Semiconductor switching device
    • 半导体开关装置
    • US08184477B2
    • 2012-05-22
    • US13243772
    • 2011-09-23
    • Hyun-Jin Cho
    • Hyun-Jin Cho
    • G11C11/34
    • G11C13/0004
    • A switching device and methods of making and operating the same are provided. In one aspect, a method of operating a switching device is provided that includes providing a MOS transistor that has a gate, a source region, a drain region and a body region. A bipolar transistor is provided that has a collector, a base and an emitter. The body region of the MOS transistor serves as the base of the bipolar transistor and the drain region of the MOS transistor serves as the collector of the bipolar transistor. Activation of the MOS transistor causes the bipolar transistor to turn on. The MOS transistor is activated to turn on the bipolar transistor and the bipolar transistor delivers current to the source region.
    • 提供了一种开关装置及其制作和操作方法。 一方面,提供一种操作开关器件的方法,其包括提供具有栅极,源极区域,漏极区域和体区域的MOS晶体管。 提供了具有集电极,基极和发射极的双极晶体管。 MOS晶体管的体区用作双极晶体管的基极,MOS晶体管的漏极区域用作双极晶体管的集电极。 MOS晶体管的激活导致双极晶体管导通。 MOS晶体管被激活以导通双极晶体管,并且双极晶体管将电流传送到源极区域。