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21. 发明授权

US07274513B2 Off-axis projection optics and extreme ultraviolet lithography apparatus employing the same 有权
公开(公告)号：US07274513B2
公开(公告)日：2007-09-25
申请号：US11358074
申请日：2006-02-22
申请人： Seung-Hyuk Chang , I-Hun Song , Won-Joo Kim , Suk-Pil Kim , Hoon Kim
发明人： Seung-Hyuk Chang , I-Hun Song , Won-Joo Kim , Suk-Pil Kim , Hoon Kim
IPC分类号： G02B9/00
CPC分类号： G03F7/70233
摘要： Off-axis projection optics that includes first and second mirrors positioned off-axis and sharing a confocal point that are arranged to reduce linear astigmatism. If a distance between an object plane and the first mirror is l1, an incident angle of light coming from the object plane to the first mirror is i1, a distance between the first mirror and the confocal point is l1′, a distance between the confocal point and the second mirror is l2, an incident angle of light coming from the first mirror to the second mirror is i2, and a distance between the second mirror and an image plane is l2′, the off-axis projection optics may satisfy the following equation: l 1 ′ + l 1 l 1 ⁢ tan ⁢ ⁢ i 1 = l 2 ′ + l 2 l 2 ⁢ tan ⁢ ⁢ i 2 .

22. 发明申请

US20070183204A1 NAND-type nonvolatile memory devices having common bit lines and methods of operating the same 审中-公开
标题翻译：具有公共位线的NAND型非易失性存储器件及其操作方法
公开(公告)号：US20070183204A1
公开(公告)日：2007-08-09
申请号：US11657652
申请日：2007-01-25
申请人： Suk-Pil Kim , Won-Joo Kim , Yoon-Dong Park , Jae-Woong Hyun , Jung-Hoon Lee
发明人： Suk-Pil Kim , Won-Joo Kim , Yoon-Dong Park , Jae-Woong Hyun , Jung-Hoon Lee
IPC分类号： G11C11/34 , G11C16/04
CPC分类号： G11C16/0483 , G11C7/18
摘要： A NAND-type nonvolatile memory device includes a first string and a second string. The ends of each of the first and second strings are connected to a common bit line and a common source line, respectively. Each of the first string and the second string have a string selection transistors, a plurality of unit devices and a source selection transistor. Word lines are respectively connected to control gates of the unit devices in the same rows. A first string selection line and a second string selection line are respectively connected to the gates of the string selection transistors of the first string and the second string. A first source selection line and a second source selection line are respectively connected to the gates of the first string and the second string.
摘要翻译： NAND型非易失性存储器件包括第一串和第二串。第一和第二串中的每一个的端部分别连接到公共位线和公共源极线。第一串和第二串中的每一个具有串选择晶体管，多个单元器件和源极选择晶体管。字线分别连接到相同行中的单元设备的控制栅极。第一串选择线和第二串选择线分别连接到第一串和第二串的串选择晶体管的栅极。第一源选择线和第二源选择线分别连接到第一串和第二串的栅极。

23. 发明申请

US20070145431A1 Fin-FET having GAA structure and methods of fabricating the same 有权
标题翻译：具有GAA结构的Fin-FET及其制造方法
公开(公告)号：US20070145431A1
公开(公告)日：2007-06-28
申请号：US11505936
申请日：2006-08-18
申请人： Suk-Pil Kim , Jae-Woong Hyun , Yoon-Dong Park , Won-Joo Kim , Dong-Gun Park , Choong-Ho Lee
发明人： Suk-Pil Kim , Jae-Woong Hyun , Yoon-Dong Park , Won-Joo Kim , Dong-Gun Park , Choong-Ho Lee
IPC分类号： H01L29/76
CPC分类号： H01L29/785 , H01L29/42392 , H01L29/66795
摘要： Example embodiments of the present invention relate to a semiconductor device and methods of fabricating the same. Other example embodiments of the present invention relate to a fin-field effect transistor (Fin-FET) having a fin-type channel region and methods of fabricating the same. A Fin-FET having a gate all around (GAA) structure that may use an entire area around a fin as a channel region is provided. The Fin-FET having the GAA structure includes a semiconductor substrate having a body, a pair of support pillars and a fin. The pair of support pillars may protrude from the body. A fin may be spaced apart from the body and may have ends connected to and supported by the pair of support pillars. A gate electrode may surround at least a portion of the fin of the semiconductor substrate. The gate electrode may be insulated from the semiconductor substrate. A gate insulation layer may be interposed between the gate electrode and the fin of the semiconductor substrate.
摘要翻译：本发明的示例性实施例涉及一种半导体器件及其制造方法。本发明的其它示例性实施例涉及一种具有鳍型沟道区的鳍式场效应晶体管（Fin-FET）及其制造方法。提供了可以使用围绕鳍片的整个区域作为沟道区域的具有栅极全（GAA）结构的鳍FET。具有GAA结构的Fin-FET包括具有主体，一对支撑柱和鳍的半导体衬底。一对支柱可能从身体突出。翅片可以与主体间隔开，并且可以具有连接到一对支撑柱并由其支撑的端部。栅电极可围绕半导体衬底的鳍的至少一部分。栅电极可以与半导体衬底绝缘。栅极绝缘层可以插入在半导体衬底的栅电极和鳍之间。

24. 发明申请

US20070054445A1 METHOD OF MANUFACTURING NANO SCALE SEMICONDUCTOR DEVICE USING NANO PARTICLES 有权
标题翻译：使用纳米颗粒制造纳米尺度半导体器件的方法
公开(公告)号：US20070054445A1
公开(公告)日：2007-03-08
申请号：US11240473
申请日：2005-10-03
申请人： Hoon Kim , In-jae Song , Won-joo Kim , Byoung-lyong Choi
发明人： Hoon Kim , In-jae Song , Won-joo Kim , Byoung-lyong Choi
IPC分类号： H01L21/338 , H01L21/461
CPC分类号： H01L21/8238 , H01L21/3212 , H01L33/08 , H01L33/24 , Y10S977/755 , Y10S977/758 , Y10S977/773
摘要： Provided is a method of manufacturing a nano scale semiconductor device, such as a nano scale P-N junction device or a CMOS using nano particles without using a mask or a fine pattern. The method includes dispersing uniformly a plurality of nano particles on a semiconductor substrate, forming an insulating layer covering the nano particles on the semiconductor substrate, partly removing the upper surfaces of the nano particles and the insulating layer, selectively removing the nano particles from the insulating layer, and partly forming doped semiconductor layers in the semiconductor substrate by partly doping the semiconductor substrate through spaces formed by removing the nano particles.
摘要翻译：提供了一种使用纳米级P-N结器件或使用纳米颗粒的CMOS而不使用掩模或精细图案的纳米级半导体器件的制造方法。该方法包括在半导体衬底上均匀分散多个纳米颗粒，形成覆盖半导体衬底上的纳米颗粒的绝缘层，部分去除纳米颗粒和绝缘层的上表面，从绝缘体中选择性地除去纳米颗粒层，并且通过部分地通过去除纳米颗粒形成的空间将半导体衬底部分地掺杂在半导体衬底中部分地形成掺杂半导体层。

25. 发明申请

US20070048934A1 Method of fabricating a semiconductor device having a single gate electrode corresponding to a pair of fin-type channel regions 有权
标题翻译：制造具有对应于一对鳍型沟道区的单个栅电极的半导体器件的方法
公开(公告)号：US20070048934A1
公开(公告)日：2007-03-01
申请号：US11505335
申请日：2006-08-17
申请人： Suk-Pil Kim , Yoon-Dong Park , Won-Joo Kim , Dong-Gun Park , Eun-Suk Cho , Suk-Kang Sung , Byung-Yong Choi , Tae-Yong Kim , Choong-Ho Lee
发明人： Suk-Pil Kim , Yoon-Dong Park , Won-Joo Kim , Dong-Gun Park , Eun-Suk Cho , Suk-Kang Sung , Byung-Yong Choi , Tae-Yong Kim , Choong-Ho Lee
IPC分类号： H01L21/8242
CPC分类号： H01L29/785 , H01L21/28273 , H01L21/28282 , H01L21/84 , H01L27/10873 , H01L27/10879 , H01L27/1159 , H01L27/2436 , H01L29/66795
摘要： Provided are methods for fabricating semiconductor devices incorporating a fin-FET structure that provides body-bias control, exhibits some characteristic advantages associated with SOI structures, provides increased operating current and/or reduced contact resistance. The methods for fabricating semiconductor devices include forming insulating spacers on the sidewalls of a protruding portion of a first insulation film; forming a second trench by removing exposed regions of the semiconductor substrate using the insulating spacers as an etch mask, and thus forming fins in contact with and supported by the first insulation film. After forming the fins, a third insulation film is formed to fill the second trench and support the fins. A portion of the first insulation film is then removed to open a space between the fins in which additional structures including gate dielectrics, gate electrodes and additional contact, insulating and storage node structures may be formed.
摘要翻译：提供了制造具有提供体偏置控制的鳍式FET结构的半导体器件的方法，显示出与SOI结构相关的一些特征优点，提供增加的工作电流和/或降低的接触电阻。制造半导体器件的方法包括在第一绝缘膜的突出部分的侧壁上形成绝缘间隔物; 通过使用绝缘间隔物作为蚀刻掩模去除半导体衬底的暴露区域，从而形成与第一绝缘膜接触并由第一绝缘膜支撑的鳍形成第二沟槽。在形成翅片之后，形成第三绝缘膜以填充第二沟槽并支撑翅片。然后去除第一绝缘膜的一部分以打开翅片之间的空间，其中可以形成包括栅极电介质，栅电极和附加接触，绝缘和存储节点结构的附加结构。

26. 发明申请

US20060199025A1 Buffer layer in flat panel display 审中-公开
公开(公告)号：US20060199025A1
公开(公告)日：2006-09-07
申请号：US11415530
申请日：2006-05-02
申请人： Robert Hanson , Won-Joo Kim , Mike Pugh
发明人： Robert Hanson , Won-Joo Kim , Mike Pugh
IPC分类号： B32B15/04
CPC分类号： H01J29/085 , G02F1/13439 , H01J9/20 , H01J31/127 , H01J2329/08 , H01J2329/865 , H01L51/5206
摘要： In devices such as flat panel displays, an aluminum oxide layer is provided between an aluminum layer and an ITO layer when such materials would otherwise be in contact to protect the ITO from optical and electrical defects sustained, for instance, during anodic bonding and other fabrication steps. This aluminum oxide barrier layer is preferably formed either by: (1) partially or completely anodizing an aluminum layer formed over the ITO layer, or (2) an in situ process forming aluminum oxide either over the ITO layer or over an aluminum layer formed on the ITO layer. After either of these processes, an aluminum layer is then formed over the aluminum oxide layer.

27. 发明申请

US20060134531A1 Mask for electromagnetic radiation and method of fabricating the same 审中-公开
标题翻译：电磁辐射掩模及其制造方法
公开(公告)号：US20060134531A1
公开(公告)日：2006-06-22
申请号：US11274474
申请日：2005-11-16
申请人： I-Hun Song , Won-Il Ryu , Suk-Pil Kim , Hoon Kim , Seung-Hyuk Chang , Won-Joo Kim , Young-Soo Park
发明人： I-Hun Song , Won-Il Ryu , Suk-Pil Kim , Hoon Kim , Seung-Hyuk Chang , Won-Joo Kim , Young-Soo Park
IPC分类号： G03C5/00 , G21K5/00 , G03F1/00
CPC分类号： G21K1/062 , B82Y10/00 , B82Y40/00 , G03F1/24
摘要： A mask for lithography and a method of manufacturing the same. The mask may include a substrate, a reflection layer formed of a material capable of reflecting electromagnetic rays on the substrate and an absorption pattern formed in a desired pattern such that absorbing regions with respect to electromagnetic rays and windows through which electromagnetic rays pass are formed, wherein the absorption pattern includes at least one side surface that is adjacent to the window and is inclined with respect to the reflection layer. The method may include forming a reflection layer which is formed of a material capable of reflecting electromagnetic rays on a substrate, forming an absorption layer which is formed of a material capable of absorbing electromagnetic rays on the refection layer, and patterning the absorption layer to form an absorption pattern with at least one side surface adjacent to a window that has an inclined side surface with respect to the reflection layer.
摘要翻译：光刻用掩模及其制造方法。掩模可以包括基板，由能够在基板上反射电磁射线的材料形成的反射层和形成为期望图案的吸收图案，使得形成相对于电磁射线通过的电磁射线和窗口的吸收区域，其中所述吸收图案包括与所述窗口相邻并且相对于所述反射层倾斜的至少一个侧表面。该方法可以包括形成由能够在基板上反射电磁射线的材料形成的反射层，形成由能够在反射层上吸收电磁射线的材料形成的吸收层，以及图案化吸收层以形成具有与窗口相邻的至少一个侧表面的吸收图案，该窗口具有相对于反射层的倾斜侧表面。

28. 发明授权

US06716081B2 Spacer fabrication for flat panel displays 失效
标题翻译：平板显示器的间隔制造
公开(公告)号：US06716081B2
公开(公告)日：2004-04-06
申请号：US10113044
申请日：2002-04-01
申请人： Won-Joo Kim , Robert J. Hanson , David H. Chun , Gary A. Evans , Seungwoo Lee , Jim J. Browning
发明人： Won-Joo Kim , Robert J. Hanson , David H. Chun , Gary A. Evans , Seungwoo Lee , Jim J. Browning
IPC分类号： H01J924
CPC分类号： H01J29/028 , H01J9/185 , H01J9/241 , H01J9/242 , H01J29/864 , H01J31/123 , H01J2329/8625 , Y10T428/12604 , Y10T428/24744 , Y10T428/24917 , Y10T428/24926
摘要： A multi-layered structure, and method for producing same, which may include at least one glass layer anodically bonded to an intermediate layer. The intermediate layer may function as an anodic bonding layer, an etch stop layer, and/or a hard mask layer. A template may be formed of the multi-layered structure by forming a desired pattern of openings therein by way of, for example, etching. Such a template may, for example, be used in the alignment and adherence of spacer structures to an electrode plate during the fabrication of flat panel displays. When used in this context, the construction of such a template results in more precise control of the patterning and sizing of the holes formed therein which thereby allows for more precise placement of spacer structures as well as the use of spacer structures exhibiting relatively higher aspect ratios during the fabrication of flat panel displays.
摘要翻译：多层结构及其制造方法，其可以包括至少一个阳极结合到中间层的玻璃层。中间层可用作阳极结合层，蚀刻停止层和/或硬掩模层。模板可以通过例如通过蚀刻在其中形成所需的开口图案而由多层结构形成。例如，在制造平板显示器期间，这种模板可以用于将间隔物结构对准和粘附到电极板上。当在这种情况下使用时，这种模板的结构可以更精确地控制在其中形成的孔的图案化和尺寸化，从而允许间隔结构的更精确的放置以及使用表现出相对更高的纵横比的间隔结构在制造平板显示器期间。

29. 发明授权

US09829983B2 Mobile systems including image sensors, methods of operating image sensors, and methods of operating mobile systems 有权
公开(公告)号：US09829983B2
公开(公告)日：2017-11-28
申请号：US14061036
申请日：2013-10-23
申请人： Yoon-Dong Park , Won-Joo Kim , Young-Gu Jin , Dong-Wook Kwon , Kyung-Il Kim , Min-Ho Kim , Gi-Sang Lee , Sang-Bo Lee , Jin-Kyung Lee , Jin-Wuk Choi
发明人： Yoon-Dong Park , Won-Joo Kim , Young-Gu Jin , Dong-Wook Kwon , Kyung-Il Kim , Min-Ho Kim , Gi-Sang Lee , Sang-Bo Lee , Jin-Kyung Lee , Jin-Wuk Choi
IPC分类号： G09G5/00 , G06F3/01 , G06F3/041 , G06F1/32
CPC分类号： G06F3/017 , G06F1/3262 , G06F3/011 , G06F3/0416 , G06F2203/04101 , G06F2203/04106
摘要： A mobile system may comprise a three-dimensional (3D) image sensor on a first surface of the mobile system configured to perform a first sensing to detect proximity of a subject and a second sensing to recognize a gesture of the subject by acquiring distance information for the subject; and/or a display device on the first surface of the mobile system to display results of the first sensing and the second sensing. A mobile system may comprise a light source unit; a plurality of depth pixels; and/or a plurality of color pixels. The light source unit, the plurality of depth pixels, or the plurality of color pixels may be activated based on an operation mode of the mobile system.

30. 发明授权

US09118856B2 Sensor, data processing system, and operating method 有权
标题翻译：传感器，数据处理系统和操作方法
公开(公告)号：US09118856B2
公开(公告)日：2015-08-25
申请号：US13541973
申请日：2012-07-05
申请人： Won Joo Kim , Hyoung Soo Ko , Doo Cheol Park , Hee Woo Park , Kwang-Min Lee , Ju Hwan Jung
发明人： Won Joo Kim , Hyoung Soo Ko , Doo Cheol Park , Hee Woo Park , Kwang-Min Lee , Ju Hwan Jung
IPC分类号： H04N15/00 , H01L27/146 , H04N5/369 , H04N13/02
CPC分类号： H04N5/3696 , H01L27/14609
摘要： An image sensor includes a unit pixel including a plurality of color pixels with a depth pixel. A first signal line group of first signal lines is used to supply first control signals that control operation of the plurality of color pixels, and a separate second signal line group of second signal lines is used to supply second control signals that control operation of the depth pixel.
摘要翻译：图像传感器包括具有深度像素的多个彩色像素的单位像素。使用第一信号线的第一信号线组来提供控制多个彩色像素的操作的第一控制信号，并且使用第二信号线的单独的第二信号线组来提供控制深度的操作的第二控制信号像素。

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