专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明申请

US20170023642A1 LOST MOTION GASKET FOR SEMICONDUCTOR TEST, AND ASSOCIATED SYSTEMS AND METHODS 审中-公开
标题翻译：用于半导体测试的失效运动垫圈及相关系统和方法
公开(公告)号：US20170023642A1
公开(公告)日：2017-01-26
申请号：US15166716
申请日：2016-05-27
申请人： Translarity, Inc.
发明人： Douglas A. Preston , Christopher T. Lane , Mark Gardiner , Morgan T. Johnson , Doug Buck , Nikolai Kalnin
IPC分类号： G01R31/28 , G01R1/04 , G01R1/073
CPC分类号： G01R31/2891 , G01R1/0466 , G01R1/07378 , G01R31/2889
摘要： Systems and methods for testing semiconductor wafers using a wafer translator are disclosed herein. In one embodiment, an apparatus for testing semiconductor dies includes a semiconductor wafer translator having a wafer-side positioned to face toward a device under test, and an inquiry-side facing away from the wafer-side. The apparatus also includes a flexible arm peripherally connected to the wafer translator, and an evacuation opening within the flexible arm or within the wafer translator. The evacuation opening is open to a flow of a gas in a first position of the flexible arm, and closed to a flow of the gas in a second position of the flexible arm.
摘要翻译：本文公开了使用晶片转换器测试半导体晶片的系统和方法。在一个实施例中，用于测试半导体管芯的设备包括半导体晶片转换器，其具有面向被测器件的晶片侧，以及面向晶片侧的查询侧。该装置还包括外围连接到晶片转换器的柔性臂以及柔性臂内或晶片转换器内的抽空开口。排气开口对于柔性臂的第一位置中的气体流开放，并且在柔性臂的第二位置中关闭到气体流。

22. 发明申请

US20170016954A1 SYSTEMS AND METHODS FOR GENERATING AND PRESERVING VACUUM BETWEEN SEMICONDUCTOR WAFER AND WAFER TRANSLATOR 审中-公开
标题翻译：用于生成和保存半导体波形和波长转换器之间的真空的系统和方法
公开(公告)号：US20170016954A1
公开(公告)日：2017-01-19
申请号：US15179641
申请日：2016-06-10
申请人： Translarity, Inc.
发明人： Nikolai Kalnin , Christopher T. Lane , David Ekstrom , Morgan T. Johnson , Douglas A. Preston
IPC分类号： G01R31/28 , G01R1/04 , H01L21/67 , H01L21/66 , H01L21/683 , H01L21/677
CPC分类号： G01R31/2891 , F04B37/14 , G01R1/0466 , G01R31/2893 , H01L21/67144 , H01L21/67242 , H01L21/677 , H01L21/6838 , H01L22/14
摘要： Systems and methods for testing semiconductor wafers using a wafer translator are disclosed herein. In one embodiment, an apparatus for testing semiconductor dies on a wafer includes a wafer translator having a wafer-side facing toward the wafer, and an inquiry-side facing away from the wafer-side. The wafer has an active side facing the translator. The apparatus includes a peripheral seal configured to seal a space between the wafer translator and the wafer, and a valve in a fluidic communication with the space between the wafer translator and the wafer.
摘要翻译：本文公开了使用晶片转换器测试半导体晶片的系统和方法。在一个实施例中，用于在晶片上测试半导体管芯的装置包括具有晶片侧面向晶片的晶片转换器和面向晶片侧的查询侧。晶片具有面向平移器的有源侧。该装置包括构造成密封晶片转换器和晶片之间的空间的外围密封件，以及与晶片转换器和晶片之间的空间流体连通的阀。

23. 发明授权

US09222965B2 Translators coupleable to opposing surfaces of microelectronic substrates for testing, and associated systems and methods 有权
标题翻译：可耦合到微电子基板的相对表面进行测试的翻译器，以及相关的系统和方法
公开(公告)号：US09222965B2
公开(公告)日：2015-12-29
申请号：US14309672
申请日：2014-06-19
申请人： TRANSLARITY, INC.
发明人： Morgan T. Johnson
IPC分类号： G01R31/20 , G01R31/26 , G01R31/28 , G01R1/04
CPC分类号： G01R31/26 , G01R1/0416 , G01R1/07378 , G01R31/2831 , G01R31/2886 , G01R31/2887 , H01L2224/16225
摘要： Translators coupleable to opposing surfaces of microelectronic substrates for testing, and associated systems and methods are disclosed. An arrangement in accordance with one embodiment includes a microelectronic substrate having a first major surface, a second major face facing opposite from the first major surface, and electrically conductive through-substrate vias extending through the substrate and electrically accessible from both the first and second surfaces. The arrangement further includes a first translator releasably connected to the substrate and positioned in a first region extending outwardly from the first surface, the first translator including first electrical signal paths that access the vias from the first surface, and a second translator releasably connected to the substrate simultaneously with the first translator, the second translator being positioned in a second region extending outwardly from the second surface, the second translator including second electrical signal paths that access the vias from the second surface.
摘要翻译：公开了可耦合到用于测试的微电子衬底的相对表面的翻译器，以及相关系统和方法。根据一个实施例的装置包括具有第一主表面，与第一主表面相对的第二主表面的微电子衬底以及延伸穿过衬底并且可从第一表面和第二表面电接触的导电贯穿衬底通孔。该装置还包括可释放地连接到基板并且定位在从第一表面向外延伸的第一区域中的第一转换器，第一转换器包括从第一表面接近通孔的第一电信号路径和可释放地连接到第一转换器的第二转换器基板同时与第一平移器同步，第二转换器定位在从第二表面向外延伸的第二区域中，第二转换器包括从第二表面接近通孔的第二电信号路径。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式