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21. 发明授权

US08402413B2 Wiring design apparatus and method 有权
标题翻译：接线设计装置及方法
公开(公告)号：US08402413B2
公开(公告)日：2013-03-19
申请号：US12721716
申请日：2010-03-11
申请人： Ikuo Ohtsuka , Takao Yamaguchi , Eiichi Konno , Toshiyasu Sakata , Takahiko Orita
发明人： Ikuo Ohtsuka , Takao Yamaguchi , Eiichi Konno , Toshiyasu Sakata , Takahiko Orita
IPC分类号： G06F17/50
CPC分类号： H05K3/0005 , G06F17/5077 , H05K2201/10734
摘要： A wiring design apparatus for designing a plurality of wiring lines of a printed circuit board including a plurality of connection posts arranged in a matrix, includes a processor, the processor providing an orthogonal grid including a plurality of rows and columns running over and between the connection posts, providing a plurality of diagonal paths each connecting at least one of the rows with at least one of the columns each running between each of adjacent pairs of the connection posts, and determining a route for each of the wiring lines by exclusively allocating to each of the wiring lines a selected part of the rows, the columns and the paths so that the selected part connects both ends of each of the wiring lines.
摘要翻译：一种用于设计包括以矩阵形式布置的多个连接柱的印刷电路板的多条布线的布线设计装置，包括处理器，所述处理器提供正交网格，所述正交网格包括在所述连接之间和之间运行的多个行和列柱，其提供多个对角线路径，每个对角线路径至少连接一条行，每条列中的至少一列在相邻的每对连接柱之间运行，并且通过专门地分配给每个布线来确定每个布线的路线的布线选定部分的列，列和路径，使得所选择的部分连接每条布线的两端。

22. 发明申请

US20120117529A1 APPARATUS, DESIGN METHOD AND RECORDING MEDIUM 有权
标题翻译：设备，设计方法和记录介质
公开(公告)号：US20120117529A1
公开(公告)日：2012-05-10
申请号：US13221572
申请日：2011-08-30
申请人： Yoshitaka Nishio , Eiichi Konno , Kazunori Kumagai , Motoyuki Tanisho , Toshiyasu Sakata
发明人： Yoshitaka Nishio , Eiichi Konno , Kazunori Kumagai , Motoyuki Tanisho , Toshiyasu Sakata
IPC分类号： G06F17/50
CPC分类号： G06F17/5077
摘要： A computer-readable medium storing a design program causing a computer to execute a process is provided. The process includes virtually routing, when routing of a wire to be connected between a first component and a second component at least one of which includes a swapping pin is being designed, the wire to be connected between a first pin of the first component and a first counterpart pin of the second component such that implementation of an actual routed wire connected therebetween is secured regardless of a net allocated to the swapping pin, and swapping one of the virtually routed first pin and the virtually routed first counterpart pin with the swapping pin such that the net allocated to the swapping pin is identical to a net allocated to the other one of the virtually routed first pin and the virtually routed first counterpart pin.
摘要翻译：提供了存储使计算机执行处理的设计程序的计算机可读介质。该过程包括虚拟地布线，当布线要被连接在第一部件和第二部件之间的导线时，其中至少其中之一包括交换引脚正被设计，待连接在第一部件的第一引脚与第一部件之间的导线第二组件的第一对应销，使得连接在其间的实际布线的实现被确保，而不管分配给交换引脚的网络如何，并且与交换引脚交换虚拟路由的第一引脚和虚拟路由的第一对应引脚中的一个，分配给交换引脚的网与分配给虚拟路由的第一引脚和虚拟路由的第一对应引脚中的另一个的网相同。

23. 发明授权

US5644500A Routing program generating method and apparatus therefor, placement program generating method and apparatus therefor, and automatic routing method and apparatus therefor 失效
标题翻译：路由程序生成方法及其装置，放置程序生成方法及其装置，以及自动布线方法和装置
公开(公告)号：US5644500A
公开(公告)日：1997-07-01
申请号：US673472
申请日：1996-07-01
申请人： Hiroshi Miura , Masato Ariyama , Kazuyuki Iida , Kazufumi Iwahara , Mitsunobu Okano , Hiroyuki Orihara , Akira Katsumata , Toshiyasu Sakata , Masaharu Nishimura , Hirofumi Hamamura , Naoki Murakami , Mitsuru Yasuda , Yasuhiro Yamashita , Ryouji Yamada , Atsushi Yamane
发明人： Hiroshi Miura , Masato Ariyama , Kazuyuki Iida , Kazufumi Iwahara , Mitsunobu Okano , Hiroyuki Orihara , Akira Katsumata , Toshiyasu Sakata , Masaharu Nishimura , Hirofumi Hamamura , Naoki Murakami , Mitsuru Yasuda , Yasuhiro Yamashita , Ryouji Yamada , Atsushi Yamane
IPC分类号： H01L21/3205 , G06F17/50 , H01L21/82 , H01L23/52 , G06F15/00
CPC分类号： G06F17/5072 , G06F17/5077
摘要： This invention is directed to a method and apparatus to find out an optimum solution in automatic routing or automatic placement with certainty and at a high-speed to improve a routing rate, and to realize automatic routing in a high-density. To these end, a routing approach is selected in a conversational mode while routing efficiency is consulted to compose routing processing procedure so as to generate a routing program. Besides, component placement processing procedures designated according to placement control information are combined to generate the placement program. A straight line between component pins adjacent to each other is defined as a chord, a wave for maze method routing is generated from a start point toward an end point of a routing path and propagated between the chords adjacent to each other. Positions of the chords through which the wave has passed until reaching the end point from the start point are successively stored and the positions through which the wave has passed is traced back to the start point from the end point when the wave reaches the end point to decide a routing path of the routing pattern. The method and apparatus of this invention are applicable to routing design or component placement design of LSIs, multichip modules, printed circuit boards, etc.
摘要翻译：本发明涉及一种以确定性和高速度找出自动路由或自动放置的最佳方案以提高路由速率并实现高密度自动路由的方法和装置。为此，在会话模式中选择路由选择方法，同时查询路由效率以组合路由处理过程，以便生成路由程序。此外，组合根据放置控制信息指定的部件布置处理程序以生成放置程序。彼此相邻的部件销之间的直线被定义为和弦，从起点到路径路径的终点产生迷宫方法路由的波，并且在彼此相邻的和弦之间传播。通过波过去的和弦直到从起点到达终点的弦的位置被连续地存储，并且当波到达终点时波已经通过的位置从终点被追溯到起点决定路由模式的路由路径。本发明的方法和装置可应用于LSI，多芯片模块，印刷电路板等的布线设计或组件放置设计。

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