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21. 发明申请

US20060289903A1 Method of forming metal/high-k gate stacks with high mobility 审中-公开
标题翻译：形成高迁移率的金属/高k栅极叠层的方法
公开(公告)号：US20060289903A1
公开(公告)日：2006-12-28
申请号：US11513101
申请日：2006-08-30
申请人： Wanda Andreoni , Alessandro Callegari , Eduard Cartier , Alessandro Curioni , Christopher D'Emic , Evgeni Gousev , Michael Gribelyuk , Paul Jamison , Rajarao Jammy , Dianne Lacey , Fenton McFeely , Vijay Narayanan , Carlo Pignedoli , Joseph Shepard , Sufi Zafar
发明人： Wanda Andreoni , Alessandro Callegari , Eduard Cartier , Alessandro Curioni , Christopher D'Emic , Evgeni Gousev , Michael Gribelyuk , Paul Jamison , Rajarao Jammy , Dianne Lacey , Fenton McFeely , Vijay Narayanan , Carlo Pignedoli , Joseph Shepard , Sufi Zafar
IPC分类号： H01L31/112 , H01L29/80
CPC分类号： H01L21/28176 , H01L29/4908 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/6656 , H01L29/66575 , H01L29/66772 , H01L29/7833 , H01L29/78684
摘要： The present invention provides a gate stack structure that has high mobilites and low interfacial charges as well as semiconductor devices, i.e., metal oxide semiconductor field effect transistors (MOSFETs) that include the same. In the semiconductor devices, the gate stack structure of the present invention is located between the substrate and an overlaying gate conductor. The present invention also provides a method of fabricating the inventive gate stack structure in which a high temperature annealing process (on the order of about 800° C.) is employed. The high temperature anneal used in the present invention provides a gate stack structure that has an interface state density, as measured by charge pumping, of about 8×1010 charges/cm2 or less, a peak mobility of about 250 cm2/V-s or greater and substantially no mobility degradation at about 6.0×1012 inversion charges/cm2 or greater.
摘要翻译：本发明提供具有高移动性和低界面电荷的栅堆叠结构，以及包括其的半导体器件，即金属氧化物半导体场效应晶体管（MOSFET）。在半导体器件中，本发明的栅极堆叠结构位于衬底和覆盖栅极导体之间。本发明还提供一种制造本发明的栅叠层结构的方法，其中采用了高温退火工艺（大约800℃）。在本发明中使用的高温退火提供了一种栅堆叠结构，其具有通过电荷泵浦测量的约8×10 10电荷/ cm 2的界面态密度或更少，约250cm 2 / Vs或更高的峰迁移率，并且在约6.0×10 12反转电荷/ cm 2处基本上没有迁移率降解，或更大。

22. 发明申请

US20060068097A1 METHOD FOR FORMING A PASSIVATED METAL LAYER 有权
标题翻译：形成钝化金属层的方法
公开(公告)号：US20060068097A1
公开(公告)日：2006-03-30
申请号：US10711717
申请日：2004-09-30
申请人： Hideaki Yamasaki , Kazuhito Nakamura , Yumiko Kawano , Gert Leusink , Fenton McFeely , Paul Jamison
发明人： Hideaki Yamasaki , Kazuhito Nakamura , Yumiko Kawano , Gert Leusink , Fenton McFeely , Paul Jamison
IPC分类号： C23C16/00
CPC分类号： H01L21/28556 , C23C16/16 , H01L21/28079 , H01L21/28247 , H01L21/76843 , H01L21/7685 , H01L21/76856 , H01L29/517
摘要： A method for forming a passivated metal layer that preserves the properties and morphology of an underlying metal layer during subsequent exposure to oxygen-containing ambients. The method includes providing a substrate in a process chamber, exposing the substrate to a process gas containing a rhenium-carbonyl precursor to deposit a rhenium metal layer on the substrate in a chemical vapor deposition process, and forming a passivation layer on the rhenium metal layer to thereby inhibit oxygen-induced growth of rhenium-containing nodules on the rhenium metal surface.
摘要翻译：用于形成钝化金属层的方法，其在随后暴露于含氧环境期间保持下面的金属层的性质和形态。该方法包括在处理室中提供衬底，将衬底暴露于含有铼 - 羰基前体的工艺气体，以在化学气相沉积工艺中在衬底上沉积铼金属层，以及在铼金属层上形成钝化层从而抑制铼金属表面上含铼结核的氧诱导生长。

23. 发明申请

US20050059259A1 Interfacial oxidation process for high-k gate dielectric process integration 有权
标题翻译：用于高k栅介质工艺集成的界面氧化工艺
公开(公告)号：US20050059259A1
公开(公告)日：2005-03-17
申请号：US10662875
申请日：2003-09-16
申请人： David O'Meara , Cory Wajda , Tsuyoshi Takahashi , Alessandro Callegari , Kristen Scheer , Sufi Zafar , Paul Jamison
发明人： David O'Meara , Cory Wajda , Tsuyoshi Takahashi , Alessandro Callegari , Kristen Scheer , Sufi Zafar , Paul Jamison
IPC分类号： H01L21/28 , H01L21/314 , H01L21/316 , H01L29/51 , H01L21/31 , H01L21/469
CPC分类号： H01L21/28185 , H01L21/02181 , H01L21/02233 , H01L21/02238 , H01L21/02255 , H01L21/02271 , H01L21/02304 , H01L21/28194 , H01L21/28202 , H01L21/3143 , H01L21/31604 , H01L21/31616 , H01L21/31637 , H01L21/31641 , H01L21/31645 , H01L21/31658 , H01L21/31662 , H01L29/513 , H01L29/517 , H01L29/518
摘要： A method is provided for forming a microstructure with an interfacial oxide layer by using a diffusion filter layer to control the oxidation properties of a substrate associated with formation of a high-k layer into the microstructure. The diffusion filter layer controls the oxidation of the surface. The interfacial oxide layer can be formed during an oxidation process that is carried out following deposition of a high-k layer onto the diffusion filter layer, or during deposition of a high-k layer onto the diffusion filter layer.
摘要翻译：提供了一种用于通过使用扩散过滤层来形成具有界面氧化物层的微观结构以控制与形成高k层的微结构相关联的衬底的氧化性能的方法。扩散过滤层控制表面的氧化。可以在氧化过程中形成界面氧化物层，该氧化过程在沉积高k层到扩散过滤层上之后或在沉积高k层到扩散过滤层上之后进行。

24. 发明申请

US20050051854A1 STRUCTURE AND METHOD FOR METAL REPLACEMENT GATE OF HIGH PERFORMANCE 有权
标题翻译：高性能金属替代门的结构与方法
公开(公告)号：US20050051854A1
公开(公告)日：2005-03-10
申请号：US10605106
申请日：2003-09-09
申请人： Cyril Cabral , Paul Jamison , Victor Ku , Ying Li , Vijay Narayanan , An Steegen , Yun-Yu Wang , Kwong Wong
发明人： Cyril Cabral , Paul Jamison , Victor Ku , Ying Li , Vijay Narayanan , An Steegen , Yun-Yu Wang , Kwong Wong
IPC分类号： H01L21/28 , H01L21/336 , H01L29/49 , H01L21/20 , H01L21/8234 , H01L29/76 , H01L31/062
CPC分类号： H01L29/66545 , H01L21/28079 , H01L29/4958
摘要： A structure and method for a metal replacement gate of a high performance device is provided. A sacrificial gate structure is first formed on an etch stop layer provided on a semiconductor substrate. A pair of spacers is provided on sidewalls of the sacrificial gate structure. The sacrificial gate structure is then removed, forming an opening. Subsequently, a metal gate including an first layer of metal such as tungsten, a diffusion barrier such as titanium nitride, and a second layer of metal such as tungsten is formed in the opening between the spacers.
摘要翻译：提供了一种用于高性能器件的金属替换栅极的结构和方法。首先在设置在半导体衬底上的蚀刻停止层上形成牺牲栅极结构。在牺牲栅极结构的侧壁上设置一对间隔物。然后去除牺牲栅极结构，形成开口。随后，在间隔件之间的开口中形成包括诸如钨的第一金属层的金属栅，诸如氮化钛的扩散阻挡层和诸如钨的第二金属层。

25. 发明申请

US20100212232A1 UNIFIED MULTIPLE USE STADIUM STRUCTURE 审中-公开
标题翻译：统一多用途体系结构
公开(公告)号：US20100212232A1
公开(公告)日：2010-08-26
申请号：US12713858
申请日：2010-02-26
申请人： John Paul Jamison
发明人： John Paul Jamison
IPC分类号： E04H3/12 , E04H3/10
CPC分类号： E04H3/14
摘要： A unified multiple-use stadium has multiple fields or other areas for putting on various types of sporting events or other performances sequentially or simultaneously. A racetrack surrounds the fields or other areas. A unifying structure in the center of the stadium allows for simultaneous viewing of different areas and sporting events. Walkways extend from the unifying structure and between bleachers for the different fields or other areas. A drag strip and return area extend in one direction from the unifying structure. Exterior bleachers surround the racetrack. The types of fields and areas can vary, but can include a grass field, a dirt field, a sand and water area, and a concrete pad. There may be additional areas for extending these areas. The interior bleachers are transforming bleachers that can be lowered into the ground or raised to tapered or fully extended positions to accommodate different types of sporting events.
摘要翻译：统一的多用途体育场有多个领域或其他领域，依次或同时进行各种体育赛事或其他表演。赛马场围绕田野或其他地区。体育馆中心的统一结构允许同时观看不同的地区和体育赛事。人行道从统一的结构和不同领域或其他地区的漂白者之间延伸。拖带和返回区域从统一结构向一个方向延伸。外观漂白者围绕赛马场。领域和地区的种类可以有所不同，但可以包括草地，泥土，沙滩和水域以及混凝土垫。可能还有其他领域扩大这些地区。内部漂白剂正在改造漂白机，可以将其降落到地面或升高至锥形或完全伸展的位置，以适应不同类型的体育赛事。

26. 发明申请

US20060102968A1 Nitrogen-containing field effect transistor gate stack containing a threshold voltage control layer formed via deposition of a metal oxide 失效
标题翻译：包含通过沉积金属氧化物形成的阈值电压控制层的含氮场效应晶体管栅叠层
公开(公告)号：US20060102968A1
公开(公告)日：2006-05-18
申请号：US10988733
申请日：2004-11-15
申请人： Nestor Bojarczuk , Cyril Cabral , Eduard Cartier , Martin Frank , Evgeni Gousev , Supratik Guha , Paul Jamison , Rajarao Jammy , Vijay Narayanan , Vamsi Paruchuri
发明人： Nestor Bojarczuk , Cyril Cabral , Eduard Cartier , Martin Frank , Evgeni Gousev , Supratik Guha , Paul Jamison , Rajarao Jammy , Vijay Narayanan , Vamsi Paruchuri
IPC分类号： H01L29/94
CPC分类号： H01L29/513 , H01L21/28194 , H01L21/2822 , H01L21/823828 , H01L21/823857 , H01L29/495 , H01L29/4966 , H01L29/4975 , H01L29/517 , H01L29/518
摘要： A semiconductor structure is provided that includes a Vt stabilization layer between a gate dielectric and a gate electrode. The Vt stabilization layer is capable of stabilizing the structure's threshold voltage and flatband voltage to a targeted value and comprises a nitrided metal oxide, or a nitrogen-free metal oxide, with the proviso that when the Vt stabilization layer comprises a nitrogen-free metal oxide, at least one of the semiconductor substrate or the gate dielectric includes nitrogen. The present invention also provides a method of fabricating such a structure.
摘要翻译：提供了一种半导体结构，其包括在栅极电介质和栅电极之间的V 1稳定层。 VST稳定层能够将结构的阈值电压和平带电压稳定到目标值，并且包括氮化金属氧化物或无氮金属氧化物，条件是当V < 稳定层包括无氮金属氧化物，半导体衬底或栅极电介质中的至少一个包括氮。本发明还提供一种制造这种结构的方法。

27. 发明申请

US20050156257A1 Complementary metal oxide semiconductor (CMOS) gate stack with high dielectric constant gate dielectric and integrated diffusion barrier 有权
公开(公告)号：US20050156257A1
公开(公告)日：2005-07-21
申请号：US11066762
申请日：2005-02-28
申请人： Nestor Bojarczuk , Kevin Chan , Christopher D'Emic , Evgeni Gousev , Supratik Guha , Paul Jamison , Lars-Ake Ragnarsson
发明人： Nestor Bojarczuk , Kevin Chan , Christopher D'Emic , Evgeni Gousev , Supratik Guha , Paul Jamison , Lars-Ake Ragnarsson
IPC分类号： H01L21/8238 , H01L27/108 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/513 , H01L21/28194
摘要： A diffusion barrier (and method for forming the diffusion barrier) for a field-effect transistor having a channel region and a gate electrode, includes an insulating material being disposed over the channel region. The insulating material includes nitrogen (N), and is disposed under the gate electrode. The insulating material can be provided either as a layer or distributed within a gate dielectric material disposed under the gate electrode.

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