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21. 发明授权

US07853840B2 Semiconductor memory device and methods thereof 有权
标题翻译：半导体存储器件及其方法
公开(公告)号：US07853840B2
公开(公告)日：2010-12-14
申请号：US11702569
申请日：2007-02-06
申请人： Min-Sang Park , Jeong-Don Lim , Youn-Sik Park
发明人： Min-Sang Park , Jeong-Don Lim , Youn-Sik Park
IPC分类号： G11C29/00 , G01R31/28 , G01R31/26 , G06F17/50
CPC分类号： G11C7/1039 , G11C7/1072 , G11C8/18 , G11C29/20 , G11C2029/3602 , G11C2207/2245
摘要： A semiconductor memory device and methods thereof are provided. The example semiconductor memory device may include an internal address generating circuit operating in accordance with a first addressing protocol during normal operation and operating in accordance with a second addressing protocol during a test operation, the first addressing protocol associated with a first number of clock cycles for transferring a memory address and the second addressing protocol associated with a second number of clock cycles for transferring a memory address, the first number of clock cycles being greater than the second number of clock cycles. An example method may for achieving an single pumped address (SPA) mode in a semiconductor memory device configured for a double pumped address (DPA) mode may include receiving a first external address, generating a first internal address corresponding to the received first external address, receiving a second external address, generating a second internal address corresponding to the received second external address and delaying the generation of the first internal address to reduce a clock cycle interval between the generated first and second internal addresses.
摘要翻译：提供半导体存储器件及其方法。示例性半导体存储器件可以包括在正常操作期间根据第一寻址协议操作并且在测试操作期间根据第二寻址协议操作的内部地址产生电路，与第一数量的时钟周期相关联的第一寻址协议用于传送存储器地址和与第二数量的时钟周期相关联的用于传送存储器地址的第二寻址协议，第一数量的时钟周期大于第二数量的时钟周期。在针对双抽取地址（DPA）模式配置的半导体存储器件中实现单个泵浦地址（SPA）模式的示例性方法可包括：接收第一外部地址，产生对应于所接收的第一外部地址的第一内部地址，接收第二外部地址，产生对应于所接收的第二外部地址的第二内部地址，并延迟第一内部地址的产生，以减小所生成的第一和第二内部地址之间的时钟周期间隔。

22. 发明授权

US07366822B2 Semiconductor memory device capable of reading and writing data at the same time 有权
标题翻译：能够同时读取和写入数据的半导体存储器件
公开(公告)号：US07366822B2
公开(公告)日：2008-04-29
申请号：US10840268
申请日：2004-05-07
申请人： Jin-Seok Kwak , Young-Hyun Jun , Seong-Jin Jang , Sang-Bo Lee , Min-Sang Park , Chul-Soo Kim
发明人： Jin-Seok Kwak , Young-Hyun Jun , Seong-Jin Jang , Sang-Bo Lee , Min-Sang Park , Chul-Soo Kim
IPC分类号： G06F12/00 , G11C8/00
CPC分类号： G11C7/1066 , G11C7/1072 , G11C11/4082 , G11C11/4087
摘要： A semiconductor memory device includes a plurality of banks. A data path may be divided into a read data path and a write data path, therefore, parallel processing of write and read commands are possible. The semiconductor memory device may include an address bank buffer, address buffer, column predecoder and/or a decoder. The semiconductor memory device may begin execution of a write command in a bank in one clock cycle and begin execution of a read command in the following clock cycle, therefore, bus efficiency is increased and/or write-to-read turn around time is reduced.
摘要翻译：半导体存储器件包括多个存储体。数据路径可以被划分为读取数据路径和写入数据路径，因此并行处理写入和读取命令是可能的。半导体存储器件可以包括地址库缓冲器，地址缓冲器，列预解码器和/或解码器。半导体存储器件可以在一个时钟周期内开始执行存储体中的写入命令，并且在随后的时钟周期开始执行读取命令，因此总线效率增加和/或写入读取时间减少。

23. 发明授权

US07187615B2 Methods of selectively activating word line segments enabled by row addresses and semiconductor memory devices having partial activation commands of word line 失效
标题翻译：选择性地激活由行地址启用的字线段和具有字线的部分激活命令的半导体存储器件的方法
公开(公告)号：US07187615B2
公开(公告)日：2007-03-06
申请号：US10943514
申请日：2004-09-17
申请人： Min-Sang Park , Yu-Lim Lee , Seong-Jin Jang
发明人： Min-Sang Park , Yu-Lim Lee , Seong-Jin Jang
IPC分类号： G11C8/00
CPC分类号： G11C8/12
摘要： A method for activating a word line segment of a semiconductor memory selected based on a row address provided to the memory can include activating a first word line segment selected by a row address and a command type and avoiding activating a second word line segment selected by the row address. Related devices are also disclosed.
摘要翻译：用于激活基于提供给存储器的行地址选择的半导体存储器的字线段的方法可以包括激活由行地址和命令类型选择的第一字线段，并且避免激活由第二字线段选择的第二字线段行地址。还公开了相关设备。

24. 发明授权

US07110276B2 Integrated circuit memory devices reducing propagation delay differences between signals transmitted to separate spaced-apart memory blocks therein 有权
标题翻译：集成电路存储器件减少传输到其间分离的间隔开的存储器块的信号之间的传播延迟差异
公开(公告)号：US07110276B2
公开(公告)日：2006-09-19
申请号：US10855121
申请日：2004-05-27
申请人： Min-Sang Park
发明人： Min-Sang Park
IPC分类号： G11C5/06
CPC分类号： G11C5/063
摘要： Integrated circuit memory devices can include a plurality of conductor paths that are electrically coupled to all memory blocks included in separate memory arrays of the device and are configured for access together during a read or write operation. All of the conductor paths are configured to reduce differences in propagation delays of signals conducted thereon.
摘要翻译：集成电路存储器件可以包括多个导体路径，其电连接到包括在该设备的分离的存储器阵列中的所有存储器块，并被配置为在读取或写入操作期间一起访问。所有导体路径被配置为减少在其上传导的信号的传播延迟的差异。

25. 发明申请

US20060146265A1 Liquid crystal display 失效
标题翻译：液晶显示器
公开(公告)号：US20060146265A1
公开(公告)日：2006-07-06
申请号：US11297661
申请日：2005-12-09
申请人： Min-Sang Park
发明人： Min-Sang Park
IPC分类号： G02F1/1339
CPC分类号： G02F1/13394 , G02F1/133512 , G02F1/133514 , G02F1/1341
摘要： A liquid crystal display comprises a lower substrate, multiple seal patterns formed on the lower substrate and including spacers and sealant, and an upper substrate sealed by the multiple seal patterns. Spacers of one seal pattern, formed on wiring, of the multiple seal patterns comprise conductive spacers so that conductivity is improved while a cell gap between two substrates is stably maintained by sealing the substrates using a conductive seal pattern and a seal pattern for maintaining the gap. Furthermore, the liquid crystal display is capable of maintaining a cell gap between the two substrates more stably by forming black matrices on a front surface of the substrate in a pixel region of the liquid crystal display, thereby relieving a bump on the upper substrate.
摘要翻译：液晶显示器包括下基板，形成在下基板上并包括间隔件和密封剂的多个密封图案以及由多个密封图案密封的上基板。在多个密封图案的布线上形成的一个密封图案的间隔件包括导电间隔物，从而通过使用导电密封图案和用于保持间隙的密封图案来密封基板来稳定地维持两个基板之间的电池间隙，导电性得到改善。此外，液晶显示器能够通过在液晶显示器的像素区域中的基板的前表面上形成黑色矩阵来更稳定地保持两个基板之间的单元间隙，从而减轻了上基板上的凸块。

26. 发明申请

US20050054155A1 Semiconductor device having fuse circuit on cell region and method of fabricating the same 有权
标题翻译：在单元区域具有熔丝电路的半导体器件及其制造方法
公开(公告)号：US20050054155A1
公开(公告)日：2005-03-10
申请号：US10971374
申请日：2004-10-22
申请人： Young-Hee Song , Ill-Heung Choi , Min-Young Son , Min-Sang Park
发明人： Young-Hee Song , Ill-Heung Choi , Min-Young Son , Min-Sang Park
IPC分类号： H01L21/3205 , H01L21/60 , H01L21/82 , H01L23/52 , H01L23/525 , H01L27/02 , H01L27/10 , H01L27/108 , G11C5/00 , H01L21/336 , H01L21/8234 , H01L21/8244
CPC分类号： H01L24/05 , H01L23/5258 , H01L24/03 , H01L24/45 , H01L24/48 , H01L27/10897 , H01L2224/04042 , H01L2224/05155 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/451 , H01L2224/45144 , H01L2224/48463 , H01L2224/48599 , H01L2224/48624 , H01L2224/48644 , H01L2224/48647 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/0105 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/04941 , H01L2924/12042 , H01L2924/19041 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor device, capable of improving integration density and solving problems that may occur in a laser repair process, and a method of fabricating the same are provided. A fuse circuit is formed in a cell region, not in a peripheral region, and thus it is possible to reduce the size of a semiconductor chip.
摘要翻译：提供能够提高集成密度并解决激光修复过程中可能发生的问题的半导体器件及其制造方法。在单元区域中形成熔丝电路，而不是在周边区域，因此可以减小半导体芯片的尺寸。

27. 发明授权

US09711487B2 Method and device for controlling operation using temperature deviation in multi-chip package 有权
公开(公告)号：US09711487B2
公开(公告)日：2017-07-18
申请号：US15007243
申请日：2016-01-27
申请人： Min-Sang Park
发明人： Min-Sang Park
IPC分类号： H01L31/058 , H01L25/065 , H01L23/34 , H01L23/00
CPC分类号： H01L25/0657 , G06F13/00 , G11C11/40626 , H01L23/34 , H01L24/48 , H01L25/18 , H01L2224/45099 , H01L2224/48137 , H01L2225/06544 , H01L2225/06589 , H01L2225/06596 , H01L2924/00014 , H01L2924/1436
摘要： A multi-chip package includes a first die having temperature sensors and a second die. The first die generates temperature deviation information of m (m

28. 发明申请

US20160300816A1 METHOD AND DEVICE FOR CONTROLLING OPERATION USING TEMPERATURE DEVIATION IN MULTI-CHIP PACKAGE 有权
标题翻译：用于使用多芯片包装中的温度偏差来控制操作的方法和装置
公开(公告)号：US20160300816A1
公开(公告)日：2016-10-13
申请号：US15007243
申请日：2016-01-27
申请人： MIN-SANG PARK
发明人： MIN-SANG PARK
IPC分类号： H01L25/065 , H01L27/108 , H01L23/34
CPC分类号： H01L25/0657 , G06F13/00 , G11C11/40626 , H01L23/34 , H01L24/48 , H01L25/18 , H01L2224/45099 , H01L2224/48137 , H01L2225/06544 , H01L2225/06589 , H01L2225/06596 , H01L2924/00014 , H01L2924/1436
摘要： A multi-chip package includes a first die having temperature sensors and a second die. The first die generates temperature deviation information of m (m
摘要翻译：多芯片封装包括具有温度传感器和第二管芯的第一管芯。基于由温度传感器产生的n位的温度信息，第一个管芯产生m（m

29. 发明申请

US20080061205A1 PORTABLE FOLDING-TYPE CRADLE 审中-公开
标题翻译：便携式折叠式包装
公开(公告)号：US20080061205A1
公开(公告)日：2008-03-13
申请号：US11775404
申请日：2007-07-10
申请人： Min-Sang PARK , Seng-Ho AHN
发明人： Min-Sang PARK , Seng-Ho AHN
IPC分类号： F16M13/00
CPC分类号： H04M1/04 , A47B2023/049 , H04M1/0214 , H04M1/0247
摘要： A portable folding-type cradle is provided. The portable folding-type cradle includes a first cradle body, a second cradle body which is folded to or unfolded from the first cradle body, a hinge unit which couples the second cradle body to the first cradle body, a locking means which is formed in the hinge unit and gradually locks the folded state of the second cradle body by interference according to the extent of rotation of the second cradle body. At least one means is provided in the first cradle body to stably support the cradled state of a portable terminal by preventing sliding of the portable terminal and to adjust the inclination of the portable terminal in the cradled state.
摘要翻译：提供便携式折叠式支架。便携式折叠式支架包括第一托架体，从第一托架体折叠或展开的第二托架体，将第二托架体连接到第一托架体的铰链单元，形成在第一支架主体中的锁定装置铰链单元，并且根据第二托架体的旋转程度的干涉逐渐锁定第二托架体的折叠状态。在第一支架体中设置至少一个装置，通过防止便携式终端的滑动并且调节便携式终端在收起状态的倾斜度来稳定地支持便携式终端的托架状态。

30. 发明授权

US07142021B2 Data inversion circuits having a bypass mode of operation and methods of operating the same 有权
标题翻译：具有旁路操作模式的数据反转电路及其操作方法
公开(公告)号：US07142021B2
公开(公告)日：2006-11-28
申请号：US10991076
申请日：2004-11-17
申请人： Min-sang Park
发明人： Min-sang Park
IPC分类号： H03K19/20
CPC分类号： H03K19/00346 , H03K19/00361
摘要： An integrated circuit device includes a data inversion circuit configured to support an inversion mode of operation. The inversion mode of operation inverts selected ones of a plurality of N-bit words received in consecutive sequence at inputs thereof. The data inversion circuit is further configured to support a bypass mode of operation. The bypass mode of operation disables inversion of a second one of the plurality of N-bit words when a delay between receipt of the second one of the plurality of N-bit words and receipt of an immediately preceding first one of the plurality of N-bit words is greater than a predetermined time interval. Related methods are also discussed.
摘要翻译：集成电路装置包括配置为支持反转操作模式的数据反转电路。反转操作模式反转在其输入处以连续顺序接收的多个N位字中选定的一个。数据反转电路还被配置为支持旁路操作模式。旁路操作模式在接收到多个N位字中的第二个N位字之间的延迟和接收多个N位字之中的前一个第一个之前的第一个N位字时，位字大于预定时间间隔。还讨论了相关方法。

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