专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明授权

US07956393B2 Composition for photoresist stripper and method of fabricating thin film transistor array substrate 有权
标题翻译：用于光致抗蚀剂剥离剂的组合物和制造薄膜晶体管阵列基板的方法
公开(公告)号：US07956393B2
公开(公告)日：2011-06-07
申请号：US12564019
申请日：2009-09-21
申请人： Jong-Hyun Choung , Bong-Kyun Kim , Hong-Sick Park , Sun-Young Hong , Young-Joo Choi , Byeong-Jin Lee , Nam-Seok Suh , Byung-Uk Kim , Suk-Il Yoon , Jong-Hyun Jeong , Sung-Gun Shin , Soon-Beom Huh , Se-Hwan Jung , Doo-Young Jang , Sun-Joo Park , Oh-Hwan Kweon
发明人： Jong-Hyun Choung , Bong-Kyun Kim , Hong-Sick Park , Sun-Young Hong , Young-Joo Choi , Byeong-Jin Lee , Nam-Seok Suh , Byung-Uk Kim , Suk-Il Yoon , Jong-Hyun Jeong , Sung-Gun Shin , Soon-Beom Huh , Se-Hwan Jung , Doo-Young Jang , Sun-Joo Park , Oh-Hwan Kweon
IPC分类号： H01L31/062 , H01L31/113
CPC分类号： G03F7/425 , H01L27/124 , H01L27/1288
摘要： A composition for a photoresist stripper and a method of fabricating a thin film transistor array substrate are provided according to one or more embodiments. In one or more embodiments, the composition includes about 5-30 weight % of a chain amine compound, about 0.5-10 weight % of a cyclic amine compound, about 10-80 weight % of a glycol ether compound, about 5-30 weight % of distilled water, and about 0.1-5 weight % of a corrosion inhibitor.
摘要翻译：根据一个或多个实施方案提供了用于光致抗蚀剂剥离剂的组合物和制造薄膜晶体管阵列基板的方法。在一个或多个实施方案中，组合物包含约5-30重量％的链胺化合物，约0.5-10重量％的环胺化合物，约10-80重量％的二醇醚化合物，约5-30重量％％的蒸馏水和约0.1-5重量％的腐蚀抑制剂。

22. 发明授权

US07816712B2 Thin film transistor array and method of manufacturing the same 有权
标题翻译：薄膜晶体管阵列及其制造方法
公开(公告)号：US07816712B2
公开(公告)日：2010-10-19
申请号：US11986330
申请日：2007-11-20
申请人： Jong-Hyun Choung , Hong-Sick Park , Joo-Ae Youn , Sun-Young Hong , Bong-Kyun Kim , Won-Suk Shin , Byeong-Jin Lee
发明人： Jong-Hyun Choung , Hong-Sick Park , Joo-Ae Youn , Sun-Young Hong , Bong-Kyun Kim , Won-Suk Shin , Byeong-Jin Lee
IPC分类号： H01L31/113
CPC分类号： H01L27/124 , H01L27/1214 , H01L27/1255 , H01L27/1288 , H01L29/4908
摘要： A thin film transistor array and method of manufacturing the same include a pixel electrode formed of a transparent conductive layer on a substrate, a gate line formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate electrode connected to the gate line and formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate insulating layer which covers the gate line and the gate electrode, a semiconductor layer formed on the gate insulating layer to overlap the gate electrode, a data line which intersects the gate line, a source electrode connected to the data line to overlap a part of the semiconductor layer, and a drain electrode connected to the pixel electrode to overlap a part of the semiconductor layer.
摘要翻译：薄膜晶体管阵列及其制造方法包括由基板上的透明导电层形成的像素电极，由透明导电层形成的栅极线和基板上的不透明导电层，连接到栅极的栅电极并且在基板上形成透明导电层和不透明导电层，覆盖栅极线和栅极的栅极绝缘层，形成在栅极绝缘层上以与栅电极重叠的半导体层，数据线，与栅极线相交，连接到数据线的源电极与半导体层的一部分重叠，以及连接到像素电极以与半导体层的一部分重叠的漏电极。

23. 发明申请

US20100155730A1 THIN FILM TRANSISTOR DISPLAY PANEL AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：薄膜晶体管显示面板及其制造方法
公开(公告)号：US20100155730A1
公开(公告)日：2010-06-24
申请号：US12481158
申请日：2009-06-09
申请人： Sun-Young HONG , Young-Joo CHOI , Nam-Seok SUH , Hong-Sick PARK , Jong-Hyun CHOUNG , Bong-Kyun KIM , Byeong-Jin LEE
发明人： Sun-Young HONG , Young-Joo CHOI , Nam-Seok SUH , Hong-Sick PARK , Jong-Hyun CHOUNG , Bong-Kyun KIM , Byeong-Jin LEE
IPC分类号： H01L33/00 , H01L21/336 , H01L29/786
CPC分类号： H01L27/1288 , H01L27/1214 , H01L27/1225 , H01L27/1255
摘要： In the manufacturing process of the thin film transistor array panel according to an exemplary embodiment of the present invention using three masks, the metal oxide semiconductor or the transparent conductive oxide is used, thereby executing an efficient lift-off process.
摘要翻译：在根据使用三个掩模的本发明的示例性实施例的薄膜晶体管阵列面板的制造过程中，使用金属氧化物半导体或透明导电氧化物，从而执行有效的剥离处理。

24. 发明申请

US20100149476A1 DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：显示基板及其制造方法
公开(公告)号：US20100149476A1
公开(公告)日：2010-06-17
申请号：US12534300
申请日：2009-08-03
申请人： Do-Hyun KIM , Jong-Hyun CHOUNG , Young-Joo CHOI , Hong-Sick PARK , Tae-Hyung IHN , Dong-Hoon LEE , Pil-Sang YUN , Je-Hyeong PARK , Chang-Oh JEONG , Je-Hun LEE , Sun-Young HONG , Bong-Kyun KIM , Byeong-Jin LEE , Nam-Seok SUH
发明人： Do-Hyun KIM , Jong-Hyun CHOUNG , Young-Joo CHOI , Hong-Sick PARK , Tae-Hyung IHN , Dong-Hoon LEE , Pil-Sang YUN , Je-Hyeong PARK , Chang-Oh JEONG , Je-Hun LEE , Sun-Young HONG , Bong-Kyun KIM , Byeong-Jin LEE , Nam-Seok SUH
IPC分类号： G02F1/1333 , B05D5/12 , B44C1/22
CPC分类号： G02F1/136286 , G02F2001/133302 , G02F2001/136295
摘要： A display substrate includes; a base substrate, a deformation preventing layer disposed on a lower surface of the base substrate, wherein the deformation preventing layer applies a force to the base substrate to prevent the base substrate from bending, a gate line disposed on an upper surface of the base substrate, a data line disposed on the base substrate, and a pixel electrode disposed on the base substrate.
摘要翻译：显示基板包括：基底基板，设置在基底基板的下表面的变形防止层，其中变形防止层向基底基板施加力以防止基底基板弯曲，设置在基底基板的上表面上的栅极线设置在基底基板上的数据线，以及配置在基底基板上的像素电极。

25. 发明申请

US20090121228A1 ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：阵列基板及其制造方法
公开(公告)号：US20090121228A1
公开(公告)日：2009-05-14
申请号：US12269748
申请日：2008-11-12
申请人： Jang-Soo Kim , Hong-Long Ning , Bong-Kyun Kim , Hong-Sick Park , Shi-Yul Kim , Chang-Oh Jeong , Sang-Gab Kim , Jae-Hyoung Youn , Woo-Geun Lee , Yang-Ho Bae , Pil-Sang Yun , Jong-Hyun Choung , Sun-Young Hong , Ki-Won Kim , Byeong-Jin Lee , Yopung-Wook Lee , Jong-In Kim , Byeong-Beom Kim , Nam-Seok Suh
发明人： Jang-Soo Kim , Hong-Long Ning , Bong-Kyun Kim , Hong-Sick Park , Shi-Yul Kim , Chang-Oh Jeong , Sang-Gab Kim , Jae-Hyoung Youn , Woo-Geun Lee , Yang-Ho Bae , Pil-Sang Yun , Jong-Hyun Choung , Sun-Young Hong , Ki-Won Kim , Byeong-Jin Lee , Yopung-Wook Lee , Jong-In Kim , Byeong-Beom Kim , Nam-Seok Suh
IPC分类号： H01L29/04 , H01L21/336
CPC分类号： G02F1/13458 , G02F1/136286 , G02F2001/136295 , H01L27/1218 , H01L27/124 , H01L27/1288
摘要： A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is formed through the second insulation layer in a direction crossing the gate line. A data line includes a second seed layer formed below the line trench and a second metal layer formed in the line trench. A pixel electrode is formed in a pixel area of the base substrate. Therefore, a trench of a predetermined depth is formed using an insulation layer and a metal layer is formed through a plating method, so that a metal line having a sufficient thickness may be formed.
摘要翻译：栅极线包括形成在基底基板上的第一籽晶层和形成在第一籽晶层上的第一金属层。在基底基板上形成第一绝缘层。在基底基板上形成第二绝缘层。这里，在与栅极线交叉的方向上通过第二绝缘层形成线沟槽。数据线包括形成在线沟槽下方的第二晶种层和形成在线沟槽中的第二金属层。像素电极形成在基底基板的像素区域中。因此，使用绝缘层形成预定深度的沟槽，并且通过电镀方法形成金属层，从而可以形成具有足够厚度的金属线。

26. 发明申请

US20080224092A1 Etchant for metal 审中-公开
标题翻译：金属蚀刻剂
公开(公告)号：US20080224092A1
公开(公告)日：2008-09-18
申请号：US12075966
申请日：2008-03-14
申请人： Jong-Hyun CHOUNG , Hong-Sick PARK , Sun-Young HONG , Bong-Kyun KIM , Byeong-Jin LEE , Ji-Sun LEE , Ki-Beom LEE , Sam-Young CHO , Byung-Soo KU , Hyun-Cheol SHIN , Kwi-Hong PARK , Won-Guk SEO
发明人： Jong-Hyun CHOUNG , Hong-Sick PARK , Sun-Young HONG , Bong-Kyun KIM , Byeong-Jin LEE , Ji-Sun LEE , Ki-Beom LEE , Sam-Young CHO , Byung-Soo KU , Hyun-Cheol SHIN , Kwi-Hong PARK , Won-Guk SEO
IPC分类号： C09K13/08 , C09K13/00
CPC分类号： C23F1/14 , H01L21/32134
摘要： An etchant for a metal is described. In one example, the etchant includes ammonium persulfate ((NH4)2S2O8), an azole compound and water. The etchant does not include hydrogen peroxide. Thus, the etchant may etch a metal layer including copper so that an etched copper layer has a tapered profile. Furthermore, the etchant may have a high stability to maintain etching ability for a longer time. Thus, manufacturing margins may be improved so that manufacturing costs may be reduced.
摘要翻译：描述了金属的蚀刻剂。在一个实例中，蚀刻剂包括过硫酸铵（（NH 3）2 S 2 O 2 O 8），唑化合物和水。蚀刻剂不包括过氧化氢。因此，蚀刻剂可以蚀刻包括铜的金属层，使得蚀刻的铜层具有锥形轮廓。此外，蚀刻剂可能具有高的稳定性，以保持较长时间的蚀刻能力。因此，可以提高制造裕度，从而可以降低制造成本。

27. 发明申请

US20080092925A1 REMOVING PHOTORESIST FROM SUBSTRATES BY MEANS OF TREATMENT LIQUID, AND PROCESSING TREATEMENT LIQUID WITH OZONE 审中-公开
标题翻译：通过处理液从基材中除去光电子体，并用OZONE处理液体
公开(公告)号：US20080092925A1
公开(公告)日：2008-04-24
申请号：US11874013
申请日：2007-10-17
申请人： Sun-young Hong , Hong-sick Park , Jong-hyun Choung , Bong-kyun Kim , Won-suk Shin , Byeong-jin Lee , Tai-bin Im
发明人： Sun-young Hong , Hong-sick Park , Jong-hyun Choung , Bong-kyun Kim , Won-suk Shin , Byeong-jin Lee , Tai-bin Im
IPC分类号： B08B5/04
CPC分类号： H01L21/6708 , G03F7/423
摘要： A substrate is inclined when treatment liquid is ejected onto the substrate to remove photoresist from the substrate. Uniform processing of the substrate with the treatment liquid and collection of the treatment liquid are thus facilitated. Collected treatment liquid is treated with ozone and then reused.
摘要翻译：当将处理液喷射到基板上以从基板去除光致抗蚀剂时，基板倾斜。因此，利用处理液对基板进行均匀加工，并且处理液的收集便于此。收集的处理液用臭氧处理，然后再使用。

28. 发明申请

US20070278487A1 Thin film transistor substrate and method of manufacturing thereof 有权
标题翻译：薄膜晶体管基板及其制造方法
公开(公告)号：US20070278487A1
公开(公告)日：2007-12-06
申请号：US11706012
申请日：2007-02-12
申请人： Jong Hyun Choung , Hong Sick Park , Sun Young Hong , Bong Kyun Kim , Bong Kyu Shin , Won Suk Shin , Byeong Jin Lee
发明人： Jong Hyun Choung , Hong Sick Park , Sun Young Hong , Bong Kyun Kim , Bong Kyu Shin , Won Suk Shin , Byeong Jin Lee
IPC分类号： H01L33/00
CPC分类号： H01L27/1288 , H01L27/124 , H01L27/1248
摘要： A thin film transistor substrate and a method of manufacturing the thin film transistor substrate comprises forming a gate line and a data line intersecting each other with a gate insulating layer interposed and defining a pixel area on the substrate, a thin film transistor electrically connected to the gate line and the data line, and a stepped-structure occurring pattern overlapping at least one of the gate line and the data line; forming a passivation layer having a stepped-structure portion formed by the stepped-structure occurring pattern on the substrate; forming a photoresist pattern having a second stepped-structure portion corresponding to the stepped-structure portion on the passivation layer; patterning the passivation layer using the photoresist pattern as a mask; forming a transparent conductive layer on the substrate; and removing the photoresist pattern where the transparent conductive layer is covered by a stripper penetrating through the stepped-structure portion of the photoresist pattern and forming a pixel electrode connected to the thin film transistor.
摘要翻译：薄膜晶体管基板和薄膜晶体管基板的制造方法包括形成栅极线和数据线，该栅极线和数据线被插入并且限定基板上的像素区域的栅极绝缘层彼此相交，薄膜晶体管电连接到栅极线和数据线，以及与栅极线和数据线中的至少一个重叠的阶梯结构发生图案; 在所述基板上形成具有由阶梯状结构发生图案形成的台阶状部分的钝化层; 形成具有对应于所述钝化层上的阶梯状结构部分的第二阶梯结构部分的光致抗蚀剂图案; 使用光致抗蚀剂图案作为掩模来图案化钝化层; 在所述基板上形成透明导电层; 以及去除透明导电层被穿透光致抗蚀剂图案的台阶结构部分的剥离剂覆盖的光致抗蚀剂图案，并形成连接到薄膜晶体管的像素电极。

29. 发明授权

US08354288B2 Etchant and method of manufacturing an array substrate using the same 有权
标题翻译：蚀刻剂和使用其制造阵列基板的方法
公开(公告)号：US08354288B2
公开(公告)日：2013-01-15
申请号：US13566239
申请日：2012-08-03
申请人： Bong-Kyun Kim , Jong-Hyun Choung , Byeong-Jin Lee , Sun-Young Hong , Hong-Sick Park , Shi-Yul Kim , Ki-Beom Lee , Sam-Young Cho , Sang-Woo Kim , Hyun-Cheol Shin , Won-Guk Seo
发明人： Bong-Kyun Kim , Jong-Hyun Choung , Byeong-Jin Lee , Sun-Young Hong , Hong-Sick Park , Shi-Yul Kim , Ki-Beom Lee , Sam-Young Cho , Sang-Woo Kim , Hyun-Cheol Shin , Won-Guk Seo
IPC分类号： H01L21/461
CPC分类号： C23F1/26 , C23F1/18 , H01L21/32134 , H01L27/124 , H01L29/458
摘要： An etchant includes about 0.1 percent by weight to about 30 percent by weight of ammonium persulfate (NH4)2S2O8, about 0.1 percent by weight to about 10 percent by weight of an inorganic acid, about 0.1 percent by weight to about 10 percent by weight of an acetate salt, about 0.01 percent by weight to about 5 percent by weight of a fluorine-containing compound, about 0.01 percent by weight to about 5 percent by weight of a sulfonic acid compound, about 0.01 percent by weight to about 2 percent by weight of an azole compound, and a remainder of water. Accordingly, the etchant may have high stability to maintain etching ability. Thus, manufacturing margins may be improved so that manufacturing costs may be reduced.
摘要翻译：蚀刻剂包括约0.1重量％至约30重量％的过硫酸铵（NH 4）2 S 2 O 8，约0.1重量％至约10重量％的无机酸，约0.1重量％至约10重量％约0.01重量％至约5重量％的含氟化合物的乙酸盐，约0.01重量％至约5重量％的磺酸化合物，约0.01重量％至约2重量％的唑类化合物，剩余的水。因此，蚀刻剂可能具有高稳定性以保持蚀刻能力。因此，可以提高制造裕度，从而可以降低制造成本。

30. 发明授权

US08173494B2 Thin film transistor array and method of manufacturing the same 失效
标题翻译：薄膜晶体管阵列及其制造方法
公开(公告)号：US08173494B2
公开(公告)日：2012-05-08
申请号：US12890324
申请日：2010-09-24
申请人： Jong-Hyun Choung , Hong-Sick Park , Joo-Ae Youn , Sun-Young Hong , Bong-Kyun Kim , Won-Suk Shin , Byeong-Jin Lee
发明人： Jong-Hyun Choung , Hong-Sick Park , Joo-Ae Youn , Sun-Young Hong , Bong-Kyun Kim , Won-Suk Shin , Byeong-Jin Lee
IPC分类号： H01L21/00
CPC分类号： H01L27/124 , H01L27/1214 , H01L27/1255 , H01L27/1288 , H01L29/4908
摘要： A thin film transistor array and method of manufacturing the same include a pixel electrode formed of a transparent conductive layer on a substrate, a gate line formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate electrode connected to the gate line and formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate insulating layer which covers the gate line and the gate electrode, a semiconductor layer formed on the gate insulating layer to overlap the gate electrode, a data line which intersects the gate line, a source electrode connected to the data line to overlap a part of the semiconductor layer, and a drain electrode connected to the pixel electrode to overlap a part of the semiconductor layer.
摘要翻译：薄膜晶体管阵列及其制造方法包括由基板上的透明导电层形成的像素电极，由透明导电层形成的栅极线和基板上的不透明导电层，连接到栅极的栅电极并且在基板上形成透明导电层和不透明导电层，覆盖栅极线和栅极的栅极绝缘层，形成在栅极绝缘层上以与栅电极重叠的半导体层，数据线，与栅极线相交，连接到数据线的源电极与半导体层的一部分重叠，以及连接到像素电极以与半导体层的一部分重叠的漏电极。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式