专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明申请

US20170142822A1 WIRING SUBSTRATE 审中-公开
公开(公告)号：US20170142822A1
公开(公告)日：2017-05-18
申请号：US15350262
申请日：2016-11-14
申请人： NGK SPARK PLUG CO., LTD.
发明人： Kensuke MATSUHASHI
IPC分类号： H05K1/02 , H01L23/498 , H01L23/367 , H05K1/03 , H05K1/11
CPC分类号： H05K1/0204 , H01L23/13 , H01L23/15 , H01L23/36 , H01L23/3675 , H01L23/49822 , H01L23/49827 , H01L23/49838 , H05K1/0271 , H05K1/0306 , H05K1/115 , H05K1/18 , H05K3/403 , H05K3/4629 , H05K2201/09845 , H05K2201/10416
摘要： A wiring substrate includes: a substrate body made from ceramic, having a front surface and a rear surface, and having a through hole penetrating between the front surface and the rear surface; and a heatsink inserted into the through hole. A step portion protruding in a direction perpendicular to an axial direction of the through hole, is formed over an entire periphery on an inner wall surface of the through hole of the substrate body. A flange opposed to the step portion is provided so as to protrude, over an entire periphery on a side surface of the heatsink. A stress relaxing ring is arranged over an entire periphery between the step portion and a joining surface opposed to the step portion. A brazing material is provided between the ring, and the joining surface and the step portion.

12. 发明申请

US20170034917A1 CERAMIC CIRCUIT BOARD, ELECTRONIC CIRCUIT MODULE, AND METHOD FOR MANUFACTURING ELECTRONIC CIRCUIT MODULE 审中-公开
标题翻译：陶瓷电路板，电子电路模块及制造电子电路模块的方法
公开(公告)号：US20170034917A1
公开(公告)日：2017-02-02
申请号：US15214718
申请日：2016-07-20
申请人： Murata Manufacturing Co., Ltd.
发明人： Hiromitsu Hongo , Takahiro Sumi , Masaaki Hanao , Kazuo Kishida
IPC分类号： H05K1/18 , H05K3/10 , H05K3/40 , H05K3/46 , H05K1/02 , H05K1/11
CPC分类号： H01L23/15 , H01L23/13 , H01L23/49822 , H01L23/49883 , H01L23/552 , H01L2224/16225 , H01L2224/97 , H05K1/0218 , H05K1/0306 , H05K1/115 , H05K3/284 , H05K3/4061 , H05K3/4629 , H05K2201/0715
摘要： A ceramic circuit board that includes a ceramic insulator layer, grounding pattern conductors, connection lands disposed on a first surface of the ceramic circuit board, and grounding electrodes disposed on a second surface of the ceramic circuit board and connected to the grounding pattern conductors. Each of the grounding pattern conductors contains a metal and an oxide and includes a pattern main portion disposed inside the ceramic circuit board and an extended portion in which a first end thereof is connected to the pattern main portion and a second end thereof is exposed at a side surface of the ceramic circuit board. The metal content of the extended portion is lower than the metal content of the pattern main portion.
摘要翻译：一种陶瓷电路板，包括陶瓷绝缘体层，接地图形导体，设置在陶瓷电路板的第一表面上的连接焊盘以及设置在陶瓷电路板的第二表面上并连接到接地图案导体的接地电极。每个接地图案导体包含金属和氧化物，并且包括设置在陶瓷电路板内部的图案主要部分和其第一端连接到图案主要部分的延伸部分，并且其第二端部暴露在陶瓷电路板的侧面。延伸部分的金属含量低于图案主要部分的金属含量。

13. 发明授权

US09553614B2 Composite module 有权
标题翻译：复合模块
公开(公告)号：US09553614B2
公开(公告)日：2017-01-24
申请号：US14472525
申请日：2014-08-29
申请人： Murata Manufacturing Co., Ltd.
发明人： Akihiro Hara , Masahiko Ura , Takahiro Watanabe
IPC分类号： H04B1/44 , H04B1/00 , H05K1/02 , H04B1/40 , H04B1/02 , H05K3/46 , H04W88/06
CPC分类号： H04B1/006 , H04B1/40 , H04W88/06 , H05K1/0216 , H05K1/0243 , H05K3/4629 , H05K2201/09972
摘要： Provided is a technique capable of improving isolation characteristics between a plurality of signal paths through which RF signals pass, without using ground electrodes or the like. Wiring electrodes 10a and 20a through which RF signals do not pass simultaneously are formed so as to be adjacent to each other in a central region of a component mounting surface 2a of a circuit board 2, and wiring electrodes 11a and 21a through which RF signals pass simultaneously are formed so as to be distanced from transmission paths 10 and 20. Accordingly, the RF signals do not simultaneously pass through the transmission paths 10 and 20, which are disposed near each other, and thus there is no risk that the RF signal passing through one of the signal paths will interfere with the RF signal passing through the other signal path.
摘要翻译：提供了能够改善RF信号通过的多个信号路径之间的隔离特性的技术，而不使用接地电极等。在电路基板2的部件安装面2a的中央部以及射频信号通过的配线电极11a，21a中，不会同时通过RF信号的配线电极10a，20a彼此相邻地形成同时形成为远离传输路径10和20.因此，RF信号不同时通过彼此靠近设置的传输路径10和20，因此不存在RF信号通过的风险通过信号路径之一将干扰通过另一个信号路径的RF信号。

14. 发明授权

US09523709B2 Method of manufacturing multilayer wiring board, probe card including multilayer wiring board manufactured by the method, and multilayer wiring board 有权
标题翻译：制造多层布线板的方法，包括通过该方法制造的多层布线板的探针卡和多层布线板
公开(公告)号：US09523709B2
公开(公告)日：2016-12-20
申请号：US14302534
申请日：2014-06-12
申请人： Murata Manufacturing Co., Ltd.
发明人： Yoshihito Otsubo
IPC分类号： G01R31/00 , G01R1/04 , H05K1/02 , H05K3/46 , G01R1/073 , H05K3/40 , G01R3/00
CPC分类号： G01R1/0408 , G01R1/07378 , G01R3/00 , H05K1/0268 , H05K3/4007 , H05K3/4629 , H05K2201/09136
摘要： A method of manufacturing a multilayer wiring board includes a stacking process in which insulating layers, each of which includes a ceramic layer and a shrinkage suppression layer being stacked on top of the ceramic layer, are stacked on top of one another, a press-bonding process in which the insulating layers are press-bonded, so that a multilayer body is formed, and a firing process in which the multilayer body is fired. In the stacking process, in each of the insulating layers, a wiring electrode is formed on a surface of the shrinkage suppression layer on the opposite side to the surface of the layer facing the ceramic layer, and the thickness of a peripheral area of the shrinkage suppression layer located around the area of the shrinkage suppression layer that is in contact with the electrode is larger than those of portions of the layer except for the peripheral area.
摘要翻译：一种多层布线基板的制造方法，其特征在于，在所述陶瓷层的顶部层叠有包含陶瓷层和收缩抑制层的绝缘层彼此重叠的叠层工序，绝缘层被压接的方法，从而形成多层体，以及烧结多层体的烧成工序。在堆叠处理中，在各绝缘层中，在与层陶瓷层相对的面的相反侧的收缩抑制层的表面上形成有布线电极，并且收缩周边区域的厚度位于与电极接触的收缩抑制层的区域附近的抑制层大于除了周边区域以外的层的部分的抑制层。

15. 发明授权

US09466425B2 Glass ceramic substrate and method for producing the same 有权
标题翻译：玻璃陶瓷基板及其制造方法
公开(公告)号：US09466425B2
公开(公告)日：2016-10-11
申请号：US14032277
申请日：2013-09-20
申请人： MURATA MANUFACTURING CO., LTD.
发明人： Sumiyo Wakaki , Takahiro Sumi , Machiko Motoya
IPC分类号： H05K3/24 , H05K1/09 , H05K3/40 , H01G4/10 , H05K1/11 , H05K3/46
CPC分类号： H01G4/105 , H05K1/111 , H05K3/246 , H05K3/4007 , H05K3/4629 , H05K2201/035 , H05K2203/1476
摘要： A first paste film containing a metal powder and non-vitreous inorganic oxide is formed on a glass ceramic green sheet, and a second paste film containing a metal powder is formed on the first paste film to cover at least the edge portion of the first paste film. Then the glass ceramic green sheet and the first and second paste films are fired. As a result, a surface electrode is obtained, and then a plating layer is formed on the surface electrode. The second paste film contains less non-vitreous inorganic oxide than the first paste film and the abundance ratio of the non-vitreous inorganic oxide in the surface electrode is lower in a region bordering the plating layer than in a region bordering the glass ceramic layer at least in an edge portion of the surface electrode.
摘要翻译：在玻璃陶瓷生片上形成含有金属粉末和非玻璃质无机氧化物的第一糊剂膜，在第一糊剂膜上形成含有金属粉末的第二糊剂膜，以至少覆盖第一糊剂的边缘部分电影。然后烧制玻璃陶瓷生片和第一和第二糊状膜。结果，获得表面电极，然后在表面电极上形成镀层。第二糊剂膜比第一糊状物膜含有较少的无玻璃质无机氧化物，并且表面电极中的非玻璃质无机氧化物的丰度比在与镀层相邻的区域中低于在与玻璃陶瓷层接壤的区域最少在表面电极的边缘部分。

16. 发明申请

US20160286658A1 METHODS FOR PRODUCING CERAMIC SUBSTRATES AND MODULE COMPONENTS 审中-公开
标题翻译：生产陶瓷基板和模块组件的方法
公开(公告)号：US20160286658A1
公开(公告)日：2016-09-29
申请号：US15178686
申请日：2016-06-10
申请人： Murata Manufacturing Co., Ltd.
发明人： Masashi MATSUBARA
IPC分类号： H05K3/00 , H05K1/03 , H05K1/18 , H05K3/30 , H05K1/02 , H05K3/46 , H05K1/11
CPC分类号： H05K3/0052 , B28B11/14 , B28B11/243 , B28B17/0018 , B32B18/00 , C04B2237/64 , C04B2237/68 , H01L2224/97 , H05K1/0298 , H05K1/0306 , H05K1/115 , H05K1/181 , H05K3/007 , H05K3/303 , H05K3/4629 , H05K3/4644 , H05K2201/10015 , H05K2201/10022 , H05K2201/1003 , H05K2203/0228
摘要： In a method for manufacturing ceramic substrates and module components, an unfired mother ceramic substrate is cut at predetermined positions for division into separate unfired ceramic substrates. The cut unfired mother ceramic substrate is pressed such that pressure is applied parallel or substantially parallel to its main surfaces so that the cross-sectional end surfaces created in the cutting step are joined. The unfired mother ceramic substrate including end surface junctions, resulting from joining of the cross-sectional end surfaces, is fired. The fired mother ceramic substrate is broken along the end surface junctions to divide it into separate ceramic substrates.
摘要翻译：在陶瓷基板和模块部件的制造方法中，在预定位置切割未烧成的母体陶瓷基板，分割成分离的未烧结陶瓷基板。将未切割的未烧母母基板按压使其平行或基本平行于其主表面施加压力，使得在切割步骤中产生的横截面端面相连接。烧结由包含由横截面端面的接合而形成的端面接合部的未烧制的母材陶瓷基板。烧成的母体陶瓷衬底沿着端面接合部分断开，将其分成单独的陶瓷衬底。

17. 发明申请

US20160284474A1 LAMINATED CERAMIC ELECTRONIC COMPONENT 审中-公开
标题翻译：层压陶瓷电子元件
公开(公告)号：US20160284474A1
公开(公告)日：2016-09-29
申请号：US15172199
申请日：2016-06-03
申请人： Murata Manufacturing Co., Ltd.
发明人： YOSHITO SAITO , Yosuke Hirata , Takashi Hiramatsu
IPC分类号： H01G4/258 , H01G4/12 , H01G4/005 , H01G4/30
CPC分类号： H01G4/258 , H01G4/005 , H01G4/012 , H01G4/12 , H01G4/1209 , H01G4/30 , H05K1/162 , H05K3/1216 , H05K3/1291 , H05K3/4629 , H05K3/4664
摘要： A method for manufacturing a laminated ceramic capacitor having a laminated body including a plurality of stacked ceramic layers and internal electrodes located between the ceramic layers. The laminated body has a pair of mutually opposed principal surfaces extending in the direction in which the ceramic layers extend, a pair of mutually opposed side surfaces and a pair of mutually opposed end surfaces which respectively extend in directions orthogonal to the principal surfaces. The internal electrodes are 0.4 μm or less in thickness, and are located in an area defined by a width-direction gap of 30 μm or less interposed with respect to each of the pair of side surfaces and an outer layer thickness of 35 μm or less interposed with respect to each of the pair of principal surfaces.
摘要翻译：一种层叠陶瓷电容器的制造方法，其具有层叠体，所述层叠体包含多个层叠的陶瓷层和位于所述陶瓷层之间的内部电极。层叠体具有沿陶瓷层延伸的方向延伸的一对相互相对的主表面，一对相互相对的侧表面和分别沿与主表面正交的方向延伸的一对相互相对的端表面。内部电极的厚度为0.4μm以下，并且位于相对于一对侧面中的每一个插入的30μm以下的宽度方向间隙所限定的面积和35μm以下的外层厚度相对于一对主表面中的每一个插入。

18. 发明申请

US20160233017A1 INDUCTOR ARRAY CHIP AND DC-TO-DC CONVERTER MODULE USING THE SAME 审中-公开
标题翻译：电感阵列芯片和DC-DC转换器模块
公开(公告)号：US20160233017A1
公开(公告)日：2016-08-11
申请号：US15132888
申请日：2016-04-19
申请人： Murata Manufacturing Co., Ltd.
发明人： Motonori Murase
IPC分类号： H01F27/28 , G05F3/08 , H01F27/245
CPC分类号： H01F27/2804 , G05F3/08 , H01F17/0013 , H01F27/245 , H01F2017/0066 , H01F2027/2809 , H01L23/49822 , H01L23/64 , H01L2924/0002 , H01L2924/19041 , H01L2924/19105 , H02M3/1584 , H05K1/115 , H05K1/165 , H05K3/4629 , H05K2201/086 , H05K2201/09672 , H01L2924/00
摘要： Coil conductor patterns CP31 to CP34 and CP41 to CP44 are formed to be close to an outermost layer of a multilayer body. The coil conductor patterns CP31 and CP41 are connected by via hole conductors VH111b and VH111c, the coil conductor patterns CP32 and CP42 are connected by via hole conductors VH112b and VH112c, the coil conductor patterns CP33 and CP43 are connected by via hole conductors VH113b and VH113c, and the coil conductor patterns CP34 and CP44 are connected by via hole conductors VH114b and VH114c. Coil conductor patterns CP101 to CP104 and CP111 to CP114 formed to be close to the other outermost layer of the multilayer body are also connected in the same manner.
摘要翻译：线圈导体图案CP31〜CP34和CP41〜CP44形成为接近多层体的最外层。线圈导体图案CP31和CP41通过通孔导体VH111b和VH111c连接，线圈导体图案CP32和CP42通过通孔导体VH112b和VH112c连接，线圈导体图案CP33和CP43通过通孔导体VH113b和VH113c连接并且线圈导体图案CP34和CP44通过通孔导体VH114b和VH114c连接。形成为接近多层体的另一最外层的线圈导体图案CP101〜CP104和CP111〜CP114也以相同的方式连接。

19. 发明授权

US09370111B2 Ceramic multilayer substrate and method for producing the same 有权
标题翻译：陶瓷多层基板及其制造方法
公开(公告)号：US09370111B2
公开(公告)日：2016-06-14
申请号：US14320765
申请日：2014-07-01
申请人： Murata Manufacturing Co., Ltd.
发明人： Yoshiko Okada , Osamu Chikagawa , Hidekiyo Takaoka , Shodo Takei
IPC分类号： H01G2/02 , H05K3/46 , H01G4/30 , H05K1/18 , H01G4/005 , H05K1/03 , H05K1/09
CPC分类号： H05K3/4629 , H01G2/02 , H01G4/005 , H01G4/30 , H01L2224/82039 , H01L2224/82047 , H01L2924/01004 , H01L2924/01025 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H05K1/0306 , H05K1/092 , H05K1/186 , H05K3/4611 , H05K2201/10636 , Y02P70/611 , Y10T29/49155
摘要： A ceramic multilayer substrate incorporating a chip-type ceramic component, in which, even if the chip-type ceramic component is mounted on the surface of the ceramic multilayer substrate, bonding strength between the chip-type ceramic component and an internal conductor or a surface electrode of the ceramic multilayer substrate is greatly improved and increased. The ceramic multilayer substrate includes a ceramic laminate in which a plurality of ceramic layers are stacked, an internal conductor disposed in the ceramic laminate, a surface electrode disposed on the upper surface of the ceramic laminate, and a chip-type ceramic component bonded to the internal conductor or the surface electrode through an external electrode. The internal conductor or the surface electrode is bonded to the external electrode through a connecting electrode, and the connecting electrode forms a solid solution with any of the internal conductor, the surface electrode, and the external electrode.
摘要翻译：另外，在芯片型陶瓷部件的陶瓷多层基板中，即使在陶瓷多层基板的表面上安装有芯片型陶瓷部件，也可以将芯片型陶瓷部件与内部导体或表面陶瓷多层基板的电极大大改善和增加。陶瓷多层基板包括层叠有多个陶瓷层的陶瓷层叠体，设置在陶瓷层叠体中的内部导体，设置在陶瓷层叠体的上表面的表面电极以及与该陶瓷层叠体接合的芯片型陶瓷构件内部导体或表面电极通过外部电极。内部导体或表面电极通过连接电极接合到外部电极，连接电极与内部导体，表面电极和外部电极中的任一个形成固溶体。

20. 发明授权

US09283589B2 Cartridge block for multilayer ceramic screening 有权
标题翻译：滤芯用于多层陶瓷筛选
公开(公告)号：US09283589B2
公开(公告)日：2016-03-15
申请号：US14077566
申请日：2013-11-12
申请人： International Business Machines Corporation
发明人： William W. Harkins , Christos T. Kapogiannis , Gerald H. Leino , Robert Weiss
IPC分类号： A46B11/00 , B05C5/02 , H05K3/12 , H05K3/46
CPC分类号： B05C5/02 , H05K3/1233 , H05K3/4629
摘要： An assembly for screening a multilayer ceramic with a conductive paste includes a paste cartridge containing the conductive paste; a cartridge block, a top of a cartridge block being configured to receive the paste cartridge, the cartridge block comprising a paste routing section, the paste routing section comprising a flared section located at a bottom of the cartridge block; a pneumatic fitting attached to the paste cartridge, the pneumatic fitting configured to pressurize the conductive paste in the paste cartridge such that the conductive paste is extruded from the paste cartridge into the cartridge block through the paste routing section of the cartridge block by the pressure from the pneumatic fitting; and a nozzle connected to the flared section of the cartridge block, the nozzle configured to receive the conductive paste from the flared section, and screen the conductive paste onto the multilayer ceramic through the nozzle.
摘要翻译：用于用导电浆料筛选多层陶瓷的组件包括：含有导电浆料的糊料盒; 墨盒块，墨盒的顶部被配置为接收所述墨盒，所述墨盒盒包括糊浆路线部分，所述浆料路线部分包括位于所述墨盒盒底部的扩口部分; 气动配件，其附接到所述浆料盒，所述气动配件被配置为对所述糊料盒中的导电糊进行加压，使得所述导电浆料通过所述料盒块的所述浆料路线部分从所述浆料盒挤出到所述料盒中，气动配件; 以及喷嘴，其连接到所述盒体的所述扩口部，所述喷嘴被构造成从所述扩口部接收所述导电膏，并且通过所述喷嘴将所述导电膏屏蔽到所述多层陶瓷上。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式