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    • 11. 发明授权
    • Lateral drain MOSFET with improved clamping voltage control
    • 具有改进的钳位电压控制的侧漏MOSFET
    • US07781835B2
    • 2010-08-24
    • US12352057
    • 2009-01-12
    • Bruce D. MarchantDean Probst
    • Bruce D. MarchantDean Probst
    • H01L29/94
    • H01L29/7821H01L29/0878H01L29/1095H01L29/4175H01L29/41766H01L29/456H01L29/4933H01L29/66696
    • A lateral MOSFET having a substrate, first and second epitaxial layers grown on the substrate and a gate electrode formed on a gate dielectric which in turn is formed on a top surface of the second epitaxial layer. The second epitaxial layer comprises a drain region which extends to a top surface of the epitaxial layer and is proximate to a first edge of the gate electrode, a source region which extends to a top surface of the second epitaxial layer and is proximate to a second edge of the gate electrode, a heavily doped body under at least a portion of the source region, and a lightly doped well under the gate dielectric located near the transition region of the first and second epitaxial layers. A PN junction between the heavily doped body and the first epitaxial region under the heavily doped body has an avalanche breakdown voltage that is substantially dependent on the doping concentration in the upper portion of the first epitaxial layer that is beneath the heavily doped body.
    • 具有衬底的横向MOSFET,在衬底上生长的第一和第二外延层和形成在栅极电介质上的栅电极,栅极电介质又形成在第二外延层的顶表面上。 第二外延层包括漏极区域,其延伸到外延层的顶表面并且靠近栅电极的第一边缘,源区域延伸到第二外延层的顶表面并且接近第二外延层 栅电极的边缘,在源极区的至少一部分下方的重掺杂体,以及位于第一和第二外延层的过渡区附近的栅电介质下的轻掺杂阱。 重掺杂体之下的重掺杂体和第一外延区之间的PN结具有雪崩击穿电压,其基本上取决于在重掺杂体下面的第一外延层的上部的掺杂浓度。
    • 13. 发明申请
    • Semiconductor device and combined IC using the same
    • 半导体器件和使用其的组合IC
    • US20040026728A1
    • 2004-02-12
    • US10442648
    • 2003-05-21
    • Kazuhiko YoshidaTakeshi IchimuraTatsuhiko FujihiraNaoki Kumagai
    • H01L027/108
    • H01L29/7816H01L27/0251H01L29/7817H01L29/7821H01L29/7835H01L2924/0002H01L2924/00
    • A semiconductor device realizes a high electrostatic discharge withstanding capability and a high surge withstanding capability within the narrow chip area of a lateral MOSFET used in integrated intelligent switching devices, double-integration-type signal input and transfer IC's, and combined power IC's. The semiconductor device includes a vertical bipolar transistor in which a base is electrically connected to an emitter and a collector, and a lateral MOSFET including a drain electrode connected to a surface electrode. The vertical bipolar transistor absorbs electrostatic discharge or surge energy when a high electrostatic discharge voltage or a high surge voltage is applied and limits the electrostatic discharge voltage or the surge voltage to be lower than the breakdown voltage of the lateral MOSFET.
    • 半导体器件在集成智能开关器件,双积分型信号输入和转换IC以及组合电源IC中使用的横向MOSFET的窄芯片区域内实现了高静电放电耐受能力和高耐冲击能力。 半导体器件包括其中基极电连接到发射极和集电极的垂直双极晶体管,以及包括连接到表面电极的漏电极的横向MOSFET。 当施加高静电放电电压或高浪涌电压时,垂直双极晶体管吸收静电放电或浪涌能量,并将静电放电电压或浪涌电压限制为低于横向MOSFET的击穿电压。
    • 16. 发明申请
    • GaN-based compound semiconductor device
    • GaN系化合物半导体装置
    • US20010032999A1
    • 2001-10-25
    • US09843276
    • 2001-04-25
    • Seikoh Yoshida
    • H01L031/0328
    • H01L29/66674H01L29/2003H01L29/267H01L29/4232H01L29/4238H01L29/7397H01L29/7455H01L29/7801H01L29/7802H01L29/7821H01L29/7825
    • A semiconductor device having a high breakdown and capable of operating with a large current is realized using GaN-based compound semiconductors which exhibit good electric characteristics. Particularly, a semiconductor material having a larger band gap than semiconductor materials forming other semiconductor layers, for example, AlGaN is used for a semiconductor layer immediately below a gate electrode to realize a power device of vertical structure which comprises GTO or IGBT. Also, in a semiconductor device having a GaN-based insulated gate structure which has a third semiconductor layer comprising a source region embedded in a first GaN-based semiconductor layer through a second semiconductor layer, and a fourth semiconductor layer comprising a drain region embedded in the first semiconductor layer spaced apart from the second semiconductor layer, a pn junction diode connected in parallel between a gate and a source is formed between the third semiconductor layer and the fourth semiconductor layer to increase the breakdown.
    • 利用具有良好的电气特性的GaN系化合物半导体,实现具有高击穿能力且能够大电流工作的半导体器件。 特别地,与形成其他半导体层的半导体材料(例如AlGaN)相比,具有较大的带隙的半导体材料被用于栅电极正下方的半导体层,以实现包括GTO或IGBT的垂直结构的功率器件。 此外,在具有GaN基绝缘栅极结构的半导体器件中,具有通过第二半导体层包含嵌入在第一GaN基半导体层中的源极区的第三半导体层,以及包含嵌入在第一GaN基半导体层中的漏极区的第四半导体层 与第二半导体层间隔开的第一半导体层,在第三半导体层和第四半导体层之间形成并联连接在栅极和源极之间的pn结二极管,以增加击穿。