专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明授权

US09097845B2 Optoelectronic chips including coupler region and methods of manufacturing the same 有权
标题翻译：包括耦合器区域的光电芯片及其制造方法
公开(公告)号：US09097845B2
公开(公告)日：2015-08-04
申请号：US13768204
申请日：2013-02-15
申请人： Samsung Electronics Co., Ltd.
发明人： Seong-ho Cho
IPC分类号： G02B6/12 , H01L21/82 , G02B6/134
CPC分类号： G02B6/12 , G02B6/1347 , G02B6/4214 , G02B2006/12104 , H01L21/82
摘要： An optoelectronic chip, and/or a method of manufacturing the same, include a substrate; a coupler region surrounded by the substrate. The coupler region includes a total reflection surface. The total reflection surface is configured to totally reflect a first light incident through a surface of the substrate such that the reflected first light travels within the substrate, or the total reflection surface is configured to totally reflect a second light guided in the substrate and incident on the total reflecting surface such that the reflected second light travels through the surface of the substrate.
摘要翻译：光电子芯片和/或其制造方法包括：基板; 由衬底包围的耦合器区域。耦合器区域包括全反射面。全反射面被配置为完全反射通过基板的表面入射的第一光，使得反射的第一光在基板内行进，或者全反射表面被配置为完全反射在基板中引导的第二光并入射到全反射表面使得反射的第二光穿过基板的表面。

12. 发明授权

US09057832B2 Double layer interleaved p-n diode modulator 有权
标题翻译：双层交错p-n二极管调制器
公开(公告)号：US09057832B2
公开(公告)日：2015-06-16
申请号：US14492410
申请日：2014-09-22
申请人： International Business Machines Corporation
发明人： William M. Green , Jessie C. Rosenberg , Yurii Vlasov
IPC分类号： H01L21/00 , G02B6/134 , G02B6/12 , G02F1/025
CPC分类号： G02B6/1347 , G02B6/12 , G02B2006/12061 , G02F1/025 , G02F2201/063 , G02F2201/15 , G02F2202/06 , G02F2202/105
摘要： A method for fabricating an optical modulator includes forming n-type layer, a first oxide portion on a portion of the n-type layer, and a second oxide portion on a second portion of the n-type layer, patterning a first masking layer over the first oxide portion, portions of a planar surface of the n-type layer, and portions of the second oxide portion, implanting p-type dopants in the n-type layer to form a first p-type region and a second p-type region, removing the first masking layer, patterning a second masking layer over the first oxide portion, a portion of the first p-type region, and a portion of the n-type layer, and implanting p-type dopants in exposed portions of the n-type layer, exposed portions of the first p-type region, and regions of the n-type layer and the second p-type region disposed between the substrate and the second oxide portion.
摘要翻译：一种光学调制器的制造方法包括在n型层的一部分上形成n型层，第一氧化物部分和n型层的第二部分上的第二氧化物部分，将第一掩模层图案化第一氧化物部分，n型层的平面表面的部分和第二氧化物部分的部分，在n型层中注入p型掺杂剂以形成第一p型区和第二p型去除所述第一掩蔽层，在所述第一氧化物部分上形成第二掩模层，所述第一p型区域的一部分和所述n型层的一部分，以及在所述第一掩模层的暴露部分中注入p型掺杂剂 n型层，第一p型区域的露出部分以及设置在基板和第二氧化物部分之间的n型层和第二p型区域的区域。

13. 发明申请

US20130108209A1 OPTOELECTRONIC CHIPS INCLUDING COUPLER REGION AND METHODS OF MANUFACTURING THE SAME 有权
标题翻译：光耦合器包括耦合器区域及其制造方法
公开(公告)号：US20130108209A1
公开(公告)日：2013-05-02
申请号：US13474809
申请日：2012-05-18
申请人： Seong-ho CHO
发明人： Seong-ho CHO
IPC分类号： G02B6/12 , H01L31/12
CPC分类号： G02B6/125 , G02B6/1347 , G02B6/4214 , H01L31/12
摘要： An optoelectronic chip including a coupler region, and a method of manufacturing the same, include a substrate; a coupler region formed of a material having a refractive index lower than the substrate and surrounded by the substrate. The coupler region includes a total reflection surface that totally reflects light incident through a surface of the substrate into the substrate or emits light guided in the substrate through the surface of the substrate.
摘要翻译：包括耦合器区域的光电芯片及其制造方法包括：基板; 由折射率低于衬底并由衬底围绕的材料形成的耦合器区域。耦合器区域包括全反射表面，其将从衬底的表面入射的光全部反射到衬底中或者通过衬底的表面发射在衬底中引导的光。

14. 发明申请

US20130058606A1 Electro-optice device comprising a ridge waveguide and a PN junction and method of manufacturing said device 有权
公开(公告)号：US20130058606A1
公开(公告)日：2013-03-07
申请号：US13574576
申请日：2011-01-20
申请人： David Thomson , Frederic Gardes , Graham Reed
发明人： David Thomson , Frederic Gardes , Graham Reed
IPC分类号： G02B6/12 , H01L21/02
CPC分类号： G02F1/025 , G02B6/134 , G02B6/1347 , G02B6/136 , G02B2006/12173 , G02F2001/0152 , G02F2201/063
摘要： An electro-optic device, comprising an insulating layer and a layer of light-carrying material adjacent the insulating layer. The layer of light-carrying material, such as silicon, comprises a first doped region of a first type and a second doped region of a second, different type abutting the first doped region to form a pn junction. The first doped region has a first thickness at the junction, and the second doped region has a second thickness at the junction, the first thickness being greater than the second thickness, defining a waveguide rib in the first doped region for propagating optical signals. Since the position of the junction coincides with the sidewall of the waveguide rib a self-aligned process can be used in order to simplify the fabrication process and increase yield.

15. 发明授权

US08269931B2 Systems and methods for preparing films using sequential ion implantation, and films formed using same 有权
标题翻译：使用顺序离子注入制备膜的系统和方法，以及使用其形成的膜
公开(公告)号：US08269931B2
公开(公告)日：2012-09-18
申请号：US12584939
申请日：2009-09-14
申请人： Margaret H. Abraham , David P. Taylor
发明人： Margaret H. Abraham , David P. Taylor
IPC分类号： G02F1/1333 , G02F1/1337
CPC分类号： H01L21/265 , C23C14/0635 , C23C14/10 , C23C14/48 , G02B6/1347 , Y10T428/30 , Y10T428/31504
摘要： Systems and methods for preparing films using sequential ion implantation, and films formed using same, are provided herein. A structure prepared using ion implantation may include a substrate; an embedded structure having pre-selected characteristics; and a film within or adjacent to the embedded structure and including ions having a perturbed arrangement arising from the presence of the embedded structure. The perturbed arrangement may include the ions being covalently bonded to each other, to the embedded structure, or to the substrate, whereas the ions instead may be free to diffuse through the substrate in the absence of the embedded structure. The embedded structure may inhibit or impede the ions from diffusing through the substrate, such that the ions instead covalently bond to each other, to the embedded structure, or to the substrate. The film may include, for example, diamond-like carbon, graphene, or SiC having a pre-selected phase.
摘要翻译：本文提供了使用顺序离子注入制备膜的系统和方法以及使用其形成的膜。使用离子注入制备的结构可以包括基底; 具有预选特征的嵌入式结构; 以及在嵌入结构内或附近的膜，并且包括由嵌入结构的存在引起的扰动布置的离子。扰动的布置可以包括彼此共价键合的离子，嵌入结构或衬底，而离子可以在不存在嵌入结构的情况下自由地扩散通过衬底。嵌入结构可以抑制或阻止离子通过衬底扩散，使得离子彼此共价键合到嵌入结构或衬底上。该膜可以包括例如具有预选相的类金刚石碳，石墨烯或SiC。

16. 发明申请

US20110064370A1 Systems and methods for preparing films using sequential ion implantation, and films formed using same 有权
标题翻译：使用顺序离子注入制备膜的系统和方法，以及使用其形成的膜
公开(公告)号：US20110064370A1
公开(公告)日：2011-03-17
申请号：US12584939
申请日：2009-09-14
申请人： Margaret H. Abraham , David P. Taylor
发明人： Margaret H. Abraham , David P. Taylor
IPC分类号： G02B6/10 , C23C14/48 , B05C11/00 , B32B9/00
CPC分类号： H01L21/265 , C23C14/0635 , C23C14/10 , C23C14/48 , G02B6/1347 , Y10T428/30 , Y10T428/31504
摘要： Systems and methods for preparing films using sequential ion implantation, and films formed using same, are provided herein. A structure prepared using ion implantation may include a substrate; an embedded structure having pre-selected characteristics; and a film within or adjacent to the embedded structure and including ions having a perturbed arrangement arising from the presence of the embedded structure. The perturbed arrangement may include the ions being covalently bonded to each other, to the embedded structure, or to the substrate, whereas the ions instead may be free to diffuse through the substrate in the absence of the embedded structure. The embedded structure may inhibit or impede the ions from diffusing through the substrate, such that the ions instead covalently bond to each other, to the embedded structure, or to the substrate. The film may include, for example, diamond-like carbon, graphene, or SiC having a pre-selected phase.
摘要翻译：本文提供了使用顺序离子注入制备膜的系统和方法以及使用其形成的膜。使用离子注入制备的结构可以包括基底; 具有预选特征的嵌入式结构; 以及在嵌入结构内或附近的膜，并且包括由嵌入结构的存在引起的扰动布置的离子。扰动的布置可以包括彼此共价键合的离子，嵌入结构或衬底，而离子可以在不存在嵌入结构的情况下自由地扩散通过衬底。嵌入结构可以抑制或阻止离子通过衬底扩散，使得离子彼此共价键合到嵌入结构或衬底上。该膜可以包括例如具有预选相的类金刚石碳，石墨烯或SiC。

17. 发明申请

US20100099242A1 Production Method for a Lateral Electro-Optical Modulator on Silicon With Auto-Aligned Implanted Zones 有权
标题翻译：在具有自动对准的移植区域的硅上的侧面电光调制器的制造方法
公开(公告)号：US20100099242A1
公开(公告)日：2010-04-22
申请号：US12579086
申请日：2009-10-14
申请人： Jean-Marc FEDELI
发明人： Jean-Marc FEDELI
IPC分类号： H01L21/265
CPC分类号： G02F1/025 , G02B6/1347 , G02B6/136 , G02B2006/12061 , G02B2006/12097 , G02B2006/12142 , G02F2001/0151 , G02F2201/063 , H01L21/26513 , H01L21/26586
摘要： The invention relates to a production method of a lateral electro-optical modulator on an SOI substrate, the modulator comprising a rib waveguide formed in the thin layer of silicon of the SOI substrate, the rib waveguide being placed between a doped region P and a doped region N formed in the thin layer of silicon, the rib waveguide occupying an intrinsic region of the thin layer, at least one doped zone P being formed in the rib and perpendicularly to the substrate. The method comprises masking steps of the thin layer of silicon to define therein the rib of the waveguide, etching of the rib, masking of the thin layer of silicon to delimit the parts to be doped P, doping of the parts to be doped P, masking of the thin layer of silicon to delimit the region to be doped N and doping of the region to be doped N. The masking steps utilises a hard mask whereof the pattern defines the rib of the waveguide, the zone to be doped P in the rib of the waveguide and the limit of the doped region N relative to the rib of the waveguide.
摘要翻译：本发明涉及一种在SOI衬底上的横向电光调制器的制造方法，该调制器包括形成在SOI衬底的硅薄层中的肋波导，该肋波导位于掺杂区P和掺杂形成在硅薄层中的区域N，肋波导占据薄层的本征区域，至少一个掺杂区域P形成在肋中并垂直于衬底。该方法包括屏蔽薄层硅的步骤以在其中限定波导的肋，蚀刻肋，掩蔽薄层的硅以限定待掺杂的部分P，掺杂待掺杂的部分P，掩蔽硅的薄层以限定要掺杂的区域N和掺杂待掺杂区域N.掩模步骤使用硬掩模，其中图案限定波导的肋，待掺杂的区域P在波导的肋和相对于波导的肋的掺杂区域N的极限。

18. 发明授权

US07255804B2 Process for making photonic crystal circuits using an electron beam and ultraviolet lithography combination 失效
标题翻译：使用电子束和紫外光刻组合制造光子晶体电路的方法
公开(公告)号：US07255804B2
公开(公告)日：2007-08-14
申请号：US10504518
申请日：2003-02-14
申请人： Dennis W. Prather , Janusz Murakowski
发明人： Dennis W. Prather , Janusz Murakowski
IPC分类号： G02B6/00
CPC分类号： B82Y20/00 , G02B6/1225 , G02B6/1347 , G02B6/136 , G02B2006/12173 , G03F7/0005
摘要： A process for making photonic crystal circuit and a photonic crystal circuit consisting of regularly-distributed holes in a high index dielectric material, and controllably-placed defects within this lattice, creating waveguides, cavities, etc. for photonic devices. The process is based upon the discovery that some positive ultraviolet (UV) photoresists are electron beam sensitive and behave like negative electron beam photoresists. This permits creation of photonic crystal circuits using a combination of electron beam and UV exposures. As a result, the process combines the best features of the two exposure methods: the high speed of UV exposure and the high resolution and control of the electron beam exposure. The process also eliminates the need for expensive photomasks.
摘要翻译：一种制造光子晶体电路的工艺和由高折射率介电材料中规则分布的孔组成的光子晶体电路，以及该晶格内的可控制的缺陷，为光子器件产生波导，空腔等。该过程基于以下发现：一些正的紫外（UV）光刻胶是电子束敏感的并且表现得像负电子束光致抗蚀剂。这允许使用电子束和UV曝光的组合创建光子晶体电路。因此，该方法结合了两种曝光方法的最佳特征：紫外线曝光的高速度和电子束曝光的高分辨率和控制。该过程也消除了昂贵的光掩模的需要。

19. 发明申请

US20050225838A1 Wavelength converting element and method of manufacturing thereof 失效
标题翻译：波长转换元件及其制造方法
公开(公告)号：US20050225838A1
公开(公告)日：2005-10-13
申请号：US11142253
申请日：2005-06-02
申请人： Isao Tsuruma
发明人： Isao Tsuruma
IPC分类号： G02B6/134 , G02F1/03 , G02F1/377 , G02F1/35
CPC分类号： G02F1/3775 , G02B6/1347 , G02F1/0316 , G02F2201/066
摘要： A wavelength converting element is provided in which a fundamental wave with respect to an optical crystal substrate and a peak of a vertical transverse mode of a second harmonic are made to coincide, the converting efficiency is good, and a beam shape which enables good joining to a lens or an optical fiber is obtained. Given that an angle formed by a surface of the optical crystal substrate and a C axis of the optical crystal substrate is θ, a period at which inverted domains are formed is p, and a distance from a distal end of a comb-shaped electrode for forming the inverted domain to a central position of a waveguide is G, in the ion implantation, a concentration peak of the ion implantation is formed at a distance of substantially (G·tan θ+p/4) from the surface of the optical crystal substrate.
摘要翻译：提供一种波长转换元件，其中使相对于光学晶体基板的基波和二次谐波的垂直横向模式的峰值一致，转换效率良好，并且能够良好地接合到获得透镜或光纤。假设由光学晶体基板的表面和光学晶体基板的C轴形成的角度为θ，则形成反转畴的周期为p，并且与梳状电极的远端的距离为在波导的中心位置处形成反向域为G，在离子注入中离子注入的浓度峰值形成在与光学晶体表面基本上（G.tanθ+ p / 4）的距离处基质。

20. 发明申请

US20050008977A1 Method for writing a planar waveguide having gratings of different center wavelengths 审中-公开
公开(公告)号：US20050008977A1
公开(公告)日：2005-01-13
申请号：US10911061
申请日：2004-08-03
申请人： Anders Grunnet-Jepsen , Alan Johnson , John Sweetser
发明人： Anders Grunnet-Jepsen , Alan Johnson , John Sweetser
IPC分类号： G02B6/13 , G02B5/18 , G02B6/12 , G02B6/122 , G02B6/124 , G02B6/125 , G02B6/132 , G02B6/134 , G02B6/136 , G02B6/34 , G03C5/00
CPC分类号： G02B6/124 , G02B6/12007 , G02B6/1228 , G02B6/125 , G02B6/132 , G02B6/134 , G02B6/1347 , G02B6/136 , G02B2006/12078 , G02B2006/12176
摘要： Multiple Bragg gratings are fabricated in a single planar lightwave circuit platform. The gratings have nominally identical grating spacing but different center wavelengths, which are produced using controlled photolithographic processes and/or controlled doping to control the effective refractive index of the gratings. The gratings may be spaced closer together than the height of the UV light pattern used to write the gratings.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式