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11. 发明授权

US08174289B2 Level shifter and level shifting method thereof 有权
标题翻译：电平移位器及其电平移位方法
公开(公告)号：US08174289B2
公开(公告)日：2012-05-08
申请号：US12854616
申请日：2010-08-11
申请人： Yung-Feng Lin , Chun-Hsiung Hung
发明人： Yung-Feng Lin , Chun-Hsiung Hung
IPC分类号： H03K19/0175
CPC分类号： H03K3/356113 , H03K3/356182
摘要： A level shifter includes a first level-switching device and a second level-switching device. The first level-switching device includes a first switch device, a second switch device, a first control switch and a third switch device. The first switch device is for receiving the input voltage and outputting a first voltage. The second switch device is coupled to the first switch device for outputting a first operational voltage as the output voltage according to the first voltage. The first control switch is coupled to the first switch device for receiving the first voltage. The third switch device is coupled between the first control switch and the first operational voltage and controlled by the output voltage. The second level-switching device is coupled to the first level-switching device for receiving the input voltage and accordingly outputting a second operational voltage as the output voltage.
摘要翻译：电平移位器包括第一电平转换装置和第二电平转换装置。第一电平切换装置包括第一开关装置，第二开关装置，第一控制开关和第三开关装置。第一开关装置用于接收输入电压并输出第一电压。第二开关装置耦合到第一开关装置，用于根据第一电压输出第一工作电压作为输出电压。第一控制开关耦合到第一开关装置以接收第一电压。第三开关装置耦合在第一控制开关和第一工作电压之间并由输出电压控制。第二电平切换装置耦合到第一电平切换装置，用于接收输入电压，并因此输出第二工作电压作为输出电压。

12. 发明授权

US08111547B2 Multi-bit flash memory and reading method thereof 有权
标题翻译：多位闪存及其读取方法
公开(公告)号：US08111547B2
公开(公告)日：2012-02-07
申请号：US12636095
申请日：2009-12-11
申请人： Yung-Feng Lin , Nian-Kai Zous , I-Jen Huang , Yin-Jen Chen
发明人： Yung-Feng Lin , Nian-Kai Zous , I-Jen Huang , Yin-Jen Chen
IPC分类号： G11C11/34
CPC分类号： G11C11/5642 , G11C2211/5634
摘要： A multi-bit flash memory and a reading method thereof. Multiple reference memory cells for saving reserved data are provided to operate together with multiple data memory cells. Before the data memory cells are read, data stored in the reference memory cell is sensed based on a present reference current. Then, a value of a new reference current for reading the data memory cells is determined according to a difference between the sensed data and the reserved data.
摘要翻译：一种多位闪存及其读取方法。提供用于保存预留数据的多个参考存储器单元以与多个数据存储单元一起操作。在读取数据存储单元之前，基于当前的参考电流感测存储在参考存储器单元中的数据。然后，根据感测数据和保留数据之间的差异来确定读取数据存储单元的新参考电流的值。

13. 发明授权

US08045396B2 Memory and reading method thereof 有权
标题翻译：其记忆和阅读方法
公开(公告)号：US08045396B2
公开(公告)日：2011-10-25
申请号：US12902409
申请日：2010-10-12
申请人： Yung-Feng Lin
发明人： Yung-Feng Lin
IPC分类号： G11C11/34
CPC分类号： G11C8/10 , G11C16/0416 , G11C16/24 , G11C16/26
摘要： A reading method applied for a memory, which includes a cell row including a first memory cell coupled to a first bit line and a second memory cell coupled to a second bit line is provided. The reading method comprises the following steps. Firstly, the first bit line coupled to a first terminal of the first memory cell is selected for reading the first memory cell in a time period. Next, the second terminal of the first memory cell is discharged via the second bit line coupled to the second memory cell in the time period.
摘要翻译：提供了一种应用于存储器的读取方法，其包括包括耦合到第一位线的第一存储器单元和耦合到第二位线的第二存储器单元的单元行。读取方法包括以下步骤。首先，选择耦合到第一存储单元的第一端的第一位线，以便在一段时间内读取第一存储单元。接下来，在该时间段内经由耦合到第二存储单元的第二位线对第一存储单元的第二端子进行放电。

14. 发明授权

US07961513B2 Method for programming a multilevel memory 有权
标题翻译：多级存储器编程方法
公开(公告)号：US07961513B2
公开(公告)日：2011-06-14
申请号：US12544025
申请日：2009-08-19
申请人： Hsin-Yi Ho , Nian-Kai Zous , I-Jen Huang , Yung-Feng Lin
发明人： Hsin-Yi Ho , Nian-Kai Zous , I-Jen Huang , Yung-Feng Lin
IPC分类号： G11C16/04
CPC分类号： G11C11/5628 , G11C11/5671 , G11C2211/5621
摘要： A method for programming a MLC memory includes (a) programming the bits of the memory having a Vt level lower than the PV level of a targeted programmed state into programmed bits by using a Vd bias BL; (b) ending this method if each bit of the memory has a Vt level not lower than the PV level of the targeted programmed state, otherwise, continuing the step (c); and (c) setting BL=BL+K1 and repeating the step (a) if each of the programmed bits has a Vt level lower than the PV level, while setting BL=BL−K2, and repeating the step (a) if at least one of the programmed bits has a Vt level not lower than the PV level.
摘要翻译：用于编程MLC存储器的方法包括（a）通过使用Vd偏置BL将具有低于目标编程状态的PV电平的Vt电平的存储器的位编程为编程位; （b）如果存储器的每个位的Vt电平不低于目标编程状态的PV电平，则结束该方法，否则继续步骤（c）; 以及（c）设定BL = BL + K1，并且如果每个编程的比特都具有低于PV水平的Vt级别，而设置BL = BL-K2，并重复步骤（a），如果在至少一个编程位的Vt电平不低于PV电平。

15. 发明授权

US07791372B2 Level shifter and level shifting method thereof 有权
标题翻译：电平移位器及其电平移位方法
公开(公告)号：US07791372B2
公开(公告)日：2010-09-07
申请号：US12171542
申请日：2008-07-11
申请人： Yung-Feng Lin , Chun-Hsiung Hung
发明人： Yung-Feng Lin , Chun-Hsiung Hung
IPC分类号： H03K19/0175
CPC分类号： H03K3/356113 , H03K3/356182
摘要： A level shifter includes a first level-switching device and a second level-switching device. The first level-switching device includes a first switch device, a second switch device, a first control switch and a third switch device. The first switch device is for receiving the input voltage and outputting a first voltage. The second switch device is coupled to the first switch device for outputting a first operational voltage as the output voltage according to the first voltage. The first control switch is coupled to the first switch device for receiving the first voltage. The third switch device is coupled between the first control switch and the first operational voltage and controlled by the output voltage. The second level-switching device is coupled to the first level-switching device for receiving the input voltage and accordingly outputting a second operational voltage as the output voltage.
摘要翻译：电平移位器包括第一电平转换装置和第二电平转换装置。第一电平切换装置包括第一开关装置，第二开关装置，第一控制开关和第三开关装置。第一开关装置用于接收输入电压并输出第一电压。第二开关装置耦合到第一开关装置，用于根据第一电压输出第一工作电压作为输出电压。第一控制开关耦合到第一开关装置以接收第一电压。第三开关装置耦合在第一控制开关和第一工作电压之间并由输出电压控制。第二电平切换装置耦合到第一电平切换装置，用于接收输入电压，并因此输出第二工作电压作为输出电压。

16. 发明授权

US07580292B2 Method for programming a multilevel memory 有权
标题翻译：多级存储器编程方法
公开(公告)号：US07580292B2
公开(公告)日：2009-08-25
申请号：US11812033
申请日：2007-06-14
申请人： Hsin-Yi Ho , Nian-Kai Zous , I-Jen Huang , Yung-Feng Lin
发明人： Hsin-Yi Ho , Nian-Kai Zous , I-Jen Huang , Yung-Feng Lin
IPC分类号： G11C16/04
CPC分类号： G11C11/5628 , G11C11/5671 , G11C2211/5621
摘要： A method for programming a MLC memory is provided. The MLC memory has a number of bits, and each bit has a number of programmed states. Each programmed state has a first PV level. The method includes (a) programming the bits of the memory having a Vt level lower than the PV level of a targeted programmed state into programmed bits by using a Vd bias BL; (b) ending this method if each bit of the memory has a Vt level not lower than the PV level of the targeted programmed state, otherwise, continuing the step (c); and (c) setting BL=BL+K1 and repeating the step (a) if each of the programmed bits has a Vt level lower than the PV level, while setting BL=BL−K2, and repeating the step (a) if at least one of the programmed bits has a Vt level not lower than the PV level.
摘要翻译：提供了一种用于编程MLC存储器的方法。 MLC存储器有多个位，每个位都有多个编程状态。每个编程状态具有第一PV级别。该方法包括（a）通过使用Vd偏置BL将具有低于目标编程状态的PV电平的Vt电平的存储器的位编程为编程位; （b）如果存储器的每个位的Vt电平不低于目标编程状态的PV电平，则结束该方法，否则继续步骤（c）; 以及（c）设定BL = BL + K1，并且如果每个编程的比特都具有低于PV水平的Vt级别，而设置BL = BL-K2，并重复步骤（a），如果在至少一个编程位的Vt电平不低于PV电平。

17. 发明申请

US20090175109A1 CURRENT-MODE SENSE AMPLIFIER AND SENSE AMPLIFYING METHOD 有权
标题翻译：电流模式感应放大器和感应放大方法
公开(公告)号：US20090175109A1
公开(公告)日：2009-07-09
申请号：US11970545
申请日：2008-01-08
申请人： Yung-Feng Lin , Chun-Yi Lee
发明人： Yung-Feng Lin , Chun-Yi Lee
IPC分类号： G11C7/08
CPC分类号： G11C7/062 , G11C7/067 , G11C7/08 , G11C16/28 , G11C2207/063
摘要： A current-mode sense amplifier comprises a first current mirror, a second current mirror and an amplifying circuit. The first current mirror outputs a cell current to a memory cell and duplicates the cell current to generate a mirrored cell current. The second current mirror outputs a reference current to the reference cell and duplicates the reference current to generate a mirrored reference current. The amplifying circuit comprises a first switch, second switch, third switch and fourth switch. The first switch has first and second terminals for respectively receiving the mirrored cell and reference currents. The second and third switches have first terminals respectively coupled to the first and second terminals of the first switch, and control terminals respectively coupled to the second and first terminals of the first switch. The fourth switch is connected to second terminals of the second and third switches.
摘要翻译：电流模式读出放大器包括第一电流镜，第二电流镜和放大电路。第一电流镜将单元电流输出到存储单元并复制单元电流以产生镜像单元电流。第二电流镜将参考电流输出到参考单元并复制参考电流以产生镜像参考电流。放大电路包括第一开关，第二开关，第三开关和第四开关。第一开关具有用于分别接收镜像单元和参考电流的第一和第二端子。第二和第三开关具有分别耦合到第一开关的第一和第二端子的第一端子和分别耦合到第一开关的第二端子和第一端子的控制端子。第四开关连接到第二和第三开关的第二端子。

18. 发明申请

US20090021978A1 Multi-bit flash memory and reading method thereof 有权
标题翻译：多位闪存及其读取方法
公开(公告)号：US20090021978A1
公开(公告)日：2009-01-22
申请号：US11826574
申请日：2007-07-17
申请人： Yung-Feng Lin , Nian-Kai Zous , I-Jen Huang , Yin-Jen Chen
发明人： Yung-Feng Lin , Nian-Kai Zous , I-Jen Huang , Yin-Jen Chen
IPC分类号： G11C16/28
CPC分类号： G11C11/5642 , G11C2211/5634
摘要： A multi-bit flash memory and a reading method thereof. Multiple reference memory cells for saving reserved data are provided to operate together with multiple data memory cells. Before the data memory cells are read, data stored in the reference memory cell is sensed based on a present reference current. Then, a value of a new reference current for reading the data memory cells is determined according to a difference between the sensed data and the reserved data.
摘要翻译：一种多位闪存及其读取方法。提供用于保存预留数据的多个参考存储器单元以与多个数据存储单元一起操作。在读取数据存储单元之前，基于当前的参考电流感测存储在参考存储器单元中的数据。然后，根据感测数据和保留数据之间的差异来确定读取数据存储单元的新参考电流的值。

19. 发明授权

US08263886B2 Key mechanism with waterproofing function and related electronic device 有权
标题翻译：防水功能及相关电子设备的关键机构
公开(公告)号：US08263886B2
公开(公告)日：2012-09-11
申请号：US12761402
申请日：2010-04-16
申请人： Yung-Feng Lin , Mei-Hui Chen
发明人： Yung-Feng Lin , Mei-Hui Chen
IPC分类号： H01H13/06
CPC分类号： H01H13/86 , H01H13/063 , H01H2223/004
摘要： A key mechanism for actuating a circuit board includes a housing whereon an opening is formed, a key button installed inside the opening of the housing, and a waterproof structure installed between the key button and the circuit board for preventing fluid from leaking into the circuit board via an interface of the housing and the key button. A space is formed between the waterproof structure and the key button for containing the fluid leaking from the interface of the housing and the key button. The space is lower than the interface of the housing and the key button.
摘要翻译：用于致动电路板的键机构包括：形成开口的壳体，安装在壳体开口内的键按钮以及安装在键钮和电路板之间的防水结构，用于防止流体泄漏到电路板中通过外壳和按键的接口。在防水结构和按钮之间形成有用于容纳从壳体和键按钮的界面泄漏的流体的空间。空间低于外壳和按键的接口。

20. 发明申请

US20110005908A1 KEY MECHANISM WITH WATERPROOFING FUNCTION AND RELATED ELECTRONIC DEVICE 有权
标题翻译：具有防水功能的关键机构及相关电子设备
公开(公告)号：US20110005908A1
公开(公告)日：2011-01-13
申请号：US12761402
申请日：2010-04-16
申请人： Yung-Feng Lin , Mei-Hui Chen
发明人： Yung-Feng Lin , Mei-Hui Chen
IPC分类号： H01H13/06
CPC分类号： H01H13/86 , H01H13/063 , H01H2223/004
摘要： A key mechanism for actuating a circuit board includes a housing whereon an opening is formed, a key button installed inside the opening of the housing, and a waterproof structure installed between the key button and the circuit board for preventing fluid from leaking into the circuit board via an interface of the housing and the key button. A space is formed between the waterproof structure and the key button for containing the fluid leaking from the interface of the housing and the key button. The space is lower than the interface of the housing and the key button.
摘要翻译：用于致动电路板的键机构包括：形成开口的壳体，安装在壳体开口内的键按钮以及安装在键钮和电路板之间的防水结构，用于防止流体泄漏到电路板中通过外壳和按键的接口。在防水结构和按钮之间形成有用于容纳从壳体和键按钮的界面泄漏的流体的空间。空间低于外壳和按键的接口。

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