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11. 发明申请

US20070159353A1 Film-like article and method for manufacturing the same 有权
标题翻译：薄膜状制品及其制造方法
公开(公告)号：US20070159353A1
公开(公告)日：2007-07-12
申请号：US10586049
申请日：2005-01-20
申请人： Yasuyuki Arai , Mai Akiba , Yohei Kanno , Yuko Tachimura
发明人： Yasuyuki Arai , Mai Akiba , Yohei Kanno , Yuko Tachimura
IPC分类号： G08C19/04 , G08C19/10
CPC分类号： H01L27/1266 , H01L27/12 , H01L27/1214 , H01L27/13
摘要： Since the chip formed from a silicon wafer is thick, the chip is protruded from the surface or the chip is so large that it can be seen through the eyes, which affects the design of a business card or the like. Hence, it is an object of the present invention to provide a new integrated circuit which has a structure by which the design is not affected. In view of the above problems, it is a feature of the invention to equip a film-like article with a thin film integrated circuit. It is another feature of the invention that the IDF chip has a semiconductor film of 0.2 mm or less, as an active region. Therefore, the IDF chip can be made thinner as compared with a chip formed from a silicon wafer. In addition, such an integrated circuit can have light transmitting characteristic unlike a chip formed from a silicon wafer.
摘要翻译：由于由硅晶片形成的芯片较厚，所以芯片从表面突出，或者芯片大到可以通过眼睛看到，影响到名片的设计等。因此，本发明的目的是提供一种新的集成电路，其具有不影响设计的结构。鉴于上述问题，本发明的一个特征是为薄膜集成电路配备薄膜状制品。本发明的另一个特征是IDF芯片具有0.2mm以下的半导体膜作为活性区域。因此，与由硅晶片形成的芯片相比，可以使IDF芯片更薄。此外，这种集成电路可以具有与由硅晶片形成的芯片不同的透光特性。

12. 发明授权

US08575740B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08575740B2
公开(公告)日：2013-11-05
申请号：US13617483
申请日：2012-09-14
申请人： Yasuyuki Arai , Yuko Tachimura , Yohei Kanno , Mai Akiba
发明人： Yasuyuki Arai , Yuko Tachimura , Yohei Kanno , Mai Akiba
IPC分类号： H01L23/02
CPC分类号： H01L27/1266 , G06K19/025 , G06K19/07728 , G06K19/07749 , H01L27/1214 , H01L27/13 , H01L2221/6835 , H01L2224/73204
摘要： An object of the present invention is providing a semiconductor device that is capable of improving the reliability of a semiconductor element and enhancing the mechanical strength without suppressing the scale of a circuit. The semiconductor device includes an integrated circuit sandwiched between first and second sealing films, an antenna electrically connected to the integrated circuit, the first sealing film sandwiched between a substrate and the integrated circuit, which includes a plurality of first insulating films and at least one second insulating film sandwiched therebetween, the second sealing film including a plurality of third insulating films and at least one fourth insulating film sandwiched therebetween. The second insulating film has lower stress than the first insulting film and the fourth insulating film has lower stress than the third insulating film. The first and third insulating films are inorganic insulating films.
摘要翻译：本发明的目的在于提供一种能够提高半导体元件的可靠性并提高机械强度而不抑制电路规模的半导体装置。半导体器件包括夹在第一和第二密封膜之间的集成电路，与集成电路电连接的天线，夹在基板和集成电路之间的第一密封膜，其包括多个第一绝缘膜和至少一个第二绝缘膜夹在其间的绝缘膜，所述第二密封膜包括多个第三绝缘膜和夹在其间的至少一个第四绝缘膜。第二绝缘膜具有比第一绝缘膜低的应力，并且第四绝缘膜具有比第三绝缘膜更低的应力。第一和第三绝缘膜是无机绝缘膜。

13. 发明授权

US08305213B2 Film-like article and method for manufacturing the same 有权
标题翻译：薄膜状制品及其制造方法
公开(公告)号：US08305213B2
公开(公告)日：2012-11-06
申请号：US10586049
申请日：2005-01-20
申请人： Yasuyuki Arai , Mai Akiba , Yohei Kanno , Yuko Tachimura
发明人： Yasuyuki Arai , Mai Akiba , Yohei Kanno , Yuko Tachimura
IPC分类号： G08B13/14
CPC分类号： H01L27/1266 , H01L27/12 , H01L27/1214 , H01L27/13
摘要： Since the chip formed from a silicon wafer is thick, the chip is protruded from the surface or the chip is so large that it can be seen through the eyes, which affects the design of a business card or the like. Hence, it is an object of the present invention to provide a new integrated circuit which has a structure by which the design is not affected. In view of the above problems, it is a feature of the invention to equip a film-like article with a thin film integrated circuit. It is another feature of the invention that the IDF chip has a semiconductor film of 0.2 mm or less, as an active region. Therefore, the IDF chip can be made thinner as compared with a chip formed from a silicon wafer. In addition, such an integrated circuit can have light transmitting characteristic unlike a chip formed from a silicon wafer.
摘要翻译：由于由硅晶片形成的芯片较厚，所以芯片从表面突出，或者芯片大到可以通过眼睛看到，影响到名片的设计等。因此，本发明的目的是提供一种新的集成电路，其具有不影响设计的结构。鉴于上述问题，本发明的一个特征是为薄膜集成电路配备薄膜状制品。本发明的另一个特征是IDF芯片具有0.2mm以下的半导体膜作为活性区域。因此，与由硅晶片形成的芯片相比，可以使IDF芯片更薄。此外，这种集成电路可以具有与由硅晶片形成的芯片不同的透光特性。

14. 发明授权

US07561052B2 ID label, ID tag, and ID card 有权
标题翻译： ID标签，ID标签和身份证
公开(公告)号：US07561052B2
公开(公告)日：2009-07-14
申请号：US11044609
申请日：2005-01-28
申请人： Yasuyuki Arai , Mai Akiba , Yuko Tachimura , Yohei Kanno
发明人： Yasuyuki Arai , Mai Akiba , Yuko Tachimura , Yohei Kanno
IPC分类号： G08B13/14 , G06K19/02
CPC分类号： G06K19/07722 , G06K19/07749 , G08B13/2417 , G08B13/2437
摘要： In commercial products to which a non-contact type or contact type ID label or ID tag is attached and ID cards, there is fear that, due to a difference between coefficients of thermal expansion between an antenna for communication and a resin provided around the antenna, stress is applied to the resin with the larger coefficient of thermal expansion to break the resin. This contributes to decrease in manufacturing yield, lifetime, and reliability of an ID label or the like. In an article such as an ID label, an ID tag, and an ID card according to the present invention, a filler is included in a filling layer provided around an antenna forming an ID label, an ID tag, and an ID card so that the difference in coefficient of thermal expansion between the antenna and the filling layer can be reduced. This makes it possible to ease generation of stress due to the difference in coefficient of thermal expansion and prevent peeling and cracks of the filling layer.
摘要翻译：在与非接触型或接触型ID标签或ID标签相连的商业产品中，ID卡有恐惧，由于通信用天线与设置在天线周围的树脂之间的热膨胀系数之间的差异对具有较大的热膨胀系数的树脂施加应力以破坏树脂。这导致ID标签等的制造产量，寿命和可靠性的降低。在根据本发明的诸如ID标签，ID标签和ID卡的物品中，在形成ID标签，ID标签和ID卡的天线周围的填充层中包括填充物，使得可以降低天线与填充层之间的热膨胀系数的差异。这使得可以缓解由于热膨胀系数的差异导致的应力的产生，并且防止填充层的剥离和裂纹。

15. 发明申请

US20080224831A1 Product Management System 有权
标题翻译：产品管理系统
公开(公告)号：US20080224831A1
公开(公告)日：2008-09-18
申请号：US10594308
申请日：2005-04-06
申请人： Yasuyuki Arai , Mai Akiba , Yuko Tachimura , Yohei Kanno
发明人： Yasuyuki Arai , Mai Akiba , Yuko Tachimura , Yohei Kanno
IPC分类号： H04Q5/22
CPC分类号： H04B5/0012 , G06K7/10178 , G06K17/00 , G06K19/07758 , G06K2017/0051 , H04B5/0056 , H04B5/0081
摘要： When a product attached with an ID tag is placed inside a package body, there is a risk that communication with an ID tag using a reader/writer is blocked. Then, it is difficult to manage products in a distribution process of products, which leads to lose convenience of ID tags. One feature of the present invention is a product management system that includes a package body for packing a product attached with an ID tag, and a reader/writer. The ID tag includes a thin film integrated circuit portion and an antenna, the package body includes a resonance circuit portion having an antenna coil and a capacitor, and the resonance circuit portion can communicate with the reader/writer and the ID tag. Accordingly, the stability of communication between an ID tag attached to a product and an R/W can be secured, and management of products can be conducted simply and efficiently, even if a product is packed by a package body.
摘要翻译：当附有ID标签的产品放置在包装体内时，存在与使用读写器的ID标签进行通信的风险。然后，在产品分销过程中难以管理产品，导致ID标签的便利性不足。本发明的一个特征是产品管理系统，其包括用于打包附有ID标签的产品的包装体和读取器/写入器。 ID标签包括薄膜集成电路部分和天线，封装主体包括具有天线线圈和电容器的谐振电路部分，并且谐振电路部分可以与读取器/写入器和ID标签通信。因此，即使产品被包装体包装，也可以确保附着在产品上的ID标签与R / W之间的通信的稳定性，并且可以简单有效地进行产品的管理。

16. 发明授权

US07463049B2 Inspection method for semiconductor device 有权
标题翻译：半导体器件检验方法
公开(公告)号：US07463049B2
公开(公告)日：2008-12-09
申请号：US11862448
申请日：2007-09-27
申请人： Yasuyuki Arai , Yuko Tachimura , Mai Akiba
发明人： Yasuyuki Arai , Yuko Tachimura , Mai Akiba
IPC分类号： G01R31/26
CPC分类号： G01R31/2889 , G01R31/2886 , G01R31/3025 , G01R31/303 , G06K7/0095
摘要： The present invention provides an inspection system of ID chips that can supply a signal or power supply voltage to an ID chip without contact, and can increase throughput of an inspection process and an inspection method using the inspection system. The inspection system according to the present invention includes a plurality of inspection electrodes, a plurality of inspection antennas, a position control unit, a unit for applying voltage to each of the inspection antennas, and a unit for measuring potentials of the inspection electrodes. One feature of the inspection system is that a plurality of ID chips and the plurality of inspection electrodes are overlapped with a certain space therebetween, and the plurality of ID chips and the plurality of inspection antennas are overlapped with a certain space therebetween, and the plurality of ID chips are interposed between the plurality of inspection electrodes and the plurality of inspection antennas by the position control unit.
摘要翻译：本发明提供一种可以向ID芯片提供信号或电源电压而不接触的ID芯片的检查系统，并且可以增加检查过程的吞吐量和使用该检查系统的检查方法。根据本发明的检查系统包括多个检查电极，多个检查天线，位置控制单元，向每个检查天线施加电压的单元和用于测量检查电极的电位的单元。检查系统的一个特征在于，多个ID芯片和多个检查电极在其间具有一定的间隔重叠，并且多个ID芯片和多个检查天线在它们之间以一定的间隔重叠，并且多个的ID芯片通过位置控制单元插入在多个检查电极和多个检查天线之间。

17. 发明授权

US07667454B2 Inspection system, inspection method, and method for manufacturing semiconductor device 有权
标题翻译：检测系统，检验方法及制造半导体器件的方法
公开(公告)号：US07667454B2
公开(公告)日：2010-02-23
申请号：US12326623
申请日：2008-12-02
申请人： Yasuyuki Arai , Yuko Tachimura , Mai Akiba
发明人： Yasuyuki Arai , Yuko Tachimura , Mai Akiba
IPC分类号： H01L21/00 , H01L21/66 , H01L31/84
CPC分类号： G01R31/2889 , G01R31/2886 , G01R31/3025 , G01R31/303 , G06K7/0095
摘要： The present invention provides an inspection system of ID chips that can supply a signal or power supply voltage to an ID chip without contact, and can increase throughput of an inspection process and an inspection method using the inspection system. The inspection system according to the present invention includes a plurality of inspection electrodes, a plurality of inspection antennas, a position control unit, a unit for applying voltage to each of the inspection antennas, and a unit for measuring potentials of the inspection electrodes. One feature of the inspection system is that a plurality of ID chips and the plurality of inspection electrodes are overlapped with a certain space therebetween, and the plurality of ID chips and the plurality of inspection antennas are overlapped with a certain space therebetween, and the plurality of ID chips are interposed between the plurality of inspection electrodes and the plurality of inspection antennas by the position control unit.
摘要翻译：本发明提供一种可以向ID芯片提供信号或电源电压而不接触的ID芯片的检查系统，并且可以增加检查过程的吞吐量和使用该检查系统的检查方法。根据本发明的检查系统包括多个检查电极，多个检查天线，位置控制单元，向每个检查天线施加电压的单元和用于测量检查电极的电位的单元。检查系统的一个特征在于，多个ID芯片和多个检查电极在其间具有一定的间隔重叠，并且多个ID芯片和多个检查天线在它们之间以一定的间隔重叠，并且多个的ID芯片通过位置控制单元插入在多个检查电极和多个检查天线之间。

18. 发明申请

US20080024156A1 Inspection System, Inspection Method, and Method for Manufacturing Semiconductor Device 有权
标题翻译：检测系统，检验方法和制造半导体器件的方法
公开(公告)号：US20080024156A1
公开(公告)日：2008-01-31
申请号：US11862448
申请日：2007-09-27
申请人： Yasuyuki Arai , Yuko Tachimura , Mai Akiba
发明人： Yasuyuki Arai , Yuko Tachimura , Mai Akiba
IPC分类号： G01R31/26
CPC分类号： G01R31/2889 , G01R31/2886 , G01R31/3025 , G01R31/303 , G06K7/0095
摘要： The present invention provides an inspection system of ID chips that can supply a signal or power supply voltage to an ID chip without contact, and can increase throughput of an inspection process and an inspection method using the inspection system. The inspection system according to the present invention includes a plurality of inspection electrodes, a plurality of inspection antennas, a position control unit, a unit for applying voltage to each of the inspection antennas, and a unit for measuring potentials of the inspection electrodes. One feature of the inspection system is that a plurality of ID chips and the plurality of inspection electrodes are overlapped with a certain space therebetween, and the plurality of ID chips and the plurality of inspection antennas are overlapped with a certain space therebetween, and the plurality of ID chips are interposed between the plurality of inspection electrodes and the plurality of inspection antennas by the position control unit.
摘要翻译：本发明提供一种可以向ID芯片提供信号或电源电压而不接触的ID芯片的检查系统，并且可以增加检查过程的吞吐量和使用该检查系统的检查方法。根据本发明的检查系统包括多个检查电极，多个检查天线，位置控制单元，向每个检查天线施加电压的单元和用于测量检查电极的电位的单元。检查系统的一个特征在于，多个ID芯片和多个检查电极在其间具有一定的间隔重叠，并且多个ID芯片和多个检查天线在它们之间以一定的间隔重叠，并且多个的ID芯片通过位置控制单元插入在多个检查电极和多个检查天线之间。

19. 发明授权

US07112952B2 Inspection system, inspection method, and method for manufacturing semiconductor device 有权
标题翻译：检测系统，检验方法及制造半导体器件的方法
公开(公告)号：US07112952B2
公开(公告)日：2006-09-26
申请号：US11044982
申请日：2005-01-27
申请人： Yasuyuki Arai , Yuko Tachimura , Mai Akiba
发明人： Yasuyuki Arai , Yuko Tachimura , Mai Akiba
IPC分类号： H01L21/00 , H01L21/66 , H01L21/84
CPC分类号： G01R31/2889 , G01R31/2886 , G01R31/3025 , G01R31/303 , G06K7/0095
摘要： The present invention provides an inspection system of ID chips that can supply a signal or power supply voltage to an ID chip without contact, and can increase throughput of an inspection process and an inspection method using the inspection system. The inspection system according to the present invention includes a plurality of inspection electrodes, a plurality of inspection antennas, a position control unit, a unit for applying voltage to each of the inspection antennas, and a unit for measuring potentials of the inspection electrodes. One feature of the inspection system is that a plurality of ID chips and the plurality of inspection electrodes are overlapped with a certain space therebetween, and the plurality of ID chips and the plurality of inspection antennas are overlapped with a certain space therebetween, and the plurality of ID chips are interposed between the plurality of inspection electrodes and the plurality of inspection antennas by the position control unit.
摘要翻译：本发明提供一种可以向ID芯片提供信号或电源电压而不接触的ID芯片的检查系统，并且可以增加检查过程的吞吐量和使用该检查系统的检查方法。根据本发明的检查系统包括多个检查电极，多个检查天线，位置控制单元，向每个检查天线施加电压的单元和用于测量检查电极的电位的单元。检查系统的一个特征在于，多个ID芯片和多个检查电极在其间具有一定的间隔重叠，并且多个ID芯片和多个检查天线在它们之间以一定的间隔重叠，并且多个的ID芯片通过位置控制单元插入在多个检查电极和多个检查天线之间。

20. 发明申请

US20050168235A1 Inspection system, inspection method, and method for manufacturing semiconductor device 有权
标题翻译：检测系统，检验方法及制造半导体器件的方法
公开(公告)号：US20050168235A1
公开(公告)日：2005-08-04
申请号：US11044982
申请日：2005-01-27
申请人： Yasuyuki Arai , Yuko Tachimura , Mai Akiba
发明人： Yasuyuki Arai , Yuko Tachimura , Mai Akiba
IPC分类号： H01L21/66 , G01R31/28 , G01R31/303 , G01R31/26
CPC分类号： G01R31/2889 , G01R31/2886 , G01R31/3025 , G01R31/303 , G06K7/0095
摘要： The present invention provides an inspection system of ID chips that can supply a signal or power supply voltage to an ID chip without contact, and can increase throughput of an inspection process and an inspection method using the inspection system. The inspection system according to the present invention includes a plurality of inspection electrodes, a plurality of inspection antennas, a position control unit, a unit for applying voltage to each of the inspection antennas, and a unit for measuring potentials of the inspection electrodes. One feature of the inspection system is that a plurality of ID chips and the plurality of inspection electrodes are overlapped with a certain space therebetween, and the plurality of ID chips and the plurality of inspection antennas are overlapped with a certain space therebetween, and the plurality of ID chips are interposed between the plurality of inspection electrodes and the plurality of inspection antennas by the position control unit.
摘要翻译：本发明提供一种可以向ID芯片提供信号或电源电压而不接触的ID芯片的检查系统，并且可以增加检查过程的吞吐量和使用该检查系统的检查方法。根据本发明的检查系统包括多个检查电极，多个检查天线，位置控制单元，向每个检查天线施加电压的单元和用于测量检查电极的电位的单元。检查系统的一个特征在于，多个ID芯片和多个检查电极在其间具有一定的间隔重叠，并且多个ID芯片和多个检查天线在其间具有一定的间隔重叠，并且多个的ID芯片通过位置控制单元插入在多个检查电极和多个检查天线之间。

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