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11. 发明申请

US20060002174A1 Driving method of variable resistance element and memory device 有权
标题翻译：可变电阻元件和存储器件的驱动方法
公开(公告)号：US20060002174A1
公开(公告)日：2006-01-05
申请号：US11169535
申请日：2005-06-28
申请人： Yasunari Hosoi , Yukio Tamai , Kazuya Ishihara , Shinji Kobayashi , Nobuyoshi Awaya
发明人： Yasunari Hosoi , Yukio Tamai , Kazuya Ishihara , Shinji Kobayashi , Nobuyoshi Awaya
IPC分类号： G11C11/00
CPC分类号： G11C29/50 , G11C13/0007 , G11C13/0069 , G11C29/50008 , G11C2013/009 , G11C2213/31
摘要： A variable resistance element is configured to be provided with a perovskite-type oxide between a first electrode and a second electrode, of which electric resistance between the first electrode and the second electrode is changed by applying a voltage pulse of a predetermined polarity between the first electrode and the second electrode, and the variable resistance element has a resistance hysteresis characteristic, in which a changing rate of a resistance value is changed from positive to negative with respect to increase of a cumulative pulse applying time in the application of the voltage pulse. The voltage pulse is applied to the variable resistance element so that the cumulative pulse applying time is not longer than a specific cumulative pulse applying time, in which the changing rate of the, resistance value is changed from positive to negative with respect to increase of the cumulative pulse applying time in the resistance hysteresis characteristic.
摘要翻译：可变电阻元件被配置为在第一电极和第二电极之间设置有钙钛矿型氧化物，其中通过在第一电极和第二电极之间施加预定极性的电压脉冲来改变第一电极和第二电极之间的电阻电极和第二电极，并且可变电阻元件具有电阻滞后特性，其中电阻值的变化率相对于施加电压脉冲的累积脉冲施加时间的增加而从正变化到负。电压脉冲被施加到可变电阻元件，使得累积脉冲施加时间不长于特定的累积脉冲施加时间，其中电阻值的变化率相对于增加的电阻值从正变化到负累积脉冲施加时间在电阻滞后特性。

12. 发明授权

US08054674B2 Variable resistive element, manufacturing method for same, and non-volatile semiconductor memory device 有权
标题翻译：可变电阻元件，相同的制造方法和非易失性半导体存储器件
公开(公告)号：US08054674B2
公开(公告)日：2011-11-08
申请号：US12598642
申请日：2008-04-07
申请人： Yukio Tamai , Yasunari Hosoi , Nobuyoshi Awaya , Shigeo Ohnishi , Kazuya Ishihara , Hisashi Shima , Hiroyuki Akinaga , Fumiyoshi Takano
发明人： Yukio Tamai , Yasunari Hosoi , Nobuyoshi Awaya , Shigeo Ohnishi , Kazuya Ishihara , Hisashi Shima , Hiroyuki Akinaga , Fumiyoshi Takano
IPC分类号： G11C11/00
CPC分类号： G11C13/0011 , G11C11/5614 , G11C11/5685 , G11C13/0007 , G11C13/0069 , G11C2013/0073 , G11C2013/0083 , G11C2013/009 , G11C2213/32 , G11C2213/34 , G11C2213/51 , G11C2213/56 , G11C2213/77 , H01L27/101 , H01L45/08 , H01L45/1233 , H01L45/146
摘要： Provided is a variable resistive element which performs high speed and low power consumption operation. The variable resistive element comprises a metal oxide layer between first and second electrodes wherein electrical resistance between the first and second electrodes reversibly changes in accordance with application of electrical stress across the first and second electrodes. The metal oxide layer has a filament, which is a current path where the density of a current flowing between the first and second electrodes locally increases. A portion including at least the vicinity of an interface between the certain electrode, which is one or both of the first and second electrodes, and the filament, on an interface between the certain electrode and the metal oxide layer is provided with an interface oxide which is an oxide of at least one element included in the certain electrode and different from the oxide of the metal oxide layer.
摘要翻译：提供一种执行高速和低功耗操作的可变电阻元件。可变电阻元件包括在第一和第二电极之间的金属氧化物层，其中第一和第二电极之间的电阻根据跨越第一和第二电极的电应力的应用而可逆地改变。金属氧化物层具有灯丝，其是在第一和第二电极之间流动的电流的密度局部增加的电流路径。在特定电极和金属氧化物层之间的界面上至少包括作为第一和第二电极中的一个或两个的特定电极和灯丝之间的界面附近的部分设置有界面氧化物，其界面氧化物是包含在该特定电极中并且与金属氧化物层的氧化物不同的至少一种元素的氧化物。

13. 发明授权

US07236388B2 Driving method of variable resistance element and memory device 有权
标题翻译：可变电阻元件和存储器件的驱动方法
公开(公告)号：US07236388B2
公开(公告)日：2007-06-26
申请号：US11169535
申请日：2005-06-28
申请人： Yasunari Hosoi , Yukio Tamai , Kazuya Ishihara , Shinji Kobayashi , Nobuyoshi Awaya
发明人： Yasunari Hosoi , Yukio Tamai , Kazuya Ishihara , Shinji Kobayashi , Nobuyoshi Awaya
IPC分类号： G11C11/00
CPC分类号： G11C29/50 , G11C13/0007 , G11C13/0069 , G11C29/50008 , G11C2013/009 , G11C2213/31
摘要： A variable resistance element is configured to be provided with a perovskite-type oxide between a first electrode and a second electrode, of which electric resistance between the first electrode and the second electrode is changed by applying a voltage pulse of a predetermined polarity between the first electrode and the second electrode, and the variable resistance element has a resistance hysteresis characteristic, in which a changing rate of a resistance value is changed from positive to negative with respect to increase of a cumulative pulse applying time in the application of the voltage pulse. The voltage pulse is applied to the variable resistance element so that the cumulative pulse applying time is not longer than a specific cumulative pulse applying time, in which the changing rate of the, resistance value is changed from positive to negative with respect to increase of the cumulative pulse applying time in the resistance hysteresis characteristic.
摘要翻译：可变电阻元件被配置为在第一电极和第二电极之间设置有钙钛矿型氧化物，其中通过在第一电极和第二电极之间施加预定极性的电压脉冲来改变第一电极和第二电极之间的电阻电极和第二电极，并且可变电阻元件具有电阻滞后特性，其中电阻值的变化率相对于施加电压脉冲的累积脉冲施加时间的增加而从正变化到负。电压脉冲被施加到可变电阻元件，使得累积脉冲施加时间不长于特定的累积脉冲施加时间，其中电阻值的变化率相对于增加的电阻值从正变化到负累积脉冲施加时间在电阻滞后特性。

14. 发明授权

US07884699B2 Variable resistor element, manufacturing method thereof, and memory device provided with it 有权
标题翻译：可变电阻元件及其制造方法以及设置有该电阻元件的存储器件
公开(公告)号：US07884699B2
公开(公告)日：2011-02-08
申请号：US11997184
申请日：2006-07-21
申请人： Yasunari Hosoi
发明人： Yasunari Hosoi
IPC分类号： H01C7/10
CPC分类号： H01L45/04 , G11C13/0007 , G11C13/0026 , G11C2213/52 , G11C2213/79 , H01L27/2436 , H01L45/1233 , H01L45/145 , H01L45/1633 , H01L45/1675 , Y10T29/49082
摘要： A variable resistor element comprising a first electrode, a second electrode, and a variable resistor positioned between the first and second electrodes, and changing in electric resistance when a voltage pulse is applied between the both electrodes, has posed problems that it has a restriction of having to use noble metal electrodes as an electrode material and is not compatible with a conventional CMOS process. A variable resistor element using an oxynitride of transition metal element as a variable resistor exhibits a stable switching operation, is satisfactory in data retaining characteristics, and requires a small programming current. Since it does not necessarily require noble metal as an electrode material, it is high in compatibility with the existing CMOS process and easy to produce. It can be formed by a simple step of forming a variable resistor material into a film by oxidizing a lower electrode surface consisting of conductive nitride.
摘要翻译：一种可变电阻器元件，包括位于第一和第二电极之间的第一电极，第二电极和可变电阻器，以及当在两个电极之间施加电压脉冲时电阻变化的问题，其具有限制必须使用贵金属电极作为电极材料，并且与常规CMOS工艺不兼容。使用过渡金属元素的氧氮化物作为可变电阻器的可变电阻器元件具有稳定的开关操作，在数据保持特性方面是令人满意的，并且需要小的编程电流。由于不需要贵金属作为电极材料，因此与现有的CMOS工艺的兼容性高，易于制造。可以通过通过氧化由导电氮化物组成的下电极表面来形成可变电阻器材料到膜中的简单步骤来形成。

15. 发明申请

US20100085142A1 VARIABLE RESISTOR ELEMENT, MANUFACTURING METHOD THEREOF, AND MEMORY DEVICE PROVIDED WITH IT 有权
标题翻译：可变电阻元件及其制造方法及其提供的存储器件
公开(公告)号：US20100085142A1
公开(公告)日：2010-04-08
申请号：US11997184
申请日：2006-07-21
申请人： Yasunari Hosoi
发明人： Yasunari Hosoi
IPC分类号： H01L27/10 , H01C17/00
CPC分类号： H01L45/04 , G11C13/0007 , G11C13/0026 , G11C2213/52 , G11C2213/79 , H01L27/2436 , H01L45/1233 , H01L45/145 , H01L45/1633 , H01L45/1675 , Y10T29/49082
摘要： A variable resistor element comprising a first electrode, a second electrode, and a variable resistor positioned between the first and second electrodes, and changing in electric resistance when a voltage pulse is applied between the both electrodes, has posed problems that it has a restriction of having to use noble metal electrodes as an electrode material and is not compatible with a conventional CMOS process. A variable resistor element using an oxynitride of transition metal element as a variable resistor exhibits a stable switching operation, is satisfactory in data retaining characteristics, and requires a small programming current. Since it does not necessarily require noble metal as an electrode material, it is high in compatibility with the existing CMOS process and easy to produce. It can be formed by a simple step of forming a variable resistor material into a film by oxidizing a lower electrode surface consisting of conductive nitride.
摘要翻译：一种可变电阻器元件，包括位于第一和第二电极之间的第一电极，第二电极和可变电阻器，以及当在两个电极之间施加电压脉冲时电阻变化的问题，其具有限制必须使用贵金属电极作为电极材料，并且与常规CMOS工艺不兼容。使用过渡金属元素的氧氮化物作为可变电阻器的可变电阻器元件具有稳定的开关操作，在数据保持特性方面是令人满意的，并且需要小的编程电流。由于不需要贵金属作为电极材料，因此与现有的CMOS工艺的兼容性高，易于制造。可以通过通过氧化由导电氮化物组成的下电极表面来形成可变电阻器材料到膜中的简单步骤来形成。

16. 发明申请

US20070165442A1 Nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US20070165442A1
公开(公告)日：2007-07-19
申请号：US11647329
申请日：2006-12-29
申请人： Yasunari Hosoi , Nobuyoshi Awaya , Isao Inoue
发明人： Yasunari Hosoi , Nobuyoshi Awaya , Isao Inoue
IPC分类号： G11C17/00
CPC分类号： G11C13/0069 , G11C13/0007 , G11C13/003 , G11C2013/009 , G11C2213/31 , G11C2213/32 , G11C2213/72 , G11C2213/76 , G11C2213/79
摘要： A nonvolatile semiconductor device is configured so that a load circuit applying voltage to a variable resistive element is provided electrically connecting in series to the variable resistive element, a load resistive characteristic of the load circuit can be switched between two different characteristics. The two load resistive characteristics are selectively switched depending on whether a resistive characteristic of the variable resistive element transits from low resistance state to high resistance state, or vice versa, voltage necessary for transition from one of the two resistive characteristics to the other is applied by applying writing voltage to a serial circuit of the variable resistive element and load circuit. After the resistive characteristic of the variable resistive element transits from one to the other, voltage applied to the variable resistive element does not allow a resistive characteristic to return from the other to one depending on the selected load resistive characteristic.
摘要翻译：非易失性半导体器件被配置为使得向可变电阻元件施加电压的负载电路被提供为电连接到可变电阻元件，负载电路的负载电阻特性可以在两个不同特性之间切换。根据可变电阻元件的电阻特性是否从低电阻状态转变为高电阻状态，反之亦然，两个负载电阻特性被选择性地切换，或者反过来，通过两个电阻特性之一转换到另一个电阻特性所需的电压被施加对可变电阻元件和负载电路的串联电路施加写入电压。在可变电阻元件的电阻特性从一个转变到另一个之后，施加到可变电阻元件的电压根据所选择的负载电阻特性不允许电阻特性从另一个返回到一个。

17. 发明授权

US06341082B2 Ferroelectric memory capable of suppressing deterioration of dummy cells and drive method therefor 失效
标题翻译：能够抑制虚设电池的劣化的铁电存储器及其驱动方法
公开(公告)号：US06341082B2
公开(公告)日：2002-01-22
申请号：US09796605
申请日：2001-03-02
申请人： Yasunari Hosoi
发明人： Yasunari Hosoi
IPC分类号： G11C1122
CPC分类号： H01L27/11502 , G11C11/22
摘要： A ferroelectric memory has a memory cell array including at least three memory cells composed of a ferroelectric capacitor, and first and second transistors connected in parallel to one electrode of the ferroelectric capacitor, a first bit line to which the ferroelectric capacitors of the memory cells are connected in parallel via the first transistors, and a second bit line to which the ferroelectric capacitors of a plurality of memory cells are connected via the second transistors. The ferroelectric memory has a decision device for comparing a voltage of the first bit line and a voltage of the second bit line to each other to decide whether data is a logical “1” or a logical “0”. Thus, deterioration of dummy cells which undergo larger numbers of reads than data cells is suppressed and, as a result, an intermediate voltage can correctly be generated.
摘要翻译：铁电存储器具有包括由铁电电容器构成的至少三个存储单元的存储单元阵列以及并联连接到铁电电容器的一个电极的第一和第二晶体管，存储单元的强电介质电容器的第一位线经由第一晶体管并联连接的第二位线和经由第二晶体管连接多个存储单元的铁电电容器的第二位线。铁电存储器具有用于将第一位线的电压与第二位线的电压相互比较以决定数据是逻辑“1”还是逻辑“0”的判定装置。因此，抑制了比数据单元更大数量的读取的虚拟单元的劣化，结果可以正确地产生中间电压。

18. 发明授权

US08023312B2 Nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US08023312B2
公开(公告)日：2011-09-20
申请号：US12515286
申请日：2007-11-05
申请人： Shinobu Yamazaki , Yasunari Hosoi , Nobuyoshi Awaya , Shinichi Sato , Kenichi Tanaka
发明人： Shinobu Yamazaki , Yasunari Hosoi , Nobuyoshi Awaya , Shinichi Sato , Kenichi Tanaka
IPC分类号： G11C11/00
CPC分类号： H01L27/101 , G11C13/0007 , G11C13/003 , G11C2213/15 , G11C2213/32 , G11C2213/34 , G11C2213/71 , G11C2213/72 , G11C2213/76 , G11C2213/77 , G11C2213/79 , H01L27/2409 , H01L27/2463 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/145 , H01L45/146 , H01L45/1633
摘要： A nonvolatile semiconductor memory device include: a two terminal structured variable resistive element, wherein resistive characteristics defined by current-voltage characteristics at both ends transit between low and high resistance states stably by applying a voltage satisfying predetermined conditions to the both ends. A transition from the low resistance state to the high resistance state occurs by applying a voltage of a first polarity whose absolute value is at or higher than first threshold voltage, and the reverse transition occurs by applying a voltage of a second polarity whose absolute value is at or higher than a second threshold voltage. A load circuit is connected to the variable resistive element in series having an adjustable load resistance. A voltage generation circuit applies a voltage to both ends of a serial circuit. The variable resistive element can transit between the states by adjusting a resistance of the load circuit.
摘要翻译：非易失性半导体存储器件包括：二端结构可变电阻元件，其中由两端的电流 - 电压特性限定的电阻特性通过向两端施加满足预定条件的电压来稳定地传递低电阻状态和高电阻状态。通过施加绝对值等于或高于第一阈值电压的第一极性的电压而发生从低电阻状态向高电阻状态的转变，并且通过施加绝对值为绝对值的第二极性的电压，等于或高于第二阈值电压。负载电路与可变负载电阻串联连接到可变电阻元件。电压产生电路向串联电路的两端施加电压。可变电阻元件可以通过调整负载电路的电阻在状态之间转换。

19. 发明授权

US07952909B2 Nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US07952909B2
公开(公告)日：2011-05-31
申请号：US12517025
申请日：2007-11-05
申请人： Kohji Inoue , Yasunari Hosoi , Shigeo Ohnishi , Nobuyoshi Awaya
发明人： Kohji Inoue , Yasunari Hosoi , Shigeo Ohnishi , Nobuyoshi Awaya
IPC分类号： G11C11/00
CPC分类号： G11C13/0007 , G11C13/0026 , G11C13/0038 , G11C13/0069 , G11C2013/009 , G11C2213/15 , G11C2213/32 , G11C2213/34 , G11C2213/72 , G11C2213/77 , G11C2213/79 , H01L27/101 , H01L27/1021 , H01L27/2409 , H01L27/2436 , H01L45/04 , H01L45/1233 , H01L45/145 , H01L45/146 , H01L45/1633
摘要： Provided is a nonvolatile semiconductor device capable of performing writing operations of different resistance changes for memory cells having variable resistive elements whose resistive characteristics are changed by voltage applications, individually and simultaneously. The device includes: a load resistive characteristic variable circuit for each bit line connected commonly with the memory cells on the same column for selecting one of two load resistive characteristics according to a first writing operation where the resistive characteristics of the variable resistive element to be written transit from a low resistance state to a high resistance state or a second writing operation where they transit reversely; and a writing voltage pulse application circuit for applying a first voltage pulse in a first writing operation and a second voltage pulse in a second writing operation to the memory cells to be written through the load resistive characteristic variable circuits and the bit limes.
摘要翻译：提供了一种非易失性半导体器件，其能够对具有可变电阻元件的存储单元进行不同的电阻变化的写入操作，该电阻元件的电阻特性单独并同时由电压应用而改变。该装置包括：用于与同一列上的存储器单元共同连接的每个位线的负载电阻特性可变电路，用于根据要写入的可变电阻元件的电阻特性的第一写入操作来选择两个负载电阻特性中的一个从低电阻状态转移到高电阻状态或其反向转发的第二写入操作; 以及写入电压脉冲施加电路，用于将第一写入操作中的第一电压脉冲和第二写入操作中的第二电压脉冲施加到要通过负载电阻特性可变电路和位灰分写入的存储单元。

20. 发明申请

US20100073983A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND WRITING METHOD OF THE SAME 有权
标题翻译：非易失性半导体存储器件及其写入方法
公开(公告)号：US20100073983A1
公开(公告)日：2010-03-25
申请号：US12525615
申请日：2008-02-01
申请人： Yasunari Hosoi
发明人： Yasunari Hosoi
IPC分类号： G11C11/00 , G11C5/02 , G11C7/00
CPC分类号： G11C13/0007 , G11C11/5685 , G11C13/0069 , G11C2013/0071 , G11C2013/009 , G11C2213/15 , G11C2213/32 , G11C2213/34 , G11C2213/72 , G11C2213/77 , G11C2213/79 , H01L27/2409 , H01L27/2436 , H01L45/04 , H01L45/1233 , H01L45/145 , H01L45/146 , H01L45/1633
摘要： A nonvolatile semiconductor memory device comprises a memory cell array composed of a plurality of memory cells each including a variable resistance element in which a resistance characteristic is changed by applying a voltage to the both ends, and information related to the resistance characteristic can be stored; a load circuit connected to one terminal of the variable resistance element in series; and a voltage generation circuit for applying a voltage to both ends of a series circuit. The variable resistance element selectively transits to one resistance characteristic selected from at least three different resistance characteristics when the voltage generated from the voltage generation circuit is applied under the transition condition set by changing any one or both of the load resistance characteristic of the load circuit and the voltage generation condition from the voltage generation circuit, and can store information having at least three values.
摘要翻译：非易失性半导体存储器件包括由多个存储单元组成的存储单元阵列，每个存储单元包括通过向两端施加电压而改变电阻特性的可变电阻元件，并且可以存储与电阻特性相关的信息; 连接到可变电阻元件的一个端子的负载电路; 以及用于向串联电路的两端施加电压的电压产生电路。当在通过改变负载电路的负载电阻特性和负载电路的任一个或两个而设置的转变条件下施加从电压产生电路产生的电压时，可变电阻元件选择性地转换到从至少三个不同的电阻特性中选择的一个电阻特性，来自电压产生电路的电压产生条件，并且可以存储具有至少三个值的信息。

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