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    • 17. 发明授权
    • Interrupt and message batching apparatus and method
    • 中断和消息批处理设备和方法
    • US6085277A
    • 2000-07-04
    • US950755
    • 1997-10-15
    • Gregory Michael NordstromShawn Michael LambethPaul Edward MovallDaniel Frank MoertlCharles Scott GrahamWilliam Joseph ArmstrongThomas Rembert Sand
    • Gregory Michael NordstromShawn Michael LambethPaul Edward MovallDaniel Frank MoertlCharles Scott GrahamWilliam Joseph ArmstrongThomas Rembert Sand
    • G06F9/46G06F13/00
    • G06F9/546
    • An interrupt and message batching apparatus and method reduces the number and frequency of processor interrupts and resulting context switches by grouping I/O completion events together with a single processor interrupt in a manner that balances I/O operation latency requirements with processor utilization requirements to optimize overall computer system performance. The invention sends a message from a processor complex to an I/O adapter on an I/O bus commanding an I/O device connected to the I/O adapter to perform a function. Upon completion of the commanded function, the message processor in the I/O adapter generates a message and sends it to the processor complex on the I/O bus. The message is enqueued in the message queue of the memory, a message count is updated, and processor complex interrupt is signalled if and when the message count exceeds a message pacing count. A signalling timer may also be programmed with a fast response time value if the message has a relatively high latency or with a slow response time value if the message has a relatively low latency. The signalling timer is started when the message is enqueued and the processor complex interrupt is then signalled when the message count exceeds the message pacing count or when the signalling timer has elapsed.
    • 中断和消息批处理设备和方法通过将I / O完成事件与单个处理器中断分组,以使I / O操作等待时间要求与处理器利用率要求平衡来优化,从而减少处理器中断和结果上下文切换的数量和频率 整体计算机系统性能。 本发明在I / O总线上从处理器复合体向I / O适配器发送消息,命令连接到I / O适配器的I / O设备执行功能。 完成命令功能后,I / O适配器中的消息处理器会生成一条消息,并将其发送到I / O总线上的处理器复合体。 该消息在存储器的消息队列中排队,消息计数被更新,并且当消息计数超过消息步调计数时以及何时发送处理器复杂中断。 如果消息具有相对较高的延迟,或者如果消息具有相对低的延迟,则信令定时器也可以被编程为具有快速的响应时间值。 当消息排入队列时,启动信令定时器,然后当消息计数超过消息起搏计数或信令定时器过去时,信号通知处理器复杂中断。
    • 20. 发明授权
    • Enhanced reset and built-in self-test mechanisms for single function and
multifunction input/output devices
    • 增强的复位和内置自检机构,用于单功能和多功能输入/输出设备
    • US6073253A
    • 2000-06-06
    • US995075
    • 1997-12-19
    • Gregory Michael NordstromShawn Michael LambethPaul Edward MovallDaniel Frank MoertlCharles Scott GrahamPaul John JohnsenThomas Rembert Sand
    • Gregory Michael NordstromShawn Michael LambethPaul Edward MovallDaniel Frank MoertlCharles Scott GrahamPaul John JohnsenThomas Rembert Sand
    • G06F1/24G06F11/267G06F11/00
    • G06F11/267G06F1/24
    • An apparatus, system and method permitting a variety of reset procedures and corresponding reset states. A device reset control register is provided for each I/O device adapter in single function or multifunction devices. The device reset control registers permit a greater degree of control over single function devices, multifunction device as a whole and individual device functions within a multifunction device. A device immediate status register synchronizes the various reset procedures. A logical power on reset procedure, a directed unit reset procedure and a directed interface reset procedure utilize the greater degree of control that the device reset control registers provide to force the I/O device adapter, single function device or multifunction device into a corresponding logical power on reset state, a directed unit reset state or a directed interface reset state. Each of these reset states is well-defined and has the advantage of predictable behavior during and after execution of the corresponding reset procedure. A built-in self-test procedure is also defined that sequentially examines each function associated within a multifunction device connected to the local bus to coordinate the initiation, execution and completion of built in self-tests.
    • 允许各种复位过程和相应复位状态的装置,系统和方法。 为单个功能或多功能设备中的每个I / O设备适配器提供器件复位控制寄存器。 器件复位控制寄存器允许对单个功能器件,多功能器件作为一个整体进行更大程度的控制,以及多功能器件中的各个器件功能。 设备立即状态寄存器可以同步各种复位过程。 逻辑上电复位程序,有向单元复位程序和定向接口复位程序利用设备复位控制寄存器提供的更大程度的控制力将I / O设备适配器,单功能设备或多功能设备强制为相应的逻辑 上电复位状态,定向单元复位状态或定向接口复位状态。 这些复位状态中的每一个都被明确定义,并且具有在执行相应的复位过程期间和之后可预测的行为的优点。 还定义了一个内置的自检程序,依次检查连接到本地总线的多功能设备中相关联的每个功能,以协调内置自检的启动,执行和完成。