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11. 发明授权

US08007438B2 Ultrasound probe and ultrasound elasticity imaging apparatus 有权
标题翻译：超声探头和超声弹性成像仪
公开(公告)号：US08007438B2
公开(公告)日：2011-08-30
申请号：US12081335
申请日：2008-04-15
申请人： Takashi Osaka , Takeshi Matsumura , Tetsuya Hayashi , Mitsuhiro Oshiki , Okinori Yuasa , Naoyuki Murayama , Tsuyoshi Shiina , Satoshi Tamano , Tsuyoshi Mitake
发明人： Takashi Osaka , Takeshi Matsumura , Tetsuya Hayashi , Mitsuhiro Oshiki , Okinori Yuasa , Naoyuki Murayama , Tsuyoshi Shiina , Satoshi Tamano , Tsuyoshi Mitake
IPC分类号： A61B8/00
CPC分类号： A61B8/12 , A61B5/0048 , A61B5/6843 , A61B8/08 , A61B8/445 , A61B8/463 , A61B8/485
摘要： An ultrasound diagnostic apparatus includes an ultrasound probe which transmits/receives an ultrasound wave with respect to a subject to be diagnosed, an ultrasound wave transmit section which transmits an ultrasound wave for driving the ultrasound probe, a pressing section which applies an external pressure to the subject, a displacement measuring section which obtains two tomographic image data different in time series from a reflected echo signal received from the ultrasound probe and measures a displacement of each part in the subject based on the two tomographic image data, an image generating section which generates an elastic image from elasticity information based on the displacement of each part measured by the displacement measuring section, and a display section which displays the generated elastic image. Further, a pressing decision section decides whether or not the pressing operation by the pressing section is proper.
摘要翻译：超声波诊断装置包括相对于被诊断对象发送/接收超声波的超声波探头，发送用于驱动超声波探头的超声波的超声波发送部，向外部施加外部压力的按压部，位移测量部分，其获得与从超声探头接收的反射回波信号不同的时间序列的两个断层图像数据，并且基于两个断层图像数据测量被检体中每个部位的位移;图像生成部，其生成基于由位移测量部测量的每个部分的位移的弹性信息的弹性图像和显示所生成的弹性图像的显示部。此外，按压判定部判定按压部的按压操作是否合适。

12. 发明授权

US07995646B2 Communication test circuit, communication interface circuit, and communication test method 有权
标题翻译：通信测试电路，通信接口电路和通信测试方法
公开(公告)号：US07995646B2
公开(公告)日：2011-08-09
申请号：US11898658
申请日：2007-09-13
申请人： Tetsuya Hayashi , Masanori Yoshitani , Tomokazu Higuchi
发明人： Tetsuya Hayashi , Masanori Yoshitani , Tomokazu Higuchi
IPC分类号： H04B17/00
CPC分类号： H04L7/033 , G01R31/31725 , G01R31/31727
摘要： A communication test circuit for allowing a tolerance test to be carried out in a general testing environment. The communication test circuit includes an adder and a second clock generation block. When an offset is input to the adder, the adder adds the offset to a phase adjustment signal for adjusting the phase of a clock signal for data detection and outputs the result to the second clock generation block. The second clock generation block outputs a second clock signal adjusted in accordance with the phase adjustment signal to which the offset has been added. Accordingly, a clock signal shifted in accordance with the offset from a natural clock signal along the time axis is generated at a test.
摘要翻译：用于允许在通用测试环境中进行公差测试的通信测试电路。通信测试电路包括加法器和第二时钟发生模块。当偏移被输入到加法器时，加法器将偏移量相加到用于调整用于数据检测的时钟信号的相位的相位调整信号，并将结果输出到第二时钟产生块。第二时钟产生块输出根据已经添加了偏移的相位调整信号调整的第二时钟信号。因此，在测试时产生根据与时间轴的自然时钟信号的偏移偏移的时钟信号。

13. 发明授权

US07942821B2 Doppler velocity detection device and ultrasonographic device using the same 失效
标题翻译：多普勒速度检测装置及其使用的超声波装置
公开(公告)号：US07942821B2
公开(公告)日：2011-05-17
申请号：US10580225
申请日：2004-07-09
申请人： Shin-ichiro Umemura , Takashi Azuma , Tetsuya Hayashi
发明人： Shin-ichiro Umemura , Takashi Azuma , Tetsuya Hayashi
IPC分类号： A61B8/00
CPC分类号： G01S15/8981 , G01S15/8977
摘要： The present invention realizes a Doppler velocity detecting technique capable of performing velocity detection and analysis with a suppressed error while excellently distinguishing a clutter signal, and provides an ultrasonographic device using the technique. In a Doppler velocity detection device comprising means for transmitting/receiving pulse waves to/from a subject a plurality of times, and velocity analyzing means for analyzing a velocity of a moving reflector in the subject on the basis of a reception echo signal, the velocity analyzing means obtains a complex expansion coefficient by linearly connecting an expansion coefficient of an even-numbered degree term and an expansion coefficient of an odd-numbered degree term which is different from the even-numbered degree term by one degree, derived when reception echo time-series signals obtained by arranging reception echo signals of equal lapse time from pulse transmission times in order of the transmission times are expanded as components of a Legendre polynomial starting from the 0th degree, by using an imaginary unit as a coefficient, and obtains a signed velocity signal of a moving reflector in the subject on the basis of-the ratio between the magnitude of each complex expansion coefficient and the magnitude of an interval between the complex expansion coefficients.
摘要翻译：本发明实现了一种多普勒速度检测技术，其能够在抑制误差的同时进行速度检测和分析，同时优异地区分杂波信号，并提供使用该技术的超声波装置。在多普勒速度检测装置中，包括用于多次向对象发送/接收脉搏波的装置，以及速度分析装置，用于根据接收回波信号分析被检体内的移动反射器的速度，速度分析装置通过将偶数度项的展开系数和与偶数度项不同的奇数项的展开系数线性连接一度获得复数展开系数，当接收回波时间通过使用虚数单位作为系数，将从发送时间的顺序的脉冲发送时间的等待通过时间的接收回波信号作为从第0度开始的勒让德多项式的分量扩展得到的系列信号，基于每个复合扩张系数的大小之间的比例，对象中的移动反射器的速度信号有效率和复合扩张系数间隔的大小。

14. 发明授权

US07910923B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07910923B2
公开(公告)日：2011-03-22
申请号：US11961221
申请日：2007-12-20
申请人： Tetsuya Hayashi , Masakatsu Hoshi , Hideaki Tanaka , Shigeharu Yamagami
发明人： Tetsuya Hayashi , Masakatsu Hoshi , Hideaki Tanaka , Shigeharu Yamagami
IPC分类号： H01L29/04
CPC分类号： H01L27/088 , H01L21/32139 , H01L27/0605 , H01L29/0619 , H01L29/0623 , H01L29/1608 , H01L29/267 , H01L29/4236 , H01L29/66068 , H01L29/7828
摘要： A semiconductor device with superior long-term reliability is disclosed that alleviates current concentration into a switch structure arranged at an outermost portion. The semiconductor device comprises hetero semiconductor regions formed of polycrystalline silicon having a band gap width different from that of a drift region and hetero-adjoined with the drift region, a gate insulation film, a gate electrode adjoined to the gate insulation film, a source electrode connected to a source contact portion of the hetero semiconductor regions and an outermost switch structure and a repeating portion switch structure with a drain electrode connected to a substrate region. In a conduction state, the outermost switch structure comprises a mechanism in which the current flowing at the outermost switch structure becomes smaller than the current flowing at the repeating portion switch structure.
摘要翻译：公开了一种具有优异的长期可靠性的半导体器件，其将电流浓度减轻到布置在最外部的开关结构。半导体器件包括由多晶硅形成的异质半导体区域，该多晶硅的带隙宽度与漂移区域的带隙宽度不同，并且与漂移区域异质相邻，栅极绝缘膜，与栅极绝缘膜邻接的栅电极，源电极连接到异质半导体区域的源极接触部分和最外面的开关结构以及具有连接到衬底区域的漏电极的重复部分开关结构。在导通状态下，最外面的开关结构包括一种机构，其中在最外侧开关结构处流动的电流变得小于在重复部分开关结构处流动的电流。

15. 发明授权

US07902025B2 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07902025B2
公开(公告)日：2011-03-08
申请号：US11773649
申请日：2007-07-05
申请人： Tetsuya Hayashi , Masakatsu Hoshi , Yoshio Shimoida , Hideaki Tanaka , Shigeharu Yamagami
发明人： Tetsuya Hayashi , Masakatsu Hoshi , Yoshio Shimoida , Hideaki Tanaka , Shigeharu Yamagami
IPC分类号： H01L21/336
CPC分类号： H01L29/7828 , H01L29/0623 , H01L29/1608 , H01L29/267 , H01L29/66068
摘要： A semiconductor substrate made of a semiconductor material is prepared, and a hetero semiconductor region is formed on the semiconductor substrate to form a heterojunction in an interface between the hetero semiconductor region and the semiconductor substrate. The hetero semiconductor region is made of a semiconductor material having a bandgap different from that of the semiconductor material, and a part of the hetero semiconductor region includes a film thickness control portion whose film thickness is thinner than that of the other part thereof. By oxidizing the hetero semiconductor region with a thickness equal to the film thickness of the film thickness control portion, a gate insulating film adjacent to the heterojunction is formed. A gate electrode is formed on the gate insulating film. This makes it possible to manufacture a semiconductor device including the gate insulating film with a lower ON resistance, and with a higher insulating characteristic and reliability.
摘要翻译：制备由半导体材料制成的半导体衬底，并且在半导体衬底上形成异质半导体区域，以在异质半导体区域和半导体衬底之间的界面中形成异质结。异质半导体区域由具有与半导体材料的带隙不同的带隙的半导体材料制成，并且异质半导体区域的一部分包括膜厚度比其他部分薄的膜厚控制部分。通过以等于膜厚控制部分的膜厚的厚度氧化杂半导体区域，形成与异质结相邻的栅极绝缘膜。在栅极绝缘膜上形成栅电极。这使得可以制造包括具有较低导通电阻的栅极绝缘膜以及更高的绝缘特性和可靠性的半导体器件。

16. 发明授权

US07754377B2 Lithium ion secondary battery 有权
公开(公告)号：US07754377B2
公开(公告)日：2010-07-13
申请号：US11790539
申请日：2007-04-26
申请人： Tsumoru Ohata , Junji Nakajima , Tetsuya Hayashi , Takashi Takano , Shigeo Ikuta , Kohei Suzuki , Kouji Nishida , Masao Fukunaga , Akiko Fujino
发明人： Tsumoru Ohata , Junji Nakajima , Tetsuya Hayashi , Takashi Takano , Shigeo Ikuta , Kohei Suzuki , Kouji Nishida , Masao Fukunaga , Akiko Fujino
IPC分类号： H01M2/16
CPC分类号： H01M10/0525 , H01M2/145 , H01M2/1653 , H01M2/166 , H01M2/1673 , H01M2/18 , H01M4/13 , H01M4/131 , H01M4/133 , H01M10/0587 , Y10T29/49115
摘要： A lithium ion secondary battery includes a positive electrode capable of absorbing and desorbing lithium ion, a negative electrode capable of absorbing and desorbing lithium ion, a porous film interposed between the positive electrode and the negative electrode, and a non-aqueous electrolyte: the porous film being adhered to a surface of at least one of the positive electrode and the negative electrode; the porous film including a filler and a resin binder; the resin binder content in the porous film being 1.5 to 8 parts by weight per 100 parts by weight of the filler; and the resin binder including an acrylonitrile unit, an acrylate unit, or a methacrylate unit.

17. 发明授权

US07659747B2 Transmission device 有权
标题翻译：传输设备
公开(公告)号：US07659747B2
公开(公告)日：2010-02-09
申请号：US12178219
申请日：2008-07-23
申请人： Hiroshi Shiraishi , Tetsuya Hayashi , Tomokazu Higuchi
发明人： Hiroshi Shiraishi , Tetsuya Hayashi , Tomokazu Higuchi
IPC分类号： H03K19/094
CPC分类号： H03K19/00384
摘要： A transmission device including: a driver unit which generates an output signal having an amplitude by a resistance division of a power-supply voltage; and an output-amplitude correction unit which generates current according to variation in the power-supply voltage, and corrects the amplitude by using the current.
摘要翻译：一种传输装置，包括：驱动器单元，其通过电源电压的电阻划分产生具有振幅的输出信号; 以及输出幅度校正单元，其根据电源电压的变化产生电流，并且通过使用电流来校正振幅。

18. 发明申请

US20090309953A1 DRAWING DEVICE AND METHOD, AND COMPUTER PROGRAM 审中-公开
标题翻译：绘图设备和方法以及计算机程序
公开(公告)号：US20090309953A1
公开(公告)日：2009-12-17
申请号：US12519619
申请日：2006-12-25
申请人： Tetsuya Hayashi
发明人： Tetsuya Hayashi
IPC分类号： B41J2/47
CPC分类号： G11B7/0037 , G11B7/00736
摘要： A drawing device (1) for performing drawing processing for drawing a desired pattern on a label surface (122) of a recording medium. The drawing device (1) has input element (42) for receiving from a user a desired pattern to be drawn, drawing element (13) for drawing the received desired pattern on the label surface by applying a laser beam to the label surface, and management information recording element (32) for recording, each time when a desired pattern is drawn on a label surface, management information in which the desired pattern drawn and identification information unique to the recording medium having the label surface on which the drawing is made are associated with each other.
摘要翻译：一种绘图装置（1），用于在记录介质的标签表面（122）上执行用于绘制所需图案的绘图处理。绘图装置（1）具有用于从用户接收要绘制的期望图案的输入元件（42），用于通过向标签表面施加激光束来在标签表面上绘制接收到的期望图案的绘图元件（13），以及管理信息记录元件（32），每当在标签表面上绘制期望的图案时，其中绘制所需图案的管理信息和具有绘制标签表面的记录介质特有的识别信息是管理信息记录元件相互联系。

19. 发明授权

US07605017B2 Method of manufacturing a semiconductor device and products made thereby 有权
标题翻译：制造半导体器件的方法和由此制成的产品
公开(公告)号：US07605017B2
公开(公告)日：2009-10-20
申请号：US11870561
申请日：2007-10-11
申请人： Tetsuya Hayashi , Masakatsu Hoshi , Hideaki Tanaka , Shigeharu Yamagami
发明人： Tetsuya Hayashi , Masakatsu Hoshi , Hideaki Tanaka , Shigeharu Yamagami
IPC分类号： H01L21/00 , H01L21/338 , H01L21/337 , H01L21/8249
CPC分类号： H01L29/0847 , H01L29/0623 , H01L29/1608 , H01L29/267 , H01L29/66068 , H01L29/7828
摘要： Methods of manufacturing a semiconductor device and resulting products. The semiconductor device includes a semiconductor substrate, a hetero semiconductor region hetero-adjoined with the semiconductor substrate, a gate insulation layer contacting the semiconductor substrate and a heterojunction of the hetero semiconductor region, a gate electrode formed on the gate insulation layer, an electric field alleviation region spaced apart from a heterojunction driving end of the heterojunction that contacts the gate insulation layer by a predetermined distance and contacting the semiconductor substrate and the gate insulation layer, a source electrode contacting the hetero semiconductor region and a drain electrode contacting the semiconductor substrate. A mask layer is formed on the hetero semiconductor region, and the electric field alleviation region and the heterojunction driving end are formed by using at least a portion of the first mask layer.
摘要翻译：制造半导体器件和所得产品的方法。半导体器件包括半导体衬底，与半导体衬底异质连接的异质半导体区域，与半导体衬底接触的栅极绝缘层和异质半导体区域的异质结，形成在栅极绝缘层上的栅电极，电场与异质结的异质结驱动端隔开预定距离并接触半导体衬底和栅极绝缘层，与异质半导体区接触的源极和与半导体衬底接触的漏电极的缓冲区。在异质半导体区域上形成掩模层，并且通过使用第一掩模层的至少一部分形成电场缓和区域和异质结驱动端。

20. 发明授权

US07588961B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07588961B2
公开(公告)日：2009-09-15
申请号：US11377909
申请日：2006-03-16
申请人： Yoshio Shimoida , Masakatsu Hoshi , Tetsuya Hayashi , Hideaki Tanaka , Shigeharu Yamagami
发明人： Yoshio Shimoida , Masakatsu Hoshi , Tetsuya Hayashi , Hideaki Tanaka , Shigeharu Yamagami
IPC分类号： H01L21/00
CPC分类号： H01L29/78 , H01L21/047 , H01L29/1608 , H01L29/267 , H01L29/66068 , H01L29/772 , H01L29/7828
摘要： In general, this disclosure describes a semiconductor device that exhibits an increased resistance and reduced leakage current in a reverse-biased state, and a method for manufacturing such a semiconductor device. For example, in one embodiment, the increased resistance in the reverse-biased state is obtained by introducing either a P+ or P− type impurity in a polycrystalline silicon layer formed on an N− type epitaxial layer. Additionally, the semiconductor device maintains a low resistance in a forward-biased state. To keep the forward-biased resistance low, the polycrystalline silicon layer in the vicinity of a gate electrode may be of an N+ type. Furthermore, an N+ type source extracting region is formed on the surface of the polycrystalline silicon layer to connect a source electrode to a drain electrode and maintain a low resistance when forward-biased.
摘要翻译：通常，本公开描述了在反向偏置状态下呈现增加的电阻和减小的漏电流的半导体器件，以及用于制造这种半导体器件的方法。例如，在一个实施例中，通过在形成在N型外延层上的多晶硅层中引入P +或P-型杂质来获得反向偏置状态下的增加的电阻。此外，半导体器件在正向偏置状态下保持低电阻。为了使正向偏置电阻低，在栅电极附近的多晶硅层可以是N +型。此外，在多晶硅层的表面上形成N +型源极提取区域，以将源电极连接到漏电极，并且当正向偏置时保持低电阻。

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