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    • 16. 发明授权
    • Method of manufacturing semiconductor device utilizing a lift-off
technique
    • 利用剥离技术制造半导体器件的方法
    • US4371423A
    • 1983-02-01
    • US183813
    • 1980-09-03
    • Rokuro YoshizawaSatoshi Shinozaki
    • Rokuro YoshizawaSatoshi Shinozaki
    • H01L21/033H01L21/768H01L21/283H01L21/308
    • H01L21/7688H01L21/033
    • A method of manufacturing a semiconductor device comprising a step of covering a principal surface of a semiconductor substrate having semiconductor regions formed therein and at least partly provided with a silicon oxide film with a cover film having an etching characteristic different from that of the oxide film, a step of forming a first deposition layer having a higher etching speed than that of the cover layer on the cover layer, a step of forming a second deposition layer having a lower etching speed than that of the first deposition layer on the first deposition layer, a step of etching away portions of the second and first deposition layers and cover layer corresponding to a wiring pattern in succession, a step of etching the exposed portions of the silicon oxide film with the cover layer having the openings as a mask to thereby form contact holes with respect to the semiconductor substrate, and a step of forming wiring leads by depositing a wiring metal and etching away the first deposition layer and thus lifting off the second deposition layer and wiring metal portions thereon.
    • 一种制造半导体器件的方法,包括以下步骤:覆盖其中形成有半导体区域的半导体衬底的主表面,并且至少部分地设置氧化硅膜,所述半导体衬底具有与所述氧化膜的刻蚀特性不同的蚀刻特性的覆盖膜, 形成具有比覆盖层上的覆盖层的蚀刻速度更高的蚀刻速度的第一沉积层的步骤,在第一沉积层上形成具有比第一沉积层的蚀刻速度低的蚀刻速度的第二沉积层的步骤, 对相应于布线图案的第二和第一沉积层和覆盖层的部分进行连续蚀刻的步骤,用具有开口的覆盖层作为掩模蚀刻氧化硅膜的暴露部分从而形成接触的步骤 相对于半导体衬底的孔,以及通过沉积布线金属并蚀刻掉形成布线引线的步骤 从而提升第二沉积层和其上的布线金属部分。
    • 19. 发明申请
    • Non-volatile semiconductor memory and method of manufacturing the same
    • 非易失性半导体存储器及其制造方法
    • US20050161730A1
    • 2005-07-28
    • US11080652
    • 2005-03-16
    • Satoshi ShinozakiMitsuteru IijimaHideo Kurihara
    • Satoshi ShinozakiMitsuteru IijimaHideo Kurihara
    • H01L21/8247H01L21/8246H01L27/115H01L29/788H01L29/792
    • H01L27/11568H01L27/115H01L29/66833H01L29/7887H01L29/7923
    • A proposed non-volatile semiconductor memory and a method of manufacturing the same are directed to performing stable and highly reliable operations. First, grooves are formed in a p-type silicon semiconductor substrate, and impurity diffusion layers are formed on the bottom surfaces of the grooves. A gate insulating film is then formed on the p-type silicon semiconductor substrate. This gate insulating film has a three-layer structure in which a first insulating film made of a silicon oxide film, a charge capturing film made of a silicon nitride film, and a second insulating film made of a silicon oxide film, are laminated in this order. A gate electrode is then formed on the gate insulating film. A convexity formed by the grooves serves as the channel region of the non-volatile semiconductor memory. Even if the device size is reduced, an effective channel length can be secured in this non-volatile semiconductor memory. Thus, excellent stability and reliability can be achieved.
    • 提出的非易失性半导体存储器及其制造方法旨在执行稳定且高可靠性的操作。 首先,在p型硅半导体衬底中形成凹槽,并且在凹槽的底表面上形成杂质扩散层。 然后在p型硅半导体衬底上形成栅极绝缘膜。 该栅极绝缘膜具有三层结构,其中由氧化硅膜制成的第一绝缘膜,由氮化硅膜制成的电荷捕获膜和由氧化硅膜制成的第二绝缘膜层叠在该层中 订购。 然后在栅极绝缘膜上形成栅电极。 由凹槽形成的凸起用作非易失性半导体存储器的沟道区域。 即使器件尺寸减小,也可以在该非易失性半导体存储器中确保有效的沟道长度。 因此,可以实现优异的稳定性和可靠性。