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11. 发明授权

US06291884B1 Chip-size semiconductor packages 有权
标题翻译：芯片尺寸半导体封装
公开(公告)号：US06291884B1
公开(公告)日：2001-09-18
申请号：US09437013
申请日：1999-11-09
申请人： Thomas P. Glenn , Roy D. Hollaway
发明人： Thomas P. Glenn , Roy D. Hollaway
IPC分类号： H01L2348
CPC分类号： H01L24/81 , H01L23/49816 , H01L24/45 , H01L24/48 , H01L24/94 , H01L24/97 , H01L2224/05554 , H01L2224/05568 , H01L2224/05573 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05669 , H01L2224/05684 , H01L2224/16145 , H01L2224/32145 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48145 , H01L2224/73215 , H01L2224/81801 , H01L2224/85203 , H01L2224/85205 , H01L2224/92247 , H01L2224/94 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01047 , H01L2924/01055 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/00014 , H01L2924/00 , H01L2224/85 , H01L2224/83 , H01L2224/81 , H01L2924/20752 , H01L2924/20753 , H01L2924/00012
摘要： A wafer-level method for mass production of surface-mounting, chip-size (“CS”) ball grid array (“BGA”), land grid array (“LGA”), and lead-less chip carrier (“LCC”) semiconductor packages includes the wire-bond or flip-chip attachment of ceramic substrates to the active surface of corresponding chips while they are still integral to a semiconductor wafer, thereby reducing manufacturing costs of the packages relative to that of individually packaged chips. The substrates have a thermal coefficient of expansion (TCE) closely matching that of the underlying chip. This eliminates the need for a silicone “interposer” between the substrate and the chip otherwise necessary to prevent stress-related problems caused by the difference in the respective thermal expansion and contraction of the chip and substrate with changes in temperature, further reducing the cost of the packages, improving heat transfer from the chips, and resulting in a package that is relatively free of thermal-induced stresses.
摘要翻译：用于大规模生产表面贴装芯片尺寸（“CS”）球栅阵列（“BGA”），光栅阵列（LGA）和无铅芯片载体（“LCC”）的晶圆级方法，半导体封装包括陶瓷衬底的线接合或倒装芯片附着到相应芯片的有源表面，同时它们仍然与半导体晶片成一体，由此降低了封装相对于单独封装芯片的制造成本。衬底的热膨胀系数（TCE）与下面的芯片的热膨胀系数密切相关。这消除了在基板和芯片之间需要硅树脂“插入件”，否则为防止由于温度变化导致的芯片和基板的各自的热膨胀和收缩的差异引起的应力相关问题，进一步降低了成本包装，改善了从芯片的热传递，并产生相对不受热诱导应力的包装。

12. 发明授权

US5482736A Method for applying flux to ball grid array package 失效
标题翻译：将焊剂施加到球栅阵列封装的方法
公开(公告)号：US5482736A
公开(公告)日：1996-01-09
申请号：US286153
申请日：1994-08-04
申请人： Thomas P. Glenn , Roy D. Hollaway
发明人： Thomas P. Glenn , Roy D. Hollaway
IPC分类号： B23K1/20 , H05K3/34 , B05D1/28 , B23K3/00
CPC分类号： H05K3/3489 , B23K1/203 , B23K2201/40
摘要： A method and apparatus for applying flux to a series of metallization contacts or plated contact pad a substrate exposed by an apertured solder mask, employs a compressible transfer pad. A central flux pick-up area is formed on the transfer pad bottom surface. The bottom surface may be spherical and may include a cylindrical post onto which a predetermined amount of flux is transferred, such as by dipping the pick-up area into a reservoir of semi-liquid paste flux. The transfer pad is then positioned over and compressed on the solder mask such that the picked up flux on the flux pick-up area of the transfer pad is pressure forced by compression of the transfer pad through apertures in the solder mask directly and successively into all the series of depressions formed on the substrate until all the depressions are substantially filled with flux. After breaking away and removal of the transfer pad, a solder ball or bonder applied solder is deposited in each flux-containing depression to form a metallurgical bond between the ball and a plated contact pad or package metallization such as a lead frame.
摘要翻译：一种用于向一系列金属化触点或电镀接触焊盘施加焊剂的方法和装置，其通过有孔焊接掩模暴露的衬底采用可压缩转移垫。在转印垫底表面上形成中心的吸收区域。底表面可以是球形的，并且可以包括其上传送预定量的助焊剂的圆柱形柱，例如通过将拾取区域浸入半液体糊剂焊剂的储存器中。然后将转移垫定位在焊接掩模上并在其上压缩，使得转印垫的助焊剂拾取区上的拾取通量被压力通过压接传递垫通过焊接掩模中的孔直接并连续地变成所有形成在衬底上的一系列凹陷，直到所有凹陷基本上充满助熔剂。在分离和移除转移垫之后，将焊球或焊接剂施加的焊料沉积在每个含焊剂的凹陷中以在球和镀覆的接触焊盘或封装金属化（例如引线框架）之间形成冶金结合。

13. 发明授权

US06962829B2 Method of making near chip size integrated circuit package 有权
标题翻译：制造近芯片尺寸集成电路封装的方法
公开(公告)号：US06962829B2
公开(公告)日：2005-11-08
申请号：US10150400
申请日：2002-05-17
申请人： Thomas P. Glenn , Roy D. Hollaway , Anthony E. Panczak
发明人： Thomas P. Glenn , Roy D. Hollaway , Anthony E. Panczak
IPC分类号： H01L21/56 , H01L23/31 , H01L23/552 , H01L21/00 , H05K3/30
CPC分类号： H01L21/561 , H01L21/56 , H01L23/3128 , H01L23/552 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/97 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/01322 , H01L2924/12042 , H01L2924/14 , H01L2924/15183 , H01L2924/15184 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , H01L2924/3025 , Y10T29/49135 , H01L2224/85 , H01L2224/83 , H01L2224/92247 , H01L2224/81 , H01L2924/00012 , H01L2924/00 , H01L2224/05599
摘要： A plurality of integrated circuit chip (IC chip) packages are fabricated simultaneously from a single insulating substrate having sections. In each section, an IC chip is attached. Bonding pads on the IC chip are electrically connected to first metallizations on a substrate first surface. The first metallizations, IC chip including bonding pads and first substrate surface are then encapsulated. Interconnection balls or pads are formed at substrate bonding locations on a substrate second surface, the interconnection pads or balls being electrically connected to corresponding first metallizations. The substrate and encapsulant are then cut along the periphery of each section to form the plurality of IC chip packages.
摘要翻译：从具有截面的单个绝缘基板同时制造多个集成电路芯片（IC芯片）封装。在每个部分中，连接有IC芯片。 IC芯片上的接合焊盘与衬底第一表面上的第一金属化电连接。然后封装包括接合焊盘和第一衬底表面的第一金属化IC芯片。互连球或焊盘形成在衬底第二表面上的衬底接合位置处，互连衬垫或球电连接到对应的第一金属化。然后沿每个部分的周边切割衬底和密封剂以形成多个IC芯片封装。

14. 发明授权

US06268654B1 Integrated circuit package having adhesive bead supporting planar lid above planar substrate 有权
标题翻译：集成电路封装，其具有在平面基板上方支撑平面盖的粘合珠
公开(公告)号：US06268654B1
公开(公告)日：2001-07-31
申请号：US09437574
申请日：1999-11-09
申请人： Thomas P. Glenn , Roy D. Hollaway , Anthony E. Panczak
发明人： Thomas P. Glenn , Roy D. Hollaway , Anthony E. Panczak
IPC分类号： H01L23053
CPC分类号： H01L24/48 , G11C16/18 , H01L23/04 , H01L23/055 , H01L23/10 , H01L23/3677 , H01L23/538 , H01L24/45 , H01L24/49 , H01L24/73 , H01L24/97 , H01L31/0203 , H01L2224/05624 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48463 , H01L2224/48599 , H01L2224/49171 , H01L2224/73265 , H01L2224/85207 , H01L2224/85444 , H01L2224/85455 , H01L2224/8592 , H01L2224/97 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01037 , H01L2924/01039 , H01L2924/01058 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/014 , H01L2924/09701 , H01L2924/12041 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/16195 , H01L2224/85 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A package for an integrated circuit is described, as are methods of making the package. The package includes a substrate having a generally planar first surface on which a metal die pad is formed. An integrated circuit die is attached to the metal die pad. An adhesive head surrounds the integrated circuit die and covers the exposed periphery of the metal die pad. A generally planar lid is in a press-fitted interconnection with the bead. An adhesive material covers conductive structures on the die, such as bonding pads, to prevent corrosion. Optionally, the package has vertical peripheral sides. The methods of making the package include methods for making packages individually, or making a plurality of packages simultaneously. Where a plurality of packages are made simultaneously, integrated circuit die are placed on each of a plurality of physically-joined package substrates on a generally planar sheet of substrate material. An adhesive bead is applied around each die. In cross-section, the bead has a central peak and a shorter peak on each side of the central peak. A sheet of lid material is placed onto the beads. After the bead is hardened, individual packages are formed by cutting the substrate sheet, lid sheet, and beads.
摘要翻译：还描述了用于集成电路的封装，以及制造封装的方法。该封装包括具有大致平面的第一表面的基板，在其上形成有金属裸片基板。集成电路管芯附接到金属管芯焊盘。粘合头围绕集成电路管芯并且覆盖金属管芯焊盘的暴露的周边。大致平面的盖子与珠子压配合的互连。粘合剂材料覆盖模具上的导电结构，例如焊盘，以防止腐蚀。可选地，包装具有垂直的周边。制造包装的方法包括单独制造包装或同时制造多个包装的方法。在同时制造多个封装的情况下，将集成电路管芯放置在大体上平坦的基片材料片上的多个物理连接的封装衬底中的每一个上。在每个模具周围施加粘合剂珠粒。在横截面中，珠在中心峰的每一侧具有中心峰和较短的峰。将一片盖子材料放置在珠子上。在胎圈硬化之后，通过切割基底片，盖片和珠来形成各个包装。

15. 发明授权

US6117705A Method of making integrated circuit package having adhesive bead supporting planar lid above planar substrate 失效
标题翻译：制造集成电路封装的方法，其具有在平面基板上方支撑平面盖的粘合珠
公开(公告)号：US6117705A
公开(公告)日：2000-09-12
申请号：US50666
申请日：1998-03-30
申请人： Thomas P. Glenn , Roy D. Hollaway , Anthony E. Panczak
发明人： Thomas P. Glenn , Roy D. Hollaway , Anthony E. Panczak
IPC分类号： G11C16/02 , G11C16/18 , H01L23/02 , H01L23/04 , H01L23/055 , H01L23/10 , H01L31/02 , H01L31/0203 , H01L21/203
CPC分类号： H01L24/48 , G11C16/18 , H01L23/04 , H01L23/055 , H01L23/10 , H01L24/97 , H01L31/0203 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48463 , H01L2224/48599 , H01L2224/49171 , H01L2224/73265 , H01L2224/85207 , H01L2224/8592 , H01L2224/97 , H01L23/3677 , H01L23/538 , H01L24/45 , H01L24/49 , H01L24/73 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/0102 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01037 , H01L2924/01039 , H01L2924/01058 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/09701 , H01L2924/12041 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/16195
摘要： A package for an integrated circuit is described, as are methods of making the package. The package includes a substrate having a generally planar first surface on which a metal die pad is formed. An integrated circuit die is attached to the metal die pad. An adhesive head surrounds the integrated circuit die and covers the exposed periphery of the metal die pad. A generally planar lid is in a press-fitted interconnection with the bead. An adhesive material covers conductive structures on the die, such as bonding pads, to prevent corrosion. Optionally, the package has vertical peripheral sides. The methods of making the package include methods for making packages individually, or making a plurality of packages simultaneously. Where a plurality of packages are made simultaneously, integrated circuit die are placed on each of a plurality of physically-joined package substrates on a generally planar sheet of substrate material. An adhesive bead is applied around each die. In cross-section, the bead has a central peak and a shorter peak on each side of the central peak. A sheet of lid material is placed onto the beads. After the bead is hardened, individual packages are formed by cutting the substrate sheet, lid sheet, and beads.
摘要翻译：还描述了用于集成电路的封装，以及制造封装的方法。该封装包括具有大致平面的第一表面的基板，在其上形成有金属裸片基板。集成电路管芯附接到金属管芯焊盘。粘合头围绕集成电路管芯并且覆盖金属管芯焊盘的暴露的周边。大致平面的盖子与珠子压配合的互连。粘合剂材料覆盖模具上的导电结构，例如焊盘，以防止腐蚀。可选地，包装具有垂直的周边。制造包装的方法包括单独制造包装或同时制造多个包装的方法。在同时制造多个封装的情况下，将集成电路管芯放置在大体上平坦的基片材料片上的多个物理连接的封装衬底中的每一个上。在每个模具周围施加粘合剂珠粒。在横截面中，珠在中心峰的每一侧具有中心峰和较短的峰。将一片盖子材料放置在珠子上。在胎圈硬化之后，通过切割基底片，盖片和珠来形成各个包装。

16. 发明授权

US6034429A Integrated circuit package 失效
标题翻译：集成电路封装
公开(公告)号：US6034429A
公开(公告)日：2000-03-07
申请号：US844536
申请日：1997-04-18
申请人： Thomas P. Glenn , Roy D. Hollaway , Anthony E. Panczak
发明人： Thomas P. Glenn , Roy D. Hollaway , Anthony E. Panczak
IPC分类号： G11C16/02 , G11C16/18 , H01L23/02 , H01L23/04 , H01L23/055 , H01L23/10 , H01L31/02 , H01L31/0203 , H01L23/053
CPC分类号： H01L31/0203 , G11C16/18 , H01L23/04 , H01L23/055 , H01L23/10 , H01L24/97 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/8592 , H01L2224/97 , H01L24/45 , H01L24/48 , H01L2924/00014 , H01L2924/01013 , H01L2924/01018 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/09701 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/16195
摘要： A package for an integrated circuit is described, as is a method of making the package. The package is comprised of a substrate having a substantially planar first surface on which an integrated circuit die is placed. An imperforate adhesive bead on the first surface of the substrate surrounds the die. A lid transparent to electromagnetic radiation such as ultraviolet light is spaced above the integrated circuit, in a press-fitted interconnection with the bead. Epoxy is a preferred material for the bead. The lid is a single-piece of flat material, such as plastic, ceramic, or glass, which can have a diagonal edge.
摘要翻译：描述了用于集成电路的封装，以及制造封装的方法。封装由具有基本上平面的第一表面的基板构成，集成电路管芯放置在基板上。衬底的第一表面上的无孔粘合剂珠围绕着模具。对于诸如紫外光的电磁辐射透明的盖子在与珠的压配合的互连中在集成电路上方间隔开。环氧树脂是珠粒的优选材料。盖子是可以具有对角边缘的单件扁平材料，例如塑料，陶瓷或玻璃。

17. 发明授权

US5981314A Near chip size integrated circuit package 失效
标题翻译：近芯片尺寸集成电路封装
公开(公告)号：US5981314A
公开(公告)日：1999-11-09
申请号：US741797
申请日：1996-10-31
申请人： Thomas P. Glenn , Roy D. Hollaway , Anthony E. Panczak
发明人： Thomas P. Glenn , Roy D. Hollaway , Anthony E. Panczak
IPC分类号： H01L21/56 , H01L23/31 , H01L23/552 , H01L21/44
CPC分类号： H01L21/561 , H01L21/56 , H01L23/3128 , H01L23/552 , H01L24/97 , H01L2224/16225 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2224/73204 , H01L2224/73265 , H01L2224/97 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/01322 , H01L2924/12042 , H01L2924/14 , H01L2924/15173 , H01L2924/15183 , H01L2924/15311 , H01L2924/181 , H01L2924/3025
摘要： A plurality of integrated circuit chip (IC chip) packages are fabricated simultaneously from a single insulating substrate having sections. In each section, an IC chip is attached. Bonding pads on the IC chip are electrically connected to first metallizations on a substrate first surface. The first metallizations, IC chip including bonding pads and first substrate surface are then encapsulated. Interconnection balls or pads are formed at substrate bonding locations on a substrate second surface, the interconnection pads or balls being electrically connected to corresponding first metallizations. The substrate and encapsulant are then cut along the periphery of each section to form the plurality of IC chip packages.
摘要翻译：从具有截面的单个绝缘基板同时制造多个集成电路芯片（IC芯片）封装。在每个部分中，连接有IC芯片。 IC芯片上的接合焊盘与衬底第一表面上的第一金属化电连接。然后封装包括接合焊盘和第一衬底表面的第一金属化IC芯片。互连球或焊盘形成在衬底第二表面上的衬底接合位置处，互连衬垫或球电连接到对应的第一金属化。然后沿每个部分的周边切割衬底和密封剂以形成多个IC芯片封装。

18. 发明授权

US06686580B1 Image sensor package with reflector 有权
标题翻译：带反射镜的图像传感器封装
公开(公告)号：US06686580B1
公开(公告)日：2004-02-03
申请号：US09906992
申请日：2001-07-16
申请人： Thomas P. Glenn , Steven Webster , Roy Dale Hollaway
发明人： Thomas P. Glenn , Steven Webster , Roy Dale Hollaway
IPC分类号： H01L2700
CPC分类号： H04N5/2254 , H01L27/14618 , H01L27/14625 , H01L31/02325 , H01L2224/05553 , H01L2224/32225 , H01L2224/48227 , H01L2224/49175 , H01L2224/73265 , H01L2924/15311 , H01L2924/3025 , H04N5/2253 , H04N5/2257 , H01L2924/00
摘要： An image sensor package includes a substrate and an image sensor coupled to the substrate. The image sensor includes an upper surface having an active area. A reflector lid is coupled to the substrate. The reflector lid has a first panel having a planar surface. The planar surface is at least partially reflective and is angled relative to the upper surface of the image sensor to reflect electromagnetic radiation to the active area of image sensor.
摘要翻译：图像传感器封装包括衬底和耦合到衬底的图像传感器。图像传感器包括具有有效区域的上表面。反射器盖连接到基板。反射器盖具有具有平坦表面的第一面板。平坦表面至少部分地是反射性的并且相对于图像传感器的上表面成角度，以将电磁辐射反射到图像传感器的有效区域。

19. 发明授权

US06627864B1 Thin image sensor package 有权
标题翻译：薄图像传感器封装
公开(公告)号：US06627864B1
公开(公告)日：2003-09-30
申请号：US09447202
申请日：1999-11-22
申请人： Thomas P. Glenn , Steven Webster , Roy Dale Hollaway
发明人： Thomas P. Glenn , Steven Webster , Roy Dale Hollaway
IPC分类号： H01L2700
CPC分类号： H01L24/97 , H01L27/14618 , H01L2224/97 , H01L2924/01013 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01039 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2224/81
摘要： A thin image sensor package includes an image sensor having an active area which is responsive to radiation. The image sensor is mounted to a substrate which is transparent to the radiation. The image sensor is mounted such that the active area of the image sensor faces the substrate. Of importance, the substrate serves a dual function. In particular, the substrate is the window which covers the active area of the image sensor. Further, the substrate is the platform upon which the image sensor package is fabricated. As a result, the image sensor package is thin, lightweight and inexpensive to manufacture.
摘要翻译：薄图像传感器封装包括具有响应于辐射的有效区域的图像传感器。图像传感器安装在对辐射透明的基板上。图像传感器被安装成使得图像传感器的有效区域面向基板。重要的是，衬底具有双重功能。特别地，衬底是覆盖图像传感器的有效区域的窗口。此外，基板是制造图像传感器封装的平台。因此，图像传感器封装薄，重量轻且制造成本低廉。

20. 发明授权

US06586824B1 Reduced thickness packaged electronic device 有权
标题翻译：减薄厚度电子装置
公开(公告)号：US06586824B1
公开(公告)日：2003-07-01
申请号：US09916716
申请日：2001-07-26
申请人： Thomas P. Glenn , Steven Webster , Roy Dale Hollaway
发明人： Thomas P. Glenn , Steven Webster , Roy Dale Hollaway
IPC分类号： H01L2302
CPC分类号： H01L27/14618 , H01L23/3128 , H01L24/45 , H01L24/48 , H01L24/97 , H01L27/14625 , H01L27/14683 , H01L31/0203 , H01L31/02327 , H01L31/18 , H01L2224/05599 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48463 , H01L2224/73265 , H01L2224/85001 , H01L2224/85399 , H01L2224/92 , H01L2224/97 , H01L2924/00014 , H01L2924/01013 , H01L2924/01027 , H01L2924/01033 , H01L2924/01079 , H01L2924/01322 , H01L2924/14 , H01L2924/15183 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , H01L2924/18165 , H01L2224/85 , H01L2924/00015 , H01L2224/45015 , H01L2924/207 , H01L2924/00012
摘要： An electronic device, such as a sensor die, is packaged by first forming a hole through a substrate. The hole is made large enough to position the entire electronic device within the hole. A tape is then applied to the second surface of the substrate to cover a second side of the hole, thereby creating a tape surface at the bottom of the hole. The electronic device is then positioned within the hole such that the electronic device is in contact with, and adhered to, the tape surface at the bottom of the hole. Electronic connections are made between the electronic device and the substrate and a layer of encapsulant is applied. In one embodiment, the electronic device is a sensor die and an optical element is positioned over an active region of the sensor die before the encapsulant is applied. The encapsulant then surrounds and holds the optical element in position over the active region of the sensor die.
摘要翻译：通过首先通过基板形成孔来封装诸如传感器管芯的电子装置。孔足够大以将整个电子设备定位在孔内。然后将带施加到基板的第二表面以覆盖孔的第二侧，从而在孔的底部形成带表面。然后将电子设备定位在孔内，使得电子设备与孔的底部接触并粘附到带表面。在电子设备和基板之间形成电子连接，并且施加一层密封剂。在一个实施例中，电子设备是传感器管芯，并且在施加密封剂之前，光学元件位于传感器管芯的有源区域之上。然后，密封剂围绕并将光学元件保持在传感器管芯的有源区域上的适当位置。

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