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    • 12. 发明申请
    • IMAGE FORMING APPARATUS AND CONTROL APPARATUS
    • 图像形成装置和控制装置
    • US20110225443A1
    • 2011-09-15
    • US13041713
    • 2011-03-07
    • Keita TakahashiAtsushi OtaniShoji TakedaSatoru YamamotoHirotaka Seki
    • Keita TakahashiAtsushi OtaniShoji TakedaSatoru YamamotoHirotaka Seki
    • G06F1/04
    • G06F1/04
    • The present image forming apparatus includes a first control unit and a second control unit driven by built-in clock oscillators to realize the distributed control. The first control unit generates, using a first timer driven by the built-in clock oscillator of the first control unit, a pulse signal corresponding to a predetermined clock rate and outputs the pulse signal to the second control unit. The second control unit measures, using a second timer driven by the built-in clock oscillator of the second control unit, a pulse width of the pulse signal outputted from the first control unit, and calculates a correction coefficient using reference pulse width corresponding to the predetermined clock rate and the measured pulse width. The processing unit processes using the calculated correction coefficient.
    • 本图像形成装置包括由内置时钟振荡器驱动以实现分布式控制的第一控制单元和第二控制单元。 第一控制单元使用由第一控制单元的内置时钟振荡器驱动的第一定时器产生对应于预定时钟速率的脉冲信号,并将该脉冲信号输出到第二控制单元。 第二控制单元使用由第二控制单元的内置时钟振荡器驱动的第二定时器测量从第一控制单元输出的脉冲信号的脉冲宽度,并使用与第一控制单元对应的参考脉冲宽度来计算校正系数 预定的时钟速率和测量的脉冲宽度。 处理单元使用计算的校正系数进行处理。
    • 15. 发明授权
    • Nonvolatile semiconductor memory device and method for fabricating the same
    • 非易失性半导体存储器件及其制造方法
    • US07791121B2
    • 2010-09-07
    • US12166069
    • 2008-07-01
    • Koichi KawashimaKeita Takahashi
    • Koichi KawashimaKeita Takahashi
    • H01L27/108
    • H01L27/115H01L27/11568
    • A nonvolatile semiconductor memory device includes bit line diffusion layers extending along the X direction in an upper portion of a semiconductor substrate; and gate structures extending along the Y direction on the semiconductor substrate and each including a charge trapping film and a gate electrode. The nonvolatile semiconductor memory device further includes a first interlayer insulating film in which first contacts respectively connected to the bit line diffusion layers are formed; and second contacts that penetrate through a UV blocking film and a second interlayer insulating film formed on the first interlayer insulating film and have bottom faces respectively in contact with the first contacts and top faces respectively in contact with metal interconnections.
    • 非易失性半导体存储器件包括在半导体衬底的上部沿X方向延伸的位线扩散层; 以及在半导体衬底上沿着Y方向延伸的栅极结构,并且每个栅极结构包括电荷捕获膜和栅电极。 非易失性半导体存储器件还包括第一层间绝缘膜,其中分别连接到位线扩散层的第一触点形成; 以及穿过UV阻挡膜的第二触点和形成在第一层间绝缘膜上的第二层间绝缘膜,并且分别具有分别与第一触头和顶面接触的底面与金属互连接触的第二触点。
    • 17. 发明申请
    • IMAGE FORMING APPARATUS
    • 图像形成装置
    • US20090310177A1
    • 2009-12-17
    • US12476602
    • 2009-06-02
    • Keita TakahashiMitsuhiko Sato
    • Keita TakahashiMitsuhiko Sato
    • G06F3/12
    • G03G15/5004G03G2215/00016G06F1/3284Y02D10/159
    • An image forming apparatus, to which an accessory device is connectable, includes a control unit configured to control the image forming apparatus to start a preparation operation in which an image forming unit can form an image in response to a power supply, and a storage unit configured to store a connecting state between the image forming apparatus and the accessory device. The control unit determines, in response to the start of the power supply, whether the accessory device has been connected to the image forming apparatus before the power supply is stopped, with reference to information stored in the storage unit. Then, the control unit controls the image forming apparatus to start the preparation operation without waiting for the receiving of the information about the accessory device therefrom if the accessory device has not been connected to the image forming apparatus.
    • 附件装置可连接的图像形成装置包括:控制单元,被配置为控制图像形成装置开始其中图像形成单元可以响应于电源形成图像的准备操作;以及存储单元 被配置为在所述图像形成装置和所述附属装置之间存储连接状态。 参照存储在存储单元中的信息,控制单元响应于电源的开始,确定在电源停止之前辅助设备是否已连接到图像形成设备。 然后,如果附件装置尚未连接到图像形成装置,则控制单元控制图像形成装置开始准备操作,而不等待从其接收关于附件装置的信息。
    • 20. 发明授权
    • Nonvolatile semiconductor memory device and manufacturing method thereof
    • 非易失性半导体存储器件及其制造方法
    • US07339233B2
    • 2008-03-04
    • US11135305
    • 2005-05-24
    • Keita Takahashi
    • Keita Takahashi
    • H01L29/792
    • H01L27/11568G11C16/0466G11C16/0491G11C16/10H01L27/115
    • A nonvolatile semiconductor memory device includes nonvolatile semiconductor memory elements and a first conductor. Each nonvolatile semiconductor memory element includes a gate insulating film including a charge trapping layer formed on a substrate, a gate electrode formed on the gate insulating film, and a pair of diffusion layers formed in a surface layer of the substrate with the gate electrode interposed therebetween and functioning as a source or a drain. The first conductor electrically connects a pair of diffusion layers of each nonvolatile semiconductor memory element to each other. Ends of each gate electrode which respectively face a pair of diffusion layers of a corresponding nonvolatile semiconductor memory element are partially covered by the first conductor when viewed two-dimensionally.
    • 非易失性半导体存储器件包括非易失性半导体存储元件和第一导体。 每个非易失性半导体存储元件包括栅极绝缘膜,该栅极绝缘膜包括形成在基板上的电荷俘获层,形成在栅极绝缘膜上的栅电极和形成在基板的表面层中的一对扩散层,其间插入栅电极 并作为一个来源或渠道。 第一导体将每个非易失性半导体存储元件的一对扩散层彼此电连接。 分别面对相应的非易失性半导体存储元件的一对扩散层的每个栅电极的端部在被二维地看时被第一导体部分地覆盖。