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11. 发明申请

US20080242050A1 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20080242050A1
公开(公告)日：2008-10-02
申请号：US12073754
申请日：2008-03-10
申请人： Shunpei Yamazaki , Ikuko Kawamata , Yasuyuki Arai
发明人： Shunpei Yamazaki , Ikuko Kawamata , Yasuyuki Arai
IPC分类号： H01L21/782
CPC分类号： H01L27/1266 , H01L21/76254 , H01L27/1214 , H01L29/66772
摘要： It is an object of the present invention to manufacture a semiconductor element and an integrated circuit that have high performance over a large-sized substrate with high throughput and high productivity. When single crystal semiconductor layers are transferred from a single crystal semiconductor substrate (a bond wafer), the single crystal semiconductor substrate is etched selectively (this step is also referred to as groove processing), and a plurality of single crystal semiconductor layers divided such that they have the size of semiconductor elements to be manufactured are transferred to a different substrate (a base substrate). Thus, a plurality of island-shaped single crystal semiconductor layers (SOI layers) can be formed over the base substrate.
摘要翻译：本发明的一个目的是制造具有高性能的半导体元件和集成电路，其具有高通量和高生产率的大尺寸基板。当从单晶半导体衬底（接合晶片）转移单晶半导体层时，选择性地蚀刻单晶半导体衬底（该步骤也称为沟槽加工），并且将多个单晶半导体层划分为它们具有待制造的半导体元件的尺寸被转移到不同的衬底（基底）。因此，可以在基底基板上形成多个岛状单晶半导体层（SOI层）。

12. 发明申请

US20070252233A1 Semiconductor device and method for manufacturing the semiconductor device 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20070252233A1
公开(公告)日：2007-11-01
申请号：US11785150
申请日：2007-04-16
申请人： Shunpei Yamazaki , Yasuyuki Arai , Ikuko Kawamata
发明人： Shunpei Yamazaki , Yasuyuki Arai , Ikuko Kawamata
IPC分类号： H01L29/00
CPC分类号： H01L21/76264 , H01L27/1214
摘要： A semiconductor device is provided, which comprises a semiconductor layer over an insulating surface, and an insulating layer over the semiconductor layer. The semiconductor layer includes at least two element regions, and an element separation region. The element separation region is disposed between the two element regions. The element separation region includes at least one impurity element selected from the group consisting of oxygen, nitrogen, and carbon. The element separation region has higher resistance than a first source and drain regions included in one of the two element regions and a second source and drain regions included in the other of the two element regions.
摘要翻译：提供了一种半导体器件，其包括绝缘表面上的半导体层以及半导体层上的绝缘层。半导体层包括至少两个元件区域和元件分离区域。元件分离区域设置在两个元件区域之间。元素分离区域包括至少一种选自氧，氮和碳的杂质元素。元件分离区域具有比包括在两个元件区域之一中的第一源极和漏极区域以及包括在两个元件区域中的另一个元件区域中的第二源极和漏极区域的电阻更高的电阻。

13. 发明授权

US08581260B2 Semiconductor device including a memory 有权
标题翻译：包括存储器的半导体器件
公开(公告)号：US08581260B2
公开(公告)日：2013-11-12
申请号：US12027815
申请日：2008-02-07
申请人： Shunpei Yamazaki , Ikuko Kawamata , Yasuyuki Arai
发明人： Shunpei Yamazaki , Ikuko Kawamata , Yasuyuki Arai
IPC分类号： H01L29/04
CPC分类号： H01L27/1233 , H01L27/105 , H01L27/11526 , H01L27/11534 , H01L27/11546 , H01L27/1203 , H01L27/1214 , H01L27/1237 , H01L29/66825 , H01L29/7881
摘要： Plural kinds of thin film transistors having different film thicknesses of semiconductor layers are provided over a substrate having an insulating surface. A channel formation region of semiconductor layer in a thin film transistor for which high speed operation is required is made thinner than a channel formation region of a semiconductor layer of a thin film transistor for which high withstand voltage is required. A gate insulating layer of the thin film transistor for which high speed operation is required may be thinner than a gate insulating layer of the thin film transistor for which high withstand voltage is required.
摘要翻译：在具有绝缘表面的基板上设置具有不同膜厚的半导体层的多种薄膜晶体管。要求高速运行的薄膜晶体管中的半导体层的沟道形成区域比需要高耐压的薄膜晶体管的半导体层的沟道形成区域薄。需要高速运行的薄膜晶体管的栅极绝缘层可以比要求高耐压的薄膜晶体管的栅极绝缘层更薄。

14. 发明授权

US08427420B2 Electronic book 有权
公开(公告)号：US08427420B2
公开(公告)日：2013-04-23
申请号：US12769266
申请日：2010-04-28
申请人： Shunpei Yamazaki , Jun Koyama , Yasuyuki Arai , Ikuko Kawamata , Atsushi Miyaguchi , Yoshitaka Moriya
发明人： Shunpei Yamazaki , Jun Koyama , Yasuyuki Arai , Ikuko Kawamata , Atsushi Miyaguchi , Yoshitaka Moriya
IPC分类号： G09G3/34 , G09G3/36
CPC分类号： G06F1/1652 , G02F1/133305 , G02F1/13452 , G02F1/1368 , G06F1/1616 , G06F1/1635 , G06F1/1643 , G06F1/1647 , G06F3/1423 , G06F3/147 , G09G3/20 , G09G3/2096 , G09G3/3225 , G09G3/344 , G09G3/3648 , G09G5/003 , G09G2300/08 , G09G2310/0218 , G09G2310/0267 , G09G2310/0275 , G09G2310/0281 , G09G2330/02 , G09G2330/021 , G09G2360/144 , G09G2380/02 , G09G2380/14
摘要： An e-book reader in which destruction of a driver circuit at the time when a flexible panel is handled is inhibited. In addition, an e-book reader having a simplified structure. A plurality of flexible display panels each including a display portion in which display control is performed by a scan line driver circuit and a signal line driver circuit, and a binding portion fastening the plurality of display panels together are included. The signal line driver circuit is provided inside the binding portion, and the scan line driver circuit is provided at the edge of the display panel in a direction perpendicular to the binding portion.

15. 发明授权

US07972935B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07972935B2
公开(公告)日：2011-07-05
申请号：US12858525
申请日：2010-08-18
申请人： Shunpei Yamazaki , Ikuko Kawamata , Yasuyuki Arai
发明人： Shunpei Yamazaki , Ikuko Kawamata , Yasuyuki Arai
IPC分类号： H01L21/30
CPC分类号： H01L21/76254 , G11C16/0416 , G11C16/0433 , G11C16/0483 , H01L21/84 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L27/1203
摘要： When single crystal semiconductor layers are transposed from a single crystal semiconductor substrate (a bond wafer), the single crystal semiconductor substrate is etched selectively (this step is also referred to as groove processing), and a plurality of single crystal semiconductor layers, which are being divided in size of manufactured semiconductor elements, are transposed to a different substrate (a base substrate). Thus, a plurality of island-shaped single crystal semiconductor layers (SOI layers) can be formed over the base substrate. Further, etching is performed on the single crystal semiconductor layers formed over the base substrate, and the shapes of the SOI layers are controlled precisely by being processed and modified.
摘要翻译：当单晶半导体层从单晶半导体衬底（接合晶片）转置时，选择性地蚀刻单晶半导体衬底（该步骤也称为沟槽处理），并且多个单晶半导体层是被分割成制造的半导体元件的尺寸，被转置到不同的基板（基底）。因此，可以在基底基板上形成多个岛状单晶半导体层（SOI层）。此外，对形成在基底基板上的单晶半导体层进行蚀刻，并且通过加工和改进来精确地控制SOI层的形状。

16. 发明授权

US07875931B2 Semiconductor device with isolation using impurity 有权
标题翻译：半导体器件采用杂质隔离
公开(公告)号：US07875931B2
公开(公告)日：2011-01-25
申请号：US11785965
申请日：2007-04-23
申请人： Shunpei Yamazaki , Yasuyuki Arai , Ikuko Kawamata
发明人： Shunpei Yamazaki , Yasuyuki Arai , Ikuko Kawamata
IPC分类号： H01L27/12
CPC分类号： H01L27/11546 , H01L27/0207 , H01L27/105 , H01L27/115 , H01L27/11519 , H01L27/11521 , H01L27/11524 , H01L27/11526 , H01L27/1255 , H01L29/66825 , H01L29/7881
摘要： In order to form a plurality of semiconductor elements over an insulating surface, in one continuous semiconductor layer, an element region serving as a semiconductor element and an element isolation region having a function to electrically isolate element regions from each other by repetition of PN junctions. The element isolation region is formed by selective addition of an impurity element of at least one or more kinds of oxygen, nitrogen, and carbon and an impurity element that imparts an opposite conductivity type to that of the adjacent element region in order to electrically isolate elements from each other in one continuous semiconductor layer.
摘要翻译：为了在绝缘表面上形成多个半导体元件，在一个连续半导体层中，用作半导体元件的元件区域和具有通过重复PN结将元件区域彼此电隔离的功能的元件隔离区域。通过选择性地添加至少一种或多种氧，氮和碳的杂质元素和赋予与相邻元件区相反的导电类型的杂质元素来形成元件隔离区域，以便电隔离元件在一个连续的半导体层中彼此相交。

17. 发明授权

US07846817B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07846817B2
公开(公告)日：2010-12-07
申请号：US12073754
申请日：2008-03-10
申请人： Shunpei Yamazaki , Ikuko Kawamata , Yasuyuki Arai
发明人： Shunpei Yamazaki , Ikuko Kawamata , Yasuyuki Arai
IPC分类号： H01L21/762
CPC分类号： H01L27/1266 , H01L21/76254 , H01L27/1214 , H01L29/66772
摘要： It is an object of the present invention to manufacture a semiconductor element and an integrated circuit that have high performance over a large-sized substrate with high throughput and high productivity. When single crystal semiconductor layers are transferred from a single crystal semiconductor substrate (a bond wafer), the single crystal semiconductor substrate is etched selectively (this step is also referred to as groove processing), and a plurality of single crystal semiconductor layers divided such that they have the size of semiconductor elements to be manufactured are transferred to a different substrate (a base substrate). Thus, a plurality of island-shaped single crystal semiconductor layers (SOI layers) can be formed over the base substrate.
摘要翻译：本发明的一个目的是制造具有高性能的半导体元件和集成电路，其具有高通量和高生产率的大尺寸基片。当从单晶半导体衬底（接合晶片）转移单晶半导体层时，选择性地蚀刻单晶半导体衬底（该步骤也称为沟槽加工），并且将多个单晶半导体层划分为它们具有待制造的半导体元件的尺寸被转移到不同的衬底（基底）。因此，可以在基底基板上形成多个岛状单晶半导体层（SOI层）。

18. 发明授权

US08445905B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08445905B2
公开(公告)日：2013-05-21
申请号：US13567451
申请日：2012-08-06
申请人： Shunpei Yamazaki , Junichiro Sakata , Hiroyuki Miyake , Hideaki Kuwabara , Ikuko Kawamata
发明人： Shunpei Yamazaki , Junichiro Sakata , Hiroyuki Miyake , Hideaki Kuwabara , Ikuko Kawamata
IPC分类号： H01L29/10
CPC分类号： H01L27/1251 , G02F1/13454 , G02F2201/40 , G02F2202/10 , H01L27/1225 , H01L27/1233
摘要： An object is to increase an aperture ratio of a semiconductor device. The semiconductor device includes a driver circuit portion and a display portion (also referred to as a pixel portion) over one substrate. The driver circuit portion includes a channel-etched thin film transistor for a driver circuit, in which a source electrode and a drain electrode are formed using metal and a channel layer is formed of an oxide semiconductor, and a driver circuit wiring formed using metal. The display portion includes a channel protection thin film transistor for a pixel, in which a source electrode layer and a drain electrode layer are formed using an oxide conductor and a semiconductor layer is formed of an oxide semiconductor, and a display portion wiring formed using an oxide conductor.
摘要翻译：目的是提高半导体器件的开口率。半导体器件包括驱动器电路部分和在一个衬底上的显示部分（也称为像素部分）。驱动器电路部分包括用于驱动电路的沟道蚀刻薄膜晶体管，其中使用金属形成源电极和漏电极，并且沟道层由氧化物半导体形成，以及使用金属形成的驱动电路布线。显示部分包括用于像素的沟道保护薄膜晶体管，其中使用氧化物导体形成源极电极层和漏极电极层，并且半导体层由氧化物半导体形成;以及显示部分布线，其使用氧化物导体。

19. 发明授权

US07768009B2 Display device and manufacturing method of the same 有权
标题翻译：显示装置及其制造方法相同
公开(公告)号：US07768009B2
公开(公告)日：2010-08-03
申请号：US12196798
申请日：2008-08-22
申请人： Satoshi Kobayashi , Ikuko Kawamata , Koji Dairiki , Shigeki Komori , Toshiyuki Isa , Shunpei Yamazaki
发明人： Satoshi Kobayashi , Ikuko Kawamata , Koji Dairiki , Shigeki Komori , Toshiyuki Isa , Shunpei Yamazaki
IPC分类号： H01L29/04 , H01L29/10 , H01L27/12
CPC分类号： H01L29/04 , H01L29/41733 , H01L29/4908 , H01L29/66765 , H01L29/78696
摘要： A display device including a thin film transistor with high electric characteristics and high reliability, and a method for manufacturing the display device with high mass-productivity. In a display device including an inverted-staggered channel-stop-type thin film transistor, the inverted-staggered channel-stop-type thin film transistor includes a microcrystalline semiconductor film including a channel formation region, and an impurity region containing an impurity element of one conductivity type is selectively provided in a region which is not overlapped with source and drain electrodes, in the channel formation region of the microcrystalline semiconductor film.
摘要翻译：一种包括具有高电特性和高可靠性的薄膜晶体管的显示装置，以及具有高批量生产率的显示装置的制造方法。在包括反交错通道停止型薄膜晶体管的显示装置中，反交错通道停止型薄膜晶体管包括包含沟道形成区的微晶半导体膜，以及含有杂质元素的杂质区在微晶半导体膜的沟道形成区域中，在不与源极和漏极重叠的区域中选择性地提供一种导电型。

20. 发明申请

US20060046336A1 Method for manufacturing display device 有权
标题翻译：显示装置制造方法
公开(公告)号：US20060046336A1
公开(公告)日：2006-03-02
申请号：US11205220
申请日：2005-08-17
申请人： Hironobu Shoji , Shinji Maekawa , Kensuke Yoshizumi , Tatsuya Honda , Yukie Suzuki , Ikuko Kawamata , Shunpei Yamazaki
发明人： Hironobu Shoji , Shinji Maekawa , Kensuke Yoshizumi , Tatsuya Honda , Yukie Suzuki , Ikuko Kawamata , Shunpei Yamazaki
IPC分类号： H01L21/00
CPC分类号： H01L51/56 , H01L27/1277 , H01L27/1292 , H01L27/322 , H01L27/3244 , H01L27/3246 , H01L27/3262 , H01L27/3276 , H01L29/42384 , H01L29/458 , H01L29/66757 , H01L29/78675 , H01L29/78696 , H01L51/0005 , H01L51/524 , H01L51/5253 , H01L51/5281 , H01L51/529 , H01L2251/5315 , H01L2251/5323 , Y02P80/30
摘要： The present invention provides a method for manufacturing a display device having a TFT that can be operated at high speed while using a small number of photomasks and improving the utilization efficiency of materials, where the threshold value is difficult to be varied. In the invention, a catalytic element is applied to an amorphous semiconductor film and the amorphous semiconductor film is heated to form a crystalline semiconductor film. After removing the catalytic element from the crystalline semiconductor film, a top-gate type thin film transistor with a planar structure is manufactured. Moreover, by using the droplet discharging method where an element of a display device is formed selectively, the process can be simplified, and loss of materials can be reduced.
摘要翻译：本发明提供了一种用于制造具有TFT的显示装置的方法，所述显示装置可以在使用少量光掩模的情况下高速运转并且提高难以改变阈值的材料的利用效率。在本发明中，将催化元件施加到非晶半导体膜上，并加热非晶半导体膜以形成结晶半导体膜。在从晶体半导体膜去除催化元素之后，制造具有平面结构的顶栅型薄膜晶体管。此外，通过使用选择性地形成显示装置的元件的液滴喷射方法，可以简化该过程，并且可以减少材料的损失。

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