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11. 发明申请

US20070096210A1 Semiconductor device and method of forming the same 失效
标题翻译：半导体器件及其形成方法
公开(公告)号：US20070096210A1
公开(公告)日：2007-05-03
申请号：US11594759
申请日：2006-11-09
申请人： Shunpei Yamazaki , Yasuhiko Takemura , Hongyong Zhang
发明人： Shunpei Yamazaki , Yasuhiko Takemura , Hongyong Zhang
IPC分类号： H01L27/12 , H01L27/01 , H01L31/0392
CPC分类号： H01L27/1274 , G02F1/13454 , G02F2001/136245 , H01L21/8213 , H01L29/02 , H01L29/78603 , H01L29/78675 , H01L29/78687 , H01L29/78696
摘要： An insulated gate semiconductor device comprising an insulator substrate having provided thereon a source and a drain region; a channel region being incorporated between said source and said drain regions, said channel region comprising a polycrystalline, a single crystal, or a semi-amorphous semiconductor material; and a region provided under said channel region, said region comprising an amorphous material containing the same material as that of the channel region as the principal component, or said region comprising a material having a band gap larger than said channel region. A process for fabricating the device is also disclosed.
摘要翻译：一种绝缘栅极半导体器件，包括其上设置有源极和漏极区域的绝缘体衬底; 沟道区域并入所述源极和所述漏极区域之间，所述沟道区域包括多晶，单晶或半非晶半导体材料; 以及设置在所述沟道区下面的区域，所述区域包含含有与作为主要成分的沟道区相同的材料的非晶材料，或者所述区域包括具有比所述沟道区大的带隙的材料。还公开了一种用于制造该器件的工艺。

12. 发明授权

US07148542B2 Semiconductor device and method of forming the same 失效
标题翻译：半导体器件及其形成方法
公开(公告)号：US07148542B2
公开(公告)日：2006-12-12
申请号：US10805327
申请日：2004-03-22
申请人： Shunpei Yamazaki , Yasuhiko Takemura , Hongyong Zhang
发明人： Shunpei Yamazaki , Yasuhiko Takemura , Hongyong Zhang
IPC分类号： H01L27/01
CPC分类号： H01L27/1274 , G02F1/13454 , G02F2001/136245 , H01L21/8213 , H01L29/02 , H01L29/78603 , H01L29/78675 , H01L29/78687 , H01L29/78696
摘要： An insulated gate semiconductor device comprising an insulator substrate having provided thereon a source and a drain region; a channel region being incorporated between said source and said drain regions, said channel region comprising a polycrystalline, a single crystal, or a semi-amorphous semiconductor material; and a region provided under said channel region, said region comprising an amorphous material containing the same material as that of the channel region as the principal component, or said region comprising a material having a band gap larger than said channel region.A process for fabricating the device is also disclosed.
摘要翻译：一种绝缘栅极半导体器件，包括其上设置有源极和漏极区域的绝缘体衬底; 沟道区域并入所述源极和所述漏极区域之间，所述沟道区域包括多晶，单晶或半非晶半导体材料; 以及设置在所述沟道区下面的区域，所述区域包含含有与作为主要成分的沟道区相同的材料的非晶材料，或者所述区域包括具有比所述沟道区大的带隙的材料。还公开了一种用于制造该器件的工艺。

13. 发明授权

US06803600B2 Insulated gate field effect semiconductor devices and method of manufacturing the same 失效
标题翻译：绝缘栅场效应半导体器件及其制造方法
公开(公告)号：US06803600B2
公开(公告)日：2004-10-12
申请号：US09983523
申请日：2001-10-24
申请人： Shunpei Yamazaki , Yasuhiko Takemura , Hongyong Zhang
发明人： Shunpei Yamazaki , Yasuhiko Takemura , Hongyong Zhang
IPC分类号： H01L2904
CPC分类号： H01L27/127 , G02F1/13454 , G02F2001/136245 , H01L21/76897 , H01L27/1214 , H01L29/04 , H01L29/4908 , H01L29/66757 , H01L29/78621 , H01L29/78627 , H01L29/78651 , H01L29/78666 , H01L29/78675
摘要： An LDD structure is manufactured to have a desired aspect ratio of the height to the width of a gate electrode. The gate electrode is first deposited on a semiconductor substrate followed by ion implantation with the gate electrode as a mask to form a pair of impurity regions. The gate electrode is then anodic oxidized to form an oxide film enclosing the electrode. With the oxide film as a mask, highly doped regions are formed by ion implantation in order to define lightly doped regions between the highly doped regions and the channel region located therebetween.
摘要翻译：制造LDD结构以具有期望的高度与栅电极的宽度的纵横比。首先将栅电极沉积在半导体衬底上，随后以栅电极作为掩模进行离子注入，以形成一对杂质区。然后对栅电极进行阳极氧化，形成包围电极的氧化膜。以氧化物膜为掩模，通过离子注入形成高度掺杂的区域，以便在高掺杂区域和位于它们之间的沟道区域之间限定轻掺杂区域。

14. 发明授权

US06610142B1 Process for fabricating semiconductor and process for fabricating semiconductor device 失效
标题翻译：用于制造半导体的工艺和用于制造半导体器件的工艺
公开(公告)号：US06610142B1
公开(公告)日：2003-08-26
申请号：US08977944
申请日：1997-11-24
申请人： Toru Takayama , Hongyong Zhang , Shunpei Yamazaki , Yasuhiko Takemura
发明人： Toru Takayama , Hongyong Zhang , Shunpei Yamazaki , Yasuhiko Takemura
IPC分类号： C30B1322
CPC分类号： H01L27/12 , H01L21/02422 , H01L21/02488 , H01L21/02532 , H01L21/02672 , H01L21/02675 , H01L27/1277 , H01L27/1285 , H01L29/66757 , H01L29/78654 , H01L29/78675
摘要： A process for fabricating a semiconductor at a lower crystallization temperature and yet at a shorter period of time, which comprises forming an insulator coating on a substrate; exposing said insulator coating to a plasma; forming an amorphous silicon film on said insulator coating after its exposure to said plasma; and heat treating said silicon film in the temperature range of from 400 to 650° C. or at a temperature not higher than the glass transition temperature of the substrate. The nucleation sites are controlled by selectively exposing the amorphous silicon film to a plasma or by selectively applying a substance containing elements having a catalytic effect thereto. A process for fabricating a thin film transistor using the same is also disclosed.
摘要翻译：一种制造半导体的方法，该半导体在较低的结晶温度下并且在较短的时间内，其包括在基片上形成绝缘体涂层; 将所述绝缘体涂层暴露于等离子体; 在暴露于所述等离子体之后，在所述绝缘体涂层上形成非晶硅膜; 在400〜650℃的温度范围内或在不高于基板的玻璃化转变温度的温度下对所述硅膜进行热处理。通过选择性地将非晶硅膜暴露于等离子体或通过选择性地施加含有其催化作用的元素的物质来控制成核位点。还公开了使用其制造薄膜晶体管的工艺。

15. 发明授权

US6013928A Semiconductor device having interlayer insulating film and method for forming the same 失效
标题翻译：具有层间绝缘膜的半导体装置及其制造方法
公开(公告)号：US6013928A
公开(公告)日：2000-01-11
申请号：US479393
申请日：1995-06-07
申请人： Shunpei Yamazaki , Akira Mase , Masaaki Hiroki , Yasuhiko Takemura , Hongyong Zhang , Hideki Uochi , Hideki Nemoto
发明人： Shunpei Yamazaki , Akira Mase , Masaaki Hiroki , Yasuhiko Takemura , Hongyong Zhang , Hideki Uochi , Hideki Nemoto
IPC分类号： G02F1/136 , G02F1/1362 , G02F1/1368 , H01L21/336 , H01L21/77 , H01L21/84 , H01L27/12 , H01L29/49 , H01L29/78 , H01L29/786 , H04N3/12 , H01L27/01 , H01L31/0392 , H01L29/04
CPC分类号： H04N3/127 , H01L27/1214 , H01L29/4908 , H01L29/66757 , H01L29/78618 , G02F1/1368 , G02F2001/136245 , G09G2300/0823
摘要： An insulated-gate field-effect transistor adapted to be used in an active-matrix liquid-crystal display. The channel length, or the distance between the source region and the drain region, is made larger than the length of the gate electrode taken in the longitudinal direction of the channel. Offset regions are formed in the channel region on the sides of the source and drain regions. No or very weak electric field is applied to these offset regions from the gate electrode.
摘要翻译：一种适用于有源矩阵液晶显示器的绝缘栅场效应晶体管。沟道长度或源极区域和漏极区域之间的距离大于沿着沟道的纵向方向取得的栅电极的长度。偏移区域形成在源极和漏极区域的侧面上的沟道区域中。没有或非常弱的电场被施加到来自栅电极的这些偏移区域。

16. 发明授权

US5985741A Semiconductor device and method of fabricating the same 失效
公开(公告)号：US5985741A
公开(公告)日：1999-11-16
申请号：US821656
申请日：1997-03-20
申请人： Shunpei Yamazaki , Yasuhiko Takemura , Hongyong Zhang
发明人： Shunpei Yamazaki , Yasuhiko Takemura , Hongyong Zhang
IPC分类号： H01L21/20 , H01L21/336 , H01L21/77 , H01L21/84 , H01L27/12 , H01L29/04 , H01L29/786
CPC分类号： H01L29/66757 , H01L27/12 , H01L27/1277 , H01L29/04 , H01L29/78654 , H01L29/78675 , H01L21/2022
摘要： A method for improving the reliability and yield of a thin film transistor by controlling the crystallinity thereof. The method comprises the steps of forming a gate electrode on an island amorphous silicon film, injecting an impurity using the gate electrode as a mask, forming a coating film containing at least one of nickel, iron, cobalt, platinum and palladium so that it adheres to parts of the impurity regions, and annealing it at a temperature lower than the crystallization temperature of pure amorphous silicon to advance the crystallization starting therefrom and to crystallize the impurity regions and channel forming region.

17. 发明授权

US5962870A Insulated gate field effect semiconductor devices 失效
标题翻译：绝缘栅场效应半导体器件
公开(公告)号：US5962870A
公开(公告)日：1999-10-05
申请号：US467984
申请日：1995-06-06
申请人： Shunpei Yamazaki , Yasuhiko Takemura , Hongyong Zhang
发明人： Shunpei Yamazaki , Yasuhiko Takemura , Hongyong Zhang
IPC分类号： H01L29/78 , G02F1/1362 , H01L21/265 , H01L21/336 , H01L21/60 , H01L21/77 , H01L21/84 , H01L27/12 , H01L29/04 , H01L29/49 , H01L29/786 , H01L29/76 , H01L27/01
CPC分类号： H01L29/04 , H01L21/76897 , H01L27/1214 , H01L29/4908 , H01L29/66757 , H01L29/78621 , H01L29/78627 , H01L29/78651 , H01L29/78666 , H01L29/78675 , G02F1/13454 , G02F2001/136245
摘要： An LDD structure is manufactured to have a desired aspect ratio of the height to the width of a gate electrode. The gate electrode is first deposited on a semiconductor substrate followed by ion implantation with the gate electrode as a mask to form a pair of impurity regions. The gate electrode is then anodic oxidized to form an oxide film enclosing the electrode. With the oxide film as a mask, highly doped regions are formed by ion implantation in order to define lightly doped regions between the highly doped regions and the channel region located therebetween.
摘要翻译：制造LDD结构以具有期望的高度与栅电极的宽度的纵横比。首先将栅电极沉积在半导体衬底上，随后以栅电极作为掩模进行离子注入，以形成一对杂质区。然后对栅电极进行阳极氧化，形成包围电极的氧化膜。以氧化物膜为掩模，通过离子注入形成高度掺杂的区域，以便在高掺杂区域和位于它们之间的沟道区域之间限定轻掺杂区域。

18. 再颁专利

USRE36314E Insulated gate field effect semiconductor devices having a LDD region and an anodic oxide film of a gate electrode 失效
标题翻译：具有LDD区域和栅电极的阳极氧化膜的绝缘栅场效应半导体器件
公开(公告)号：USRE36314E
公开(公告)日：1999-09-28
申请号：US620857
申请日：1996-06-04
申请人： Shunpei Yamazaki , Hongyong Zhang , Yasuhiko Takemura
发明人： Shunpei Yamazaki , Hongyong Zhang , Yasuhiko Takemura
IPC分类号： G02F1/1362 , H01L21/336 , H01L21/60 , H01L21/77 , H01L21/84 , H01L27/12 , H01L29/49 , H01L29/786 , H01L29/04 , H01L31/036 , H01L27/01 , H01L29/76
CPC分类号： H01L27/1214 , H01L21/76897 , H01L27/1229 , H01L29/4908 , H01L29/66757 , H01L29/78621 , H01L29/78651 , H01L29/78666 , H01L29/78675 , G02F1/13454 , G02F2001/136245
摘要： An IGFET has differential crystallinity in offset regions near the source-channel and drain-channel boundaries. In one embodiment, an offset region with crystallinity different from that of an adjacent region is provided between the channel and at least one of the source and drain regions. An oxide film may be provided to cover the surface of the gate electrode, formed by anodizing the surface of the gate electrode, and this layer may be used as a mask when forming the crystallinity offset regions.
摘要翻译： IGFET在源极沟道和漏极 - 沟道边界附近的偏移区域具有差分结晶度。在一个实施例中，具有与相邻区域不同的结晶度的偏移区域设置在沟道和源极和漏极区域中的至少一个之间。可以提供氧化物膜以覆盖通过阳极氧化栅电极的表面形成的栅电极的表面，并且该层可以在形成结晶偏移区域时用作掩模。

19. 发明授权

US5913112A Method of manufacturing an insulated gate field effect semiconductor device having an offset region and/or lightly doped region 失效
标题翻译：具有偏移区域和/或轻掺杂区域的绝缘栅场效应半导体器件的制造方法
公开(公告)号：US5913112A
公开(公告)日：1999-06-15
申请号：US209063
申请日：1994-03-11
申请人： Shunpei Yamazaki , Yasuhiko Takemura , Hongyong Zhang
发明人： Shunpei Yamazaki , Yasuhiko Takemura , Hongyong Zhang
IPC分类号： H01L29/78 , G02F1/1362 , H01L21/265 , H01L21/336 , H01L21/60 , H01L21/77 , H01L21/84 , H01L27/12 , H01L29/04 , H01L29/49 , H01L29/786 , H01L21/00
CPC分类号： H01L29/04 , H01L21/76897 , H01L27/1214 , H01L29/4908 , H01L29/66757 , H01L29/78621 , H01L29/78627 , H01L29/78651 , H01L29/78666 , H01L29/78675 , G02F1/13454 , G02F2001/136245
摘要： An LDD structure is manufactured to have a desired aspect ratio of the height to the width of a gate electrode. The gate electrode is first deposited on a semiconductor substrate followed by ion implantation with the gate electrode as a mask to form a pair of impurity regions. The gate electrode is then anodic oxidized to form an oxide film enclosing the electrode. With the oxide film as a mask, highly doped regions are formed by ion implantation in order to define lightly doped regions between the highly doped regions and the channel region located therebetween.
摘要翻译：制造LDD结构以具有期望的高度与栅电极的宽度的纵横比。首先将栅电极沉积在半导体衬底上，随后以栅电极作为掩模进行离子注入，以形成一对杂质区。然后对栅电极进行阳极氧化，形成包围电极的氧化膜。以氧化物膜为掩模，通过离子注入形成高度掺杂的区域，以便在高掺杂区域和位于它们之间的沟道区域之间限定轻掺杂区域。

20. 发明授权

US5849043A Apparatus for laser ion doping 失效
标题翻译：激光离子掺杂装置
公开(公告)号：US5849043A
公开(公告)日：1998-12-15
申请号：US411973
申请日：1995-03-28
申请人： Hongyong Zhang , Shunpei Yamazaki , Yasuhiko Takemura
发明人： Hongyong Zhang , Shunpei Yamazaki , Yasuhiko Takemura
IPC分类号： B60R25/00 , E05B67/06 , E05B67/38 , H01L21/223 , H01L21/336 , H01L21/268 , H01L21/428
CPC分类号： H01L29/66757 , B60R25/066 , H01L21/223 , H01L27/14692 , Y10T29/41
摘要： A process for laser processing an article, which comprises: heating the intended article to be doped with an impurity to a temperature not higher than the melting point thereof, said article being made from a material selected from a semiconductor, a metal, an insulator, and a combination thereof; and irradiating a laser beam to the article in a reactive gas atmosphere containing said impurity, thereby allowing the impurity to physically or chemically diffuse into, combine with, or intrude into said article. The present invention also provides an apparatus for use in a laser processing process, characterized by that it is provided with an internal sample holder and a device which functions as a heating means of the sample, a window made of a material sufficiently transparent to transmit a laser beam, a chamber comprising a vacuum evacuation device and a device for introducing a reactive gas containing an impurity element, a laser apparatus operating in a pulsed mode to irradiate a laser beam to said chamber, and a means to move said chamber synchronously with the laser irradiation.
摘要翻译：一种激光加工制品的方法，包括：将待掺杂杂质的预期制品加热到不高于其熔点的温度，所述制品由选自半导体，金属，绝缘体，及其组合; 并在包含所述杂质的反应性气体气氛中向所述制品照射激光束，从而使所述杂质物理或化学扩散到所述制品中，与之结合或侵入所述制品。本发明还提供了一种在激光加工工艺中使用的装置，其特征在于，其具有内部样品保持器和用作样品加热装置的装置，由足够透明的材料制成的窗口，激光束，包括真空抽出装置的腔室和用于引入含有杂质元素的反应性气体的装置，以脉冲模式操作以将激光束照射到所述腔室的激光装置，以及与所述腔室同步地移动所述腔室的装置激光照射。

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