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11. 发明授权

US07823481B2 Pedal module 有权
标题翻译：踏板模块
公开(公告)号：US07823481B2
公开(公告)日：2010-11-02
申请号：US11058693
申请日：2005-02-16
申请人： Masahiro Makino , Shigeru Hasegawa , Takehiro Saito
发明人： Masahiro Makino , Shigeru Hasegawa , Takehiro Saito
IPC分类号： G05G1/30
CPC分类号： G05G1/30 , G05G5/03 , Y10T74/20528 , Y10T74/20534
摘要： A pedal module includes a double coil spring, a pedal, and a damping part. The double coil spring includes an outside coil and an inside coil. The pedal turns in a forward direction when a depressing force is applied thereto and turns in a reverse direction when a restoring force of the double coil spring is applied thereto. The damping part has an inserting portion disposed between the outside coil and the inside coil. The inserting portion includes a middle portion and a first side end portion disposed relative to each other in a width direction that corresponds to a circumferential direction of the double coil spring. The middle portion crosses a radial axis of the double coil spring and protrudes beyond the first side end portion toward an axial end of the double coil spring.
摘要翻译：踏板模块包括双螺旋弹簧，踏板和阻尼部件。双螺旋弹簧包括外部线圈和内部线圈。当施加按压力时，踏板向前转动，当双螺旋弹簧的恢复力被施加到其上时，踏板向相反方向转动。阻尼部具有设置在外侧线圈和内侧线圈之间的插入部。插入部分包括在与双螺旋弹簧的圆周方向相对应的宽度方向上相对于彼此设置的中间部分和第一侧端部部分。中间部分与双螺旋弹簧的径向轴线交叉，并且朝向双螺旋弹簧的轴向端部突出超过第一侧端部。

12. 发明申请

US20050280078A1 Insulated gate semiconductor device 有权
标题翻译：绝缘栅半导体器件
公开(公告)号：US20050280078A1
公开(公告)日：2005-12-22
申请号：US11154743
申请日：2005-06-17
申请人： Satoshi Teramae , Shigeru Hasegawa , Hideaki Ninomiya , Masahiro Tanaka
发明人： Satoshi Teramae , Shigeru Hasegawa , Hideaki Ninomiya , Masahiro Tanaka
IPC分类号： H01L21/336 , H01L29/06 , H01L29/10 , H01L29/417 , H01L29/739 , H01L29/76
CPC分类号： H01L29/7397 , H01L29/0696 , H01L29/41741
摘要： An insulated gate semiconductor device, includes an isolating structure shaped in a circulating section along the periphery of a semiconductor substrate so as to isolate that part from an inside device region, a peripheral diffusion region of the semiconductor substrate located outside the isolating structure, a plurality of cell structures defined in the device region and divided in segments by insulated trench-shaped gates so as to have a base region covered with an emitter region in its upper surface, a collector region, and an emitter electrode electrically connected to the emitter region and the base region, a dummy base region contiguous to the cell structures and configured as a base region that has its upper surface left without the emitter region connected to the emitter electrode, and a connection part to electrically connect the peripheral diffusion region to the emitter electrode.
摘要翻译：一种绝缘栅半导体器件，包括沿着半导体衬底的周边形成在循环部分中的隔离结构，以将该部分与内部器件区域隔离，位于隔离结构外部的半导体衬底的外围扩散区域，多个在器件区域中定义并由绝缘的沟槽状栅极划分成段的单元结构，以便在其上表面上覆盖有发射极区域的基极区域，集电极区域和电连接到发射极区域的发射极电极，所述基极区域，与所述单元结构邻接的虚设基极区域，并且被配置为其上表面保持没有发射极区域连接到所述发射极的基极区域;以及连接部分，用于将所述外围扩散区域电连接到所述发射极电极。

13. 发明授权

US06666432B2 Idle speed control valve 失效
公开(公告)号：US06666432B2
公开(公告)日：2003-12-23
申请号：US10073872
申请日：2002-02-14
申请人： Satoshi Ishigaki , Shigeru Hasegawa , Tetsuo Hariu
发明人： Satoshi Ishigaki , Shigeru Hasegawa , Tetsuo Hariu
IPC分类号： F16K3102
CPC分类号： F02M3/075
摘要： In an idle speed control valve, an adjusting screw is inserted into a hole of a valve body and passes through a center of a coil provided in the valve body. The adjusting screw has a ring-shaped flexible projection on its outer periphery between a head portion and a threaded portion thereof to prevent a sealing material from entering. An outer diameter of the projection is equal to or slightly larger than an inner diameter of the hole. Therefore, when the adjusting screw is inserted into the hole, a peak of the projection contacts an inner wall of the hole. The projection may be integrally molded with the adjusting screw. A ring-shaped projection may be provided on a thin wall portion of the adjusting screw.

14. 发明授权

US06337498B1 Semiconductor device having directionally balanced gates and manufacturing method 失效
标题翻译：具有定向平衡栅极的半导体器件和制造方法
公开(公告)号：US06337498B1
公开(公告)日：2002-01-08
申请号：US09249296
申请日：1999-02-12
申请人： Shigeru Hasegawa , Hideo Matsuda , Yoshiro Baba , Masanobu Tsuchitani
发明人： Shigeru Hasegawa , Hideo Matsuda , Yoshiro Baba , Masanobu Tsuchitani
IPC分类号： H01L2994
CPC分类号： H01L29/7397 , H01L29/0696 , H01L29/4238
摘要： A semiconductor device such as an IGBT having trench gates in a form of stripes, and manufacturing method, wherein concentration of stresses in only a single direction is relieved and the generation of a leakage current and crystal defects in the IGBT is prevented. In one embodiment, the inside of a terminal area of an IGBT is divided into a single gate pad area and plural element areas by a wiring area. The respective element areas are arranged in such a manner that the directions of trench gates formed in the respective element areas cross at right angles with respect to the directions of trench gates of respective adjacent element areas.
摘要翻译：诸如具有条形沟槽栅极的IGBT的半导体器件以及其中单个方向上的应力集中被释放并且防止了IGBT中产生漏电流和晶体缺陷的制造方法。在一个实施例中，IGBT的端子区域的内部通过布线区域分成单个栅极焊盘区域和多个元件区域。相应的元件区域被布置成使得形成在各个元件区域中的沟槽栅极的方向相对于各个相邻元件区域的沟槽栅极的方向成直角交叉。

15. 外观设计

USD416018S Combined optical disc recording and reproducing apparatus 失效
公开(公告)号：USD416018S
公开(公告)日：1999-11-02
申请号：US86597
申请日：1998-04-16
申请人： Masafumi Ito , Shigeru Hasegawa , Yoshinori Fuse
设计人： Masafumi Ito , Shigeru Hasegawa , Yoshinori Fuse

16. 外观设计

USD414768S Tape recorder 失效
公开(公告)号：USD414768S
公开(公告)日：1999-10-05
申请号：US91793
申请日：1998-08-05
申请人： Masafumi Ito , Shigeru Hasegawa
设计人： Masafumi Ito , Shigeru Hasegawa

17. 外观设计

USD372915S Combined tuner and amplifier 失效
公开(公告)号：USD372915S
公开(公告)日：1996-08-20
申请号：US40486
申请日：1995-06-20
申请人： Masafumi Ito , Shigeru Hasegawa , Minoru Sube , Haruki Takita , Hiroyuki Watanabe , Yukio Iikura
设计人： Masafumi Ito , Shigeru Hasegawa , Minoru Sube , Haruki Takita , Hiroyuki Watanabe , Yukio Iikura

18. 外观设计

USD371783S Digital audio disc player 失效
公开(公告)号：USD371783S
公开(公告)日：1996-07-16
申请号：US33388
申请日：1995-01-11
申请人： Masafumi Ito , Shigeru Hasegawa , Katsuhiro Takashima , Yasunobu Shimizu , Yukio Iikura
设计人： Masafumi Ito , Shigeru Hasegawa , Katsuhiro Takashima , Yasunobu Shimizu , Yukio Iikura

19. 发明授权

US5463231A Method of operating thyristor with insulated gates 失效
公开(公告)号：US5463231A
公开(公告)日：1995-10-31
申请号：US353385
申请日：1994-12-02
申请人： Tsuneo Ogura , Kiminori Watanabe , Akio Nakagawa , Yoshihiro Yamaguchi , Norio Yasuhara , Tomoko Matsudai , Shigeru Hasegawa , Kazuya Nakayama
发明人： Tsuneo Ogura , Kiminori Watanabe , Akio Nakagawa , Yoshihiro Yamaguchi , Norio Yasuhara , Tomoko Matsudai , Shigeru Hasegawa , Kazuya Nakayama
IPC分类号： H01L27/06 , H01L29/74 , H01L29/745 , H01L29/749 , H01L31/111
CPC分类号： H01L27/0617 , H01L29/7436 , H01L29/7455 , H01L29/749
摘要： A thyristor with insulated gates includes turn-off and turn-on MOSFETs. The turn-on MOSFET has a turn-on gate employing a p-type base as a channel and extending over an n-type base and an n-type emitter. The turn-off MOSFET has n-type drain and source layers formed in a p-type base layer, and a turn-off gate extending over the drain and source layers. The n-type drain layer is short-circuited with the p-type base layer via a drain electrode. The drain electrode is formed near an n-type emitter layer. When the thyristor is to be turned off, the first voltage is applied to the turn-on gate, and the second voltage is applied to the turn-off gate while the first voltage is applied to the turn-on gate. After the application of the second voltage continues for a predetermined period of time, the application of the first voltage to the turn-on gate is stopped. With this operation, the thyristor can be turned off even with a large current.

20. 外观设计

USD339585S Data recording/reproducing apparatus 失效
公开(公告)号：USD339585S
公开(公告)日：1993-09-21
申请号：US657191
申请日：1991-02-19
申请人： Masafumi Ito , Shigeru Hasegawa , Katsuhiro Takashima
设计人： Masafumi Ito , Shigeru Hasegawa , Katsuhiro Takashima

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