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    • 11. 发明授权
    • Gate driver without pre-charging capacitor in gate driving circuit
    • 栅极驱动器,不需要在栅极驱动电路中对电容器进行预充电
    • US08553027B2
    • 2013-10-08
    • US12488803
    • 2009-06-22
    • Hyoung-Rae KimHyo-Sun KimYoon-Kyung ChoiJae-Youl Lee
    • Hyoung-Rae KimHyo-Sun KimYoon-Kyung ChoiJae-Youl Lee
    • G06F3/038
    • G09G3/3677G09G2300/0426G09G2310/0248G09G2310/0291
    • A display panel driving apparatus and a method of driving the same are provided, and, in particular, a gate driver and a method of driving the gate driver. The gate driver includes a decoder that decodes gate line selection data and that generates a gate line selection signal. A gate driving circuit generates a gate driving signal in a pre-charging phase and a driving phase in response to the gate line selection signal and a pre-charging control signal that controls an off-state of non-selected gate lines. In a time period of the driving phase in which a gate line is not selected, a node that has been in a floating state is held to a target voltage level in response to a hold control signal. The hold control signal is generated based upon a timing relationship between the gate line selection signal and the pre-charging control signal.
    • 提供了显示面板驱动装置及其驱动方法,特别是栅极驱动器和驱动栅极驱动器的方法。 栅极驱动器包括解码栅极线选择数据并产生栅极线选择信号的解码器。 栅极驱动电路响应于栅极线选择信号而产生预充电阶段和驱动相位中的栅极驱动信号,以及控制非选择栅极线的截止状态的预充电控制信号。 在没有选择栅极线的驱动阶段的时间段中,响应于保持控制信号将处于浮置状态的节点保持到目标电压电平。 保持控制信号基于栅极线选择信号和预充电控制信号之间的定时关系而产生。
    • 13. 发明授权
    • Gray scale voltage decoder and digital-to-analog converter including the same
    • 灰度电压解码器和数模转换器包括相同的
    • US08264436B2
    • 2012-09-11
    • US12123787
    • 2008-05-20
    • Yoon-Kyung Choi
    • Yoon-Kyung Choi
    • G09G3/36
    • G09G3/20G09G2310/027H03M1/68H03M1/76
    • A gray scale voltage decoder includes a first decoding unit and a second decoding unit, in which the first decoding unit includes row blocks. Each of the row blocks receives one of a number of gray scale voltages and determines whether to output the received gray scale voltage in response to first bits of digital image data provided through data input lines formed along a column direction. Row blocks outputting the received gray scale voltage according to the same values of the first bits are arranged adjacently. The first decoding unit selects part of the gray scale voltages to output the selected gray scale voltages. The second decoding unit selects one of the gray scale voltages selected by the first decoding unit in response to second bits of the digital image data and outputs the selected gray scale voltage.
    • 灰度级电压解码器包括第一解码单元和第二解码单元,其中第一解码单元包括行块。 每个行块接收多个灰度级电压中的一个,并且响应于通过沿着列方向形成的数据输入线提供的数字图像数据的第一位来确定是否输出接收的灰度级电压。 根据第一位的相同值输出接收到的灰度级电压的行块相邻布置。 第一解码单元选择部分灰度电压以输出所选择的灰度级电压。 第二解码单元响应于数字图像数据的第二位选择由第一解码单元选择的灰度级电压之一,并输出所选择的灰度级电压。