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11. 发明申请

US20100107129A1 Indeterminate State Logic Insertion 有权
标题翻译：不确定状态逻辑插入
公开(公告)号：US20100107129A1
公开(公告)日：2010-04-29
申请号：US12257610
申请日：2008-10-24
申请人： Robert Glen Gerowitz , Michael Patrick Muhlada , Chad Everett Winemiller
发明人： Robert Glen Gerowitz , Michael Patrick Muhlada , Chad Everett Winemiller
IPC分类号： G06F17/50
CPC分类号： G06F17/505
摘要： Illustrative embodiments provide a computer-implemented method for resolving indeterminate states by inserting logic into a design. The computer-implemented method receives an original design input from a requester to form a received input and determines whether the received input contains an indeterminate output. Responsive to a determination that the received input contains an indeterminate output, the computer-implemented method generates a temporary design from the received input, wherein the temporary design contains “unique” output and all inputs, updates the temporary design, and synthesizes the original design and each temporary design individually to form a synthesized original design and a set of synthesized temporary designs. The computer-implemented method merges the synthesized original design with the set of synthesized temporary design to form a final design; and returns the final design to the requester.
摘要翻译：说明性实施例提供了一种用于通过将逻辑插入到设计中来解决不确定状态的计算机实现的方法。计算机实现的方法从请求者接收原始设计输入以形成接收到的输入，并确定接收的输入是否包含不确定的输出。响应于确定接收到的输入包含不确定的输出，计算机实现的方法从接收到的输入生成临时设计，其中临时设计包含“唯一”输出和所有输入，更新临时设计，并且合成原始设计和每个临时设计单独形成合成的原始设计和一组合成的临时设计。计算机实现的方法将合成原始设计与合成临时设计集合合并形成最终设计; 并将最终设计返回给请求者。

12. 发明申请

US20100057425A1 AUTOMATICALLY CREATING MANUFACTURING TEST RULES PERTAINING TO AN ELECTRONIC COMPONENT 有权
标题翻译：自动创建制作电子元件的测试规则
公开(公告)号：US20100057425A1
公开(公告)日：2010-03-04
申请号：US12203038
申请日：2008-09-02
申请人： Robert Glen Gerowitz , Michael Patrick Muhlada , Chad Everett Winemiller
发明人： Robert Glen Gerowitz , Michael Patrick Muhlada , Chad Everett Winemiller
IPC分类号： G06F17/50
CPC分类号： G06F17/5068 , G06F2217/12 , Y02P90/265
摘要： A system for creating manufacturing test rules. Stimuli for an electronic design are generated automatically by a stimuli generator. The stimuli generator takes into account certain limitations of the design when automatically generating the manufacturing test rules. The design is tested by a testbench using the stimuli. A simulation log for the design is generated by the testbench. The simulation log is then processed by a simulation log processor. An HDL representation of the design is generated by the simulation log processor using the processed simulation log. A gate-level version of the design is generated by a synthesis tool using the HDL representation of the design. The gate-level version of the design is further processed by the synthesis tool to make any necessary modifications. Then, the gate-level version of the design is outputted as the final manufacturing test rule. Thus, creating manufacturing test rules can be completely automated.
摘要翻译：用于创建制造测试规则的系统。电子设计的刺激是由刺激发生器自动产生的。当自动生成制造测试规则时，刺激发生器考虑到设计的某些限制。该设计由使用刺激的测试台进行测试。该设计的仿真日志由测试平台生成。仿真日志由仿真日志处理器处理。设计的HDL表示由仿真日志处理器使用处理的仿真日志生成。设计的门级版本由使用设计的HDL表示的综合工具生成。设计的门级版本由综合工具进一步处理，以进行任何必要的修改。然后，设计的门级版本作为最终制造测试规则输出。因此，创建制造测试规则可以完全自动化。

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