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11. 发明申请

US20050138256A1 Method and apparatus for processing hot key input using operating system visible interrupt handling 审中-公开
标题翻译：使用操作系统可视中断处理来处理热键输入的方法和装置
公开(公告)号：US20050138256A1
公开(公告)日：2005-06-23
申请号：US10746491
申请日：2003-12-23
申请人： Frederick Bolay , Rajeev Nalawadi
发明人： Frederick Bolay , Rajeev Nalawadi
IPC分类号： G06F9/48 , G06F13/24
CPC分类号： G06F9/4812 , G06F13/24
摘要： Embodiments include an interrupt handling system to generate an operating system visible interrupt such as a message signaled interrupt or interprocessor interrupt by an advanced configuration and power management interface (ACPI) and ACPI source language infrastructure. The interrupt handling system may be used to service hot keys. This interrupt handling system allows for easy upgrading of system functionality by updating a driver.
摘要翻译：实施例包括用于通过高级配置和电源管理接口（ACPI）和ACPI源语言基础设施来产生操作系统可视中断（例如消息信号中断或处理器间中断）的中断处理系统。中断处理系统可用于服务热键。该中断处理系统允许通过更新驱动程序轻松升级系统功能。

12. 发明申请

US20140189391A1 SYSTEM AND METHOD FOR CONVEYING SERVICE LATENCY REQUIREMENTS FOR DEVICES CONNECTED TO LOW POWER INPUT/OUTPUT SUB-SYSTEMS 有权
标题翻译：用于输送连接到低功率输入/输出子系统的设备的服务延迟要求的系统和方法
公开(公告)号：US20140189391A1
公开(公告)日：2014-07-03
申请号：US13730625
申请日：2012-12-28
申请人： Jaya L. Jeyaseelan , Linda Weyhing , Rajeev Nalawadi , Barnes Cooper , Suraj Varma , Nevo Idan , David Poisner
发明人： Jaya L. Jeyaseelan , Linda Weyhing , Rajeev Nalawadi , Barnes Cooper , Suraj Varma , Nevo Idan , David Poisner
IPC分类号： G06F1/32
CPC分类号： G06F1/3206 , G06F1/3234 , G06F1/3287 , Y02D10/171
摘要： In at least one embodiment described herein, an apparatus is provided that can include means for communicating a latency tolerance value for a device connected to a platform from a software latency register if a software latency tolerance register mode is active. The apparatus may also include means for communicating the latency tolerance value from a hardware latency register if a host controller is active. The latency tolerance value can be sent to a power management controller. More specific examples can include means for communicating a latency tolerance value from the software latency register if the software latency tolerance register mode is not active and the host controller is not active. The apparatus can also include means for mapping a resource space in the software latency register for the device using a BIOS/platform driver. The mapping can be achieved using an advanced configuration and power interface device description.
摘要翻译：在本文描述的至少一个实施例中，提供了一种装置，其可以包括用于如果软件等待时间容差寄存器模式是活动的，则用于在软件等待时间寄存器中传送连接到平台的设备的等待时间容限值的装置。该装置还可以包括用于在主机控制器处于活动状态时从硬件等待时间寄存器传送等待时间容差值的装置。延迟容限值可以发送到电源管理控制器。更具体的示例可以包括用于在软件延迟容限寄存器模式不活动且主机控制器不活动的情况下从软件延迟寄存器传送延迟容限值的装置。该装置还可以包括用于使用BIOS /平台驱动器在设备的软件延迟寄存器中映射资源空间的装置。可以使用高级配置和电源接口设备描述来实现映射。

13. 发明授权

US07376782B2 Index/data register pair for indirect register access 有权
标题翻译：用于间接寄存器访问的索引/数据寄存器对
公开(公告)号：US07376782B2
公开(公告)日：2008-05-20
申请号：US11172254
申请日：2005-06-29
申请人： Jasper Balraj , Geetani R. Edirisooriya , John P. Lee , Robert Strong , Jeffrey L. Rabe , Amber Huffman , Daniel Nemiroff , Rajeev Nalawadi
发明人： Jasper Balraj , Geetani R. Edirisooriya , John P. Lee , Robert Strong , Jeffrey L. Rabe , Amber Huffman , Daniel Nemiroff , Rajeev Nalawadi
IPC分类号： G06F12/00
CPC分类号： G06F9/4401
摘要： A computer system provides a program access to a first register during real mode operation by using an index register and a data register, wherein the index register and the data register are located in real mode memory space and the first register is located outside of real mode memory space.
摘要翻译：计算机系统通过使用索引寄存器和数据寄存器在实模式操作期间提供对第一寄存器的访问，其中索引寄存器和数据寄存器位于实模式存储器空间中，并且第一寄存器位于实模式之外内存空间。

14. 发明申请

US20070005947A1 Operating system mode transfer 有权
标题翻译：操作系统模式传输
公开(公告)号：US20070005947A1
公开(公告)日：2007-01-04
申请号：US11173261
申请日：2005-06-30
申请人： Brent Chartrand , Rajeev Nalawadi , Alberto Martinez
发明人： Brent Chartrand , Rajeev Nalawadi , Alberto Martinez
IPC分类号： G06F15/177
CPC分类号： G06F9/4418
摘要： Provided are a method, system and program for effecting an operating system mode change from one mode to another. In one embodiment, the operating system in one mode is placed in a sleep state in which volatile memory remains active. In booting an operating system from the sleep state, a flag may be detected indicating an operating system mode transfer request. In response, contents of a selected range of volatile memory allocated to the first operating system mode may be swapped with the contents of a selected range of a reserve portion of volatile memory allocated to the second operating system mode. Booting of an operating system in the second mode may be completed using the swapped contents of the volatile memory. Additional embodiments are described and claimed.
摘要翻译：提供了一种用于实现从一种模式到另一种模式的操作系统模式改变的方法，系统和程序。在一个实施例中，处于一种模式的操作系统处于休眠状态，其中易失性存储器保持活动。在从休眠状态引导操作系统时，可以检测到指示操作系统模式传送请求的标志。作为响应，分配给第一操作系统模式的易失性存储器的选定范围的内容可以与分配给第二操作系统模式的易失性存储器的保留部分的选定范围的内容交换。可以使用易失性存储器的交换内容来完成第二模式中的操作系统的引导。描述和要求保护附加的实施例。

15. 发明申请

US20060069848A1 Flash emulation using hard disk 审中-公开
标题翻译：使用硬盘进行Flash仿真
公开(公告)号：US20060069848A1
公开(公告)日：2006-03-30
申请号：US10956396
申请日：2004-09-30
申请人： Rajeev Nalawadi , Dong Thai
发明人： Rajeev Nalawadi , Dong Thai
IPC分类号： G06F12/00
CPC分类号： G06F3/0664 , G06F3/0605 , G06F3/0608 , G06F3/0659 , G06F3/0679
摘要： A device including a storage controller. A flash memory is connected to the storage controller. The flash memory to store flash memory data. A processing unit is connected to the storage controller. The processing unit to generate memory commands. A volatile memory is connected to the processing unit. A non-volatile memory is connected to the storage controller. The non-volatile memory to retain the flash memory data. A process to perform memory commands on the flash memory data retained in the non-volatile memory.
摘要翻译：一种包括存储控制器的设备。闪存连接到存储控制器。闪存用于存储闪存数据。处理单元连接到存储控制器。处理单元生成存储器命令。易失性存储器连接到处理单元。非易失性存储器连接到存储控制器。非易失性存储器保留闪存数据。对保存在非易失性存储器中的闪速存储器数据执行存储器命令的过程。

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