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    • 11. 发明申请
    • Transparent Self-Hibernation of Non-Volatile Memory System
    • 非易失性存储系统的透明自休眠
    • US20100106886A1
    • 2010-04-29
    • US12260744
    • 2008-10-29
    • Alon MarcuOri Stern
    • Alon MarcuOri Stern
    • G06F1/26G06F12/02
    • G06F1/3275G06F1/3225Y02D10/13Y02D10/14Y02D50/20
    • A memory system self-initiates hibernation mode and responds to host commands issued during hibernation within a host protocol timeout period. Hibernation mode is entered after controller state data has been stored and while no host command to the memory system is pending. Power to volatile data storage is diminished during hibernation mode. Upon receiving a host command during hibernation mode, power is restored and a reduced portion of the controller state data is read from non-volatile memory. A removable data storage device or a portable electronic device with embedded data storage may be constructed with such a self-hibernating memory system.
    • 存储器系统自主启动休眠模式,并响应主机协议超时期间休​​眠期间发出的主机命令。 在控制器状态数据已被存储并且没有主机命令到存储器系统之前进入休眠模式。 在休眠模式下,易失性数据存储的功耗降低。 在休眠模式期间接收到主机命令时,恢复供电并且从非易失性存储器读取控制器状态数据的减少的部分。 具有嵌入式数据存储器的可移动数据存储设备或便携式电子设备可以用这种自行休眠存储器系统来构建。
    • 13. 发明申请
    • CONTROLLER FOR ONE TYPE OF NAND FLASH MEMORY FOR EMULATING ANOTHER TYPE OF NAND FLASH MEMORY
    • 用于模拟其他类型NAND闪存的一种类型的NAND闪存存储器的控制器
    • US20090172247A1
    • 2009-07-02
    • US11964741
    • 2007-12-27
    • SHAHAR BAR-ORAlon MarcuOri SternDan Inbar
    • SHAHAR BAR-ORAlon MarcuOri SternDan Inbar
    • G06F12/02
    • G11C16/10
    • A controller for one type of NAND flash memory device that emulates another type of NAND flash memory device. The controller may include a host NAND interface to receive host data from a NAND host device, and a data aggregator for aggregating the host data with complementary data, to thereby create device data that is storable in a device page of an array of NAND flash memory cells of the NAND flash memory device. After creating the device data the controller writes the device data into a device page of the NAND flash memory cells. The controller also includes a data parser to parse host data from device data when data read operations are executed by the controller. If required, the controller uses the data parser to parse complementary data from device data to create device data when data writing operations are executed by the controller.
    • 一种用于模拟另一类NAND闪存器件的NAND闪存器件的控制器。 控制器可以包括用于从NAND主机设备接收主机数据的主机NAND接口和用于利用补充数据聚集主机数据的数据聚合器,从而创建可存储在N​​AND闪存阵列的设备页面中的设备数据 NAND闪存设备的单元。 创建设备数据后,控制器将设备数据写入NAND闪存单元的设备页面。 当控制器执行数据读取操作时,控制器还包括一个数据解析器,用于从设备数据中解析主机数据。 如果需要,当控制器执行数据写入操作时,控制器使用数据解析器来解析设备数据中的补充数据以创建设备数据。