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11. 发明申请

US20100111537A1 Passive Optical Networks with Mode Coupling Receivers 有权
标题翻译：无源光网络与模式耦合接收机
公开(公告)号：US20100111537A1
公开(公告)日：2010-05-06
申请号：US12606872
申请日：2009-10-27
申请人： Ning Cheng , Frank J. Effenberger
发明人： Ning Cheng , Frank J. Effenberger
IPC分类号： H04J14/02
CPC分类号： H04J14/02 , G02B6/12004 , G02B6/4206 , G02B6/421 , H04B10/2581 , H04B10/272 , H04J14/0282 , H04J14/04
摘要： An apparatus comprising a mode coupler configured to couple a plurality optical signals into a plurality of modes, and a receiver coupled to the mode coupler and configured to detect the modes to obtain the optical signals, wherein the optical signals are coupled from single mode fibers. Also disclosed is an apparatus comprising a plurality of single mode waveguides configured to transport a plurality of single mode signals, and a detector coupled to the single mode waveguides and configured to detect the single mode signals, wherein the single mode signals are substantially coupled without loss from the single mode waveguides to the detector. Also disclosed is a method comprising receiving a plurality of single mode optical channels, coupling the single mode optical channels into a multimode channel, and detecting the optical modes corresponding to the channels in the multimode channel.
摘要翻译：一种装置，包括配置成将多个光信号耦合到多个模式的模耦合器，以及耦合到模耦合器并被配置为检测模式以获得光信号的接收器，其中光信号从单模光纤耦合。还公开了一种包括被配置为传输多个单模信号的多个单模波导的装置，以及耦合到单模波导并被配置为检测单模信号的检测器，其中单模信号基本上耦合而没有损耗从单模波导到检测器。还公开了一种方法，包括接收多个单模光信道，将单模光信道耦合到多模信道中，以及检测对应于多模信道中的信道的光模。

12. 发明申请

US20090111265A1 SELECTIVE SILICIDE FORMATION USING RESIST ETCHBACK 有权
标题翻译：选择性硅化物形成使用电阻蚀刻
公开(公告)号：US20090111265A1
公开(公告)日：2009-04-30
申请号：US11924823
申请日：2007-10-26
申请人： Kyunghoon Min , Angela Hui , Hiroyuki Kinoshita , Ning Cheng , Mark Chang
发明人： Kyunghoon Min , Angela Hui , Hiroyuki Kinoshita , Ning Cheng , Mark Chang
IPC分类号： H01L21/4763
CPC分类号： H01L27/115 , H01L21/28518 , H01L21/31144 , H01L27/105 , H01L27/1052 , H01L27/11534 , H01L27/11568 , H01L29/665
摘要： Methods of selectively forming metal silicides on a memory device are provided. The methods can include forming a mask layer over the memory device; forming a patterned resist over the mask layer; removing upper portions of the patterned resist; forming a patterned mask layer by removing portions of the mask layer that are not covered by the patterned resist; and forming metal silicides on the memory device by a chemical reaction of a metal layer formed on the memory device with portions of the memory device that are not covered by the patterned mask layer. By preventing silicidation of underlying silicon containing layers/components of the memory device that are covered by the patterned mask layer, the methods can selectively form the metal silicides on the desired portions of the memory device.
摘要翻译：提供了在存储器件上选择性地形成金属硅化物的方法。所述方法可以包括在存储器件上形成掩模层; 在掩模层上形成图案化的抗蚀剂; 去除图案化抗蚀剂的上部; 通过去除未被图案化抗蚀剂覆盖的掩模层的部分来形成图案化掩模层; 以及通过形成在存储器件上的金属层与未被图案化掩模层覆盖的存储器件的部分的化学反应在存储器件上形成金属硅化物。通过防止由图案化掩模层覆盖的存储器件的下层含硅层/部件的硅化，该方法可以选择性地在存储器件的期望部分上形成金属硅化物。

13. 发明申请

US20090042378A1 USE OF A POLYMER SPACER AND SI TRENCH IN A BITLINE JUNCTION OF A FLASH MEMORY CELL TO IMPROVE TPD CHARACTERISTICS 有权
标题翻译：在闪速存储器单元的位线结中使用聚合物间隔物和硅酸盐以提高TPD特性
公开(公告)号：US20090042378A1
公开(公告)日：2009-02-12
申请号：US11835538
申请日：2007-08-08
申请人： Ning Cheng , Calvin Gabriel , Angela Hui , Lei Xue , Harpreet Kaur Sachar , Phillip Lawrence Jones , Hiro Kinoshita , K.T. Chang , Huaqiang Wu
发明人： Ning Cheng , Calvin Gabriel , Angela Hui , Lei Xue , Harpreet Kaur Sachar , Phillip Lawrence Jones , Hiro Kinoshita , K.T. Chang , Huaqiang Wu
IPC分类号： H01L21/22
CPC分类号： H01L27/11568 , H01L29/4234 , H01L29/66833 , H01L29/7923
摘要： Memory devices having improved TPD characteristics and methods of making the memory devices are provided. The memory devices contain two or more memory cells on a semiconductor substrate and bit line dielectrics between the memory cells. The bit line dielectrics can extend into the semiconductor. The memory cell contains one or more charge storage nodes, a first poly gate, a pair of first bit lines, and a pair of second bit lines. The second bit line can be formed at a higher energy level, a higher concentration of dopants, or a combination thereof compared to an energy level and a concentration of dopants of the first bit line.
摘要翻译：提供了具有改善的TPD特性的存储器件和制造存储器件的方法。存储器件在半导体衬底上包含两个或更多存储器单元，并且在存储器单元之间包含位线电介质。位线电介质可以延伸到半导体中。存储单元包含一个或多个电荷存储节点，第一多晶硅栅极，一对第一位线和一对第二位线。与第一位线的能级和掺杂剂的浓度相比，第二位线可以形成在更高的能级，更高浓度的掺杂剂或其组合。

14. 发明申请

US20090039405A1 ORO AND ORPRO WITH BIT LINE TRENCH TO SUPPRESS TRANSPORT PROGRAM DISTURB 有权
标题翻译： ORO和ORPRO与位线TRENCH到禁止运输程序干扰
公开(公告)号：US20090039405A1
公开(公告)日：2009-02-12
申请号：US11835542
申请日：2007-08-08
申请人： Ning Cheng , K.T. Chang , Hiro Kinoshita , Chih-Yuh Yang , Lei Xue , Chungho Lee , Minghao Shen , Angela Hui , Huaqiang Wu
发明人： Ning Cheng , K.T. Chang , Hiro Kinoshita , Chih-Yuh Yang , Lei Xue , Chungho Lee , Minghao Shen , Angela Hui , Huaqiang Wu
IPC分类号： H01L29/76 , H01L21/336
CPC分类号： H01L27/115 , H01L21/28273 , H01L21/28282 , H01L27/11521 , H01L27/11568 , H01L29/42332 , H01L29/42348 , H01L29/66825 , H01L29/66833 , H01L29/7887 , H01L29/7923
摘要： Memory devices having improved TPD characteristics and methods of making the memory devices are provided. The memory devices contain two or more memory cells on a semiconductor substrate and bit line openings containing a bit line dielectric between the memory cells. The memory cell contains a charge storage layer and a first poly gate. The bit line opening extends into the semiconductor substrate. By containing the bit line dielectric in the bit line openings that extend into the semiconductor substrate, the memory device can improve the electrical isolation between memory cells, thereby preventing and/or mitigating TPD.
摘要翻译：提供了具有改善的TPD特性的存储器件和制造存储器件的方法。存储器件在半导体衬底上包含两个或更多个存储单元，并且在存储单元之间包含位线电介质的位线开口。存储单元包含电荷存储层和第一多晶硅栅极。位线开口延伸到半导体衬底中。通过将延伸到半导体衬底的位线开口中的位线电介质包含在内，存储器件可以改善存储器单元之间的电隔离，从而防止和/或减轻TPD。

15. 发明授权

US07118967B1 Protection of charge trapping dielectric flash memory devices from UV-induced charging in BEOL processing 有权
标题翻译：保护电荷捕获电介质闪存器件免受BEOL处理中的紫外线引起的充电
公开(公告)号：US07118967B1
公开(公告)日：2006-10-10
申请号：US10368696
申请日：2003-02-19
申请人： Minh V. Ngo , Ning Cheng , Jeff P. Erhardt , Clarence B. Ferguson , Cyrus Tabery , John Caffall , Tyagamohan Gottipati , Dawn Hopper
发明人： Minh V. Ngo , Ning Cheng , Jeff P. Erhardt , Clarence B. Ferguson , Cyrus Tabery , John Caffall , Tyagamohan Gottipati , Dawn Hopper
IPC分类号： H01L21/336
CPC分类号： H01L29/7923 , H01L29/66833 , Y10S438/954
摘要： A method of protecting a charge trapping dielectric flash memory cell from UV-induced charging, including fabricating a charge trapping dielectric flash memory cell including a charge trapping dielectric charge storage layer in a semiconductor device; and during processing steps subsequent to formation of the charge trapping dielectric charge storage layer, protecting the charge trapping dielectric flash memory cell from exposure to a level of UV radiation sufficient to deposit a non-erasable charge in the charge trapping dielectric flash memory cell. In one embodiment, the step of protecting is carried out by selecting processes in BEOL fabrication which do not include use, generation or exposure of the semiconductor device to a level of UV radiation sufficient to deposit the non-erasable charge.
摘要翻译：一种保护电荷捕获电介质闪存单元免受UV感应充电的方法，包括在半导体器件中制造包括电荷捕获介电电荷存储层的电荷捕获电介质闪存单元; 并且在形成电荷捕获介电电荷存储层之后的处理步骤期间，保护电荷捕获电介质闪速存储器单元暴露于足以在电荷俘获电介质闪存单元中沉积不可擦除电荷的UV辐射水平。在一个实施例中，保护步骤是通过选择不包括半导体器件的使用，产生或曝光到足以沉积不可擦除电荷的紫外线辐射的水平的BEOL制造中的工艺进行的。

16. 发明申请

US20060035459A1 Method of forming narrowly spaced flash memory contact openings and lithography masks 有权
公开(公告)号：US20060035459A1
公开(公告)日：2006-02-16
申请号：US10916167
申请日：2004-08-11
申请人： Emmanuil Lingunis , Ning Cheng , Mark Ramsbey , Kouros Ghandehari , Anna Minvielle , Hung-Eil Kim
发明人： Emmanuil Lingunis , Ning Cheng , Mark Ramsbey , Kouros Ghandehari , Anna Minvielle , Hung-Eil Kim
IPC分类号： H01L21/4763 , H01L21/44
CPC分类号： H01L27/11568 , G03F1/36 , H01L27/115 , Y10S438/942 , Y10S438/947
摘要： A method is provided for creating optical features on a lithography mask for use in patterning a series of openings of an etch mask on a semiconductor device wafer, comprising creating a series of optical features spaced on the lithography mask from one another along a first direction, where the individual optical features have first mask feature dimensions along the first direction that are smaller than a desired first dimension for the openings to be patterned in the etch mask.

17. 发明授权

US06958271B1 Method of fabricating a dual-level stacked flash memory cell with a MOSFET storage transistor 失效
标题翻译：制造具有MOSFET存储晶体管的双电平堆叠闪存单元的方法
公开(公告)号：US06958271B1
公开(公告)日：2005-10-25
申请号：US10634042
申请日：2003-08-04
申请人： James Pan , Ning Cheng , Christy Mein Chu Woo
发明人： James Pan , Ning Cheng , Christy Mein Chu Woo
IPC分类号： G11C7/00 , G11C16/04 , H01L21/28 , H01L21/336 , H01L29/423 , H01L29/792
CPC分类号： H01L21/28273 , G11C16/0475 , H01L29/4234 , H01L29/66825 , H01L29/7923
摘要： The present invention relates to methods of fabricating dual-level flash memory cells. A first active region and a second active region are formed in a substrate. A trench is formed in the substrate between the first active region and the second active region. A first insulator dielectric is formed on the substrate and within the trench forming a vertical structure. A first poly layer is formed on the first insulator dielectric. A second insulator dielectric is formed on at least a portion of the first poly layer. A second poly layer is formed on the second insulator dielectric.
摘要翻译：本发明涉及制造双层闪存单元的方法。在衬底中形成第一有源区和第二有源区。在第一有源区和第二有源区之间的衬底中形成沟槽。第一绝缘体电介质形成在衬底上并且在沟槽内形成垂直结构。在第一绝缘体电介质上形成第一多晶硅层。在第一多晶硅层的至少一部分上形成第二绝缘体电介质。在第二绝缘体电介质上形成第二多晶硅层。

18. 发明授权

US06765254B1 Structure and method for preventing UV radiation damage and increasing data retention in memory cells 有权
标题翻译：用于防止紫外线辐射损伤并增加记忆单元中数据保留的结构和方法
公开(公告)号：US06765254B1
公开(公告)日：2004-07-20
申请号：US10460279
申请日：2003-06-12
申请人： Angela Hui , Minh V. Ngo , Ning Cheng , Jaeyong Park , Jean Y. Yang , Hidehiko Shiraiwa , Rinji Sugino , Tazrien Kamal , Cinti X. Chen
发明人： Angela Hui , Minh V. Ngo , Ning Cheng , Jaeyong Park , Jean Y. Yang , Hidehiko Shiraiwa , Rinji Sugino , Tazrien Kamal , Cinti X. Chen
IPC分类号： H01L27108
CPC分类号： H01L27/115 , H01L23/552 , H01L27/11521 , H01L27/11568 , H01L2924/0002 , H01L2924/00
摘要： According to one exemplary embodiment, a structure comprises a substrate. The structure further comprises at least one memory cell situated on the substrate. The at least one memory cell may be, for example, a flash memory cell, such as a SONOS flash memory cell. The structure further comprises an interlayer dielectric layer situated over the at least one memory cell and over the substrate. According to this exemplary embodiment, the structure further comprises a UV radiation blocking layer which comprises silicon-rich TCS nitride. Further, an oxide cap layer is situated over the UV radiation blocking layer. The structure might further comprise an antireflective coating layer over the oxide cap layer. The interlayer dielectric may comprise BPSG and the oxide cap layer may comprise TEOS oxide.
摘要翻译：根据一个示例性实施例，一种结构包括基底。该结构还包括位于基板上的至少一个存储单元。至少一个存储单元可以是例如闪存单元，例如SONOS闪存单元。所述结构还包括位于所述至少一个存储器单元上方并位于所述衬底之上的层间电介质层。根据该示例性实施例，该结构还包括包含富含硅的TCS氮化物的UV辐射阻挡层。此外，氧化物覆盖层位于UV辐射阻挡层上。该结构还可以包括氧化物覆盖层上的抗反射涂层。层间电介质可以包括BPSG，并且氧化物覆盖层可以包含TEOS氧化物。

19. 发明授权

US08903251B2 Power saving in passive optical networks using dynamic data rate scaling 有权
标题翻译：使用动态数据速率缩放对无源光网络进行节能
公开(公告)号：US08903251B2
公开(公告)日：2014-12-02
申请号：US13178192
申请日：2011-07-07
申请人： Ning Cheng , Frank J. Effenberger
发明人： Ning Cheng , Frank J. Effenberger
IPC分类号： H04B10/20 , H04B10/00 , H04J14/00 , H04B10/67 , H04Q11/00
CPC分类号： H04J14/00 , H04B10/272 , H04B10/671 , H04Q11/0067 , H04Q2011/0079
摘要： An Optical Network Unit (ONU) in a Passive Optical Network (PON), the ONU comprising: a receiver module configured to receive a first rate selection signal from an optical line terminal (OLT) that indicates a reduced rate mode, and a component comprised within the receiver module, the component configured to transition from a normal operation mode to the reduced rate mode in response to the receiver module receiving the first rate selection signal, wherein operating in the normal operation mode comprises receiving a downstream signal from the OLT at a nominal data rate, and wherein operating in the reduced rate mode comprises receiving the downstream signal from the OLT at a reduced data rate that is less than the nominal data rate but greater than zero.
摘要翻译：一种无源光网络（PON）中的光网络单元（ONU），所述ONU包括：接收机模块，被配置为从指示降低速率模式的光线路终端（OLT）接收第一速率选择信号，以及包括在所述接收机模块内，所述组件被配置为响应于所述接收机模块接收到所述第一速率选择信号而从正常操作模式转换到所述降低速率模式，其中在所述正常操作模式下操作包括：在所述接收机模块中接收来自所述OLT的下行信号标称数据速率，并且其中以降低速率模式操作包括以小于标称数据速率但大于零的减小的数据速率从OLT接收下行信号。

20. 发明授权

US08532489B2 Multi-fiber ten gigabit passive optical network optical line terminal for optical distribution network coexistence with gigabit passive optical network 失效
标题翻译：多光纤10千兆无源光网络光端机，用于光配线网络与千兆无源光网络共存
公开(公告)号：US08532489B2
公开(公告)日：2013-09-10
申请号：US12709563
申请日：2010-02-22
申请人： Ning Cheng , Zhishan Feng , Frank J. Effenberger
发明人： Ning Cheng , Zhishan Feng , Frank J. Effenberger
IPC分类号： H04J14/00 , H04J14/02
CPC分类号： H04J14/0282 , H04J14/0209 , H04J14/0226 , H04J14/0238 , H04Q11/0067 , H04Q2011/0016 , H04Q2011/0079
摘要： An apparatus comprising a wavelength division multiplexing (WDM) coupler configured to couple an optical line terminal (OLT) comprising a transmitter and a receiver, wherein the WDM coupler is coupled to the transmitter via a first fiber and to the receiver via a second fiber. An apparatus comprising a WDM coupler for a passive optical network (PON) comprising a plurality of filters and a plurality of ports, wherein the WDM coupler comprises fewer filters than ports. A method comprising receiving a downstream optical signal intended for an optical network terminal (ONT) via a first fiber, and transmitting an upstream optical signal received from the ONT via a second fiber.
摘要翻译：一种包括配置成耦合包括发射机和接收机的光线路终端（OLT）的波分复用（WDM）耦合器的设备，其中所述WDM耦合器经由第一光纤耦合到所述发射机，并经由第二光纤耦合到所述接收机。一种包括用于无源光网络（PON）的WDM耦合器的装置，包括多个滤波器和多个端口，其中所述WDM耦合器包括比端口少的滤波器。一种方法，包括经由第一光纤接收用于光网络终端（ONT）的下行光信号，以及经由第二光纤发送从ONT接收的上行光信号。

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