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11. 发明授权

US5592628A Data communication system which guarantees at a transmission station the arrival of transmitted data to a receiving station and method thereof 失效
标题翻译：数据通信系统，在传输站保证发送数据到达接收站及其方法
公开(公告)号：US5592628A
公开(公告)日：1997-01-07
申请号：US595505
申请日：1996-02-01
申请人： Haruhiko Ueno , Shigeru Nagasawa , Masayuki Ikeda , Naoki Shinjo , Ken-ichi Ishizaka , Teruo Utsumi , Masami Dewa , Kazushige Kobayakawa
发明人： Haruhiko Ueno , Shigeru Nagasawa , Masayuki Ikeda , Naoki Shinjo , Ken-ichi Ishizaka , Teruo Utsumi , Masami Dewa , Kazushige Kobayakawa
IPC分类号： G06F9/46 , G06F12/08 , G06F15/173 , H04L12/70 , H04L29/06 , G06F15/163
CPC分类号： G06F9/544 , G06F12/0813 , G06F15/17375
摘要： Any two of multiple processor elements are coupled with each other via a data communication network that has a definite communication buffer length and includes multiple communication buffers. A packet having a header and body is created using processed data, and then transferred by a transmitting unit. After sending the processed data, the transmitting unit transmits dummy data, having a body which is longer than the communication buffer length in the data communication network, to the same receiving station as the one to which the processed data is transmitted. The transmitting unit then guarantees a processor element serving as a receiving station the arrival of preceding processed data and the header. Control data representing cache invalidation waiting is embedded in the header of the dummy data. When a transmitting end terminates transfer of the dummy data, the sending station can guarantee the termination of cache invalidation, which is performed by the processor element serving as a receiving station to attain the consistency of the contents of preceding storage data main storage and a cache memory.
摘要翻译：多个处理器元件中的任何两个通过具有确定的通信缓冲器长度并包括多个通信缓冲器的数据通信网络相互耦合。使用处理的数据创建具有报头和主体的分组，然后由发送单元传送。在发送处理后的数据之后，发送单元将具有比数据通信网络中的通信缓冲器长度长的身体的虚拟数据发送到与发送处理后的数据相同的接收站。然后，发送单元保证作为接收站的处理器元件到达先前处理的数据和报头。表示缓存无效等待的控制数据被嵌入到伪数据的头部。当发送端终止虚拟数据的传送时，发送站可以保证由用作接收站的处理器元件执行的高速缓存无效的终止，以达到先前存储数据主存储和高速缓存的内容的一致性记忆。

12. 发明授权

US5832261A Barrier synchronizing mechanism for a parallel data processing control system 失效
标题翻译：一种并行数据处理控制系统的屏障同步机制
公开(公告)号：US5832261A
公开(公告)日：1998-11-03
申请号：US983075
申请日：1992-11-30
申请人： Kenichi Ishizaka , Masayuki Katori , Masayuki Ikeda , Shigeru Nagasawa , Hiroshi Komatsuda
发明人： Kenichi Ishizaka , Masayuki Katori , Masayuki Ikeda , Shigeru Nagasawa , Hiroshi Komatsuda
IPC分类号： G06F15/16 , G06F9/44 , G06F9/52 , G06F15/177 , G06F15/80
CPC分类号： G06F8/45 , G06F15/8007
摘要： In a parallel data processing control system for a parallel computer system having a plurality of computers and an adapter device connecting the computers to each other, a first unit, which is provided in the adapter device, transfers pieces of data processing progress state information to the computers. The pieces of the data processing progress state information respectively indicate data processing progress states of the computers. A second unit, which is provided in each of the computers, holds the pieces of the data processing progress state information. A third unit, which is provided in each of the computers, holds management information indicating a group of computers which share a data process. A fourth unit, which is provided in each of the computers, determines whether or not the computers in the group have completed the data process on the basis of the pieces of the data processing progress state information and the management information.
摘要翻译：在具有多个计算机的并行计算机系统和将计算机彼此连接的适配器装置的并行数据处理控制系统中，设置在适配器装置中的第一单元将数据处理进度状态信息传送到电脑。数据处理进度状态信息分别表示计算机的数据处理进度状态。设置在每个计算机中的第二单元保存数据处理进度状态信息。设置在每个计算机中的第三单元保存指示共享数据处理的一组计算机的管理信息。设置在每台计算机中的第四单元基于数据处理进度状态信息和管理信息来确定组中的计算机是否已经完成数据处理。

13. 发明授权

US4143330A Detector circuit 失效
标题翻译：检测电路
公开(公告)号：US4143330A
公开(公告)日：1979-03-06
申请号：US857763
申请日：1977-12-05
申请人： Shigeru Nagasawa
发明人： Shigeru Nagasawa
IPC分类号： H03D1/06 , H03D1/10 , H03D1/18
CPC分类号： H03D1/10 , H03D1/06
摘要： A detector circuit comprising a detector element which includes a diode having a high-frequency input terminal which receives a predetermined DC bias voltage, and a parallel circuit constituted by a resistor and a capacitor and connected between the output terminal of the detector element and a ground terminal. The detector circuit is further provided with a resistor connected between the parallel circuit and the output terminal of the detector element.

14. 发明授权

US4467226A Darlington complementary circuit for preventing zero crossover distortion 失效
标题翻译：达林顿互补电路，用于防止零交叉失真
公开(公告)号：US4467226A
公开(公告)日：1984-08-21
申请号：US288797
申请日：1981-07-31
申请人： Shigeru Nagasawa
发明人： Shigeru Nagasawa
IPC分类号： H03F3/30 , H03F3/20 , H03K17/615 , H03K17/66 , H03K3/26 , H03K17/60
CPC分类号： H03K17/615 , H03K17/666
摘要： A Darlington complementary circuit including first and second signal channel Darlington pairs each of which pair has an input and output transistor, wherein a diode is coupled in series with the base-emitter path of the output transistor of each pair to assure simultaneous turn-off of the transistors of each pair, and thereby prevent distortion of an output signal as one pair ceases operation and the other pair begins operation.
摘要翻译：一种达林顿互补电路，包括第一和第二信号通道达林顿对，其中每对具有输入和输出晶体管，其中二极管与每对输出晶体管的基极 - 发射极路径串联耦合以确保同时关断每对晶体管，从而防止一对输出信号失真，另一对开始工作。

15. 发明授权

US5661205A Method for producing a polychloroprene latex 失效
公开(公告)号：US5661205A
公开(公告)日：1997-08-26
申请号：US588389
申请日：1996-01-18
申请人： Mikitoshi Satoh , Masao Koga , Shigeru Nagasawa , Kunihiko Asano , Toshiyuki Uenoyama , Kunihiro Onishi
发明人： Mikitoshi Satoh , Masao Koga , Shigeru Nagasawa , Kunihiko Asano , Toshiyuki Uenoyama , Kunihiro Onishi
IPC分类号： C08F236/18 , C09J111/02 , C09J113/02 , C08K5/06
CPC分类号： C09J111/02 , C08F236/18 , C09J113/02
摘要： A method for producing a polychloroprene latex, which comprises copolymerizing chloroprene and an ethylenically unsaturated carboxylic acid in the presence of a polyvinyl alcohol, wherein a glycol ether is also present during the copolymerization.

16. 发明授权

US4293941A Memory access control system in vector processing system 失效
标题翻译：矢量处理系统中的存储器访问控制系统
公开(公告)号：US4293941A
公开(公告)日：1981-10-06
申请号：US40994
申请日：1979-05-21
申请人： Takatoshi Muraoka , Keiichiro Uchida , Minoru Koshino , Masanori Motegi , Shigeru Nagasawa
发明人： Takatoshi Muraoka , Keiichiro Uchida , Minoru Koshino , Masanori Motegi , Shigeru Nagasawa
IPC分类号： G06F12/00 , G06F7/78 , G06F12/06 , G06F12/08 , G06F12/12 , G06F13/16 , G06F15/78 , G06F17/16 , G06F13/00
CPC分类号： G06F7/785 , G06F13/16 , G06F15/8076
摘要： A memory access control system in a vector processing system comprises a memory unit, a memory device, address holding registers, a shift register and data buffer registers. The memory access control system distinguishes each vector data read out from the memory unit based upon the address holding registers by the output of the shift register. The shift register stores vector element numbers indicated by the memory device and transfers same to the data buffer registers. Each number from 0 to n-1, of a vector A composed of n elements a.sub.0, a.sub.1, a.sub.2, . . . a.sub.n-1, is a vector element number and each data, from a.sub.0 to a.sub.n-1, is vector element data.
摘要翻译：矢量处理系统中的存储器访问控制系统包括存储器单元，存储器件，地址保持寄存器，移位寄存器和数据缓冲寄存器。存储器访问控制系统通过移位寄存器的输出，基于地址保持寄存器来区分从存储器单元读出的每个向量数据。移位寄存器存储由存储器件指示的矢量元件号，并将其传送到数据缓冲寄存器。由n个元素a0，a1，a2，...构成的矢量A的0到n-1的每个数。。。 a-1是矢量元素号，从a0到a-1的每个数据是向量元素数据。

17. 发明授权

US3976866A Addition control system 失效
标题翻译：加法控制系统
公开(公告)号：US3976866A
公开(公告)日：1976-08-24
申请号：US609698
申请日：1975-09-02
申请人： Masanori Motegi , Keiichiro Uchida , Minoru Koshino , Takatoshi Muraoka , Shigeru Nagasawa
发明人： Masanori Motegi , Keiichiro Uchida , Minoru Koshino , Takatoshi Muraoka , Shigeru Nagasawa
IPC分类号： G06F7/38 , G06F7/50 , G06F7/505 , G06F7/385
CPC分类号： G06F7/505 , G06F2207/3836 , G06F7/4991
摘要： A system for controlling the addition of signed binary numbers represented with N bits, of the 2's complement notation, is disclosed which includes addend and augend sign control circuits, and an adder circuit comprising a carry save adder and a carry proper gate adder. The addend sign control circuit receives an operation command sign signal (B, --B, .vertline.B.vertline. or --.vertline.B.vertline.) for the addend, which designates the addend of the certain type (B, .vertline.B.vertline. or --.vertline.--B.vertline.) to be applied directly to the carry save adder and designates the addend of another type (--B, .vertline.--B.vertline. or --.vertline.B.vertline.) to be applied to the carry save adder through a 1's complementer. The augend sign control circuit functions similarly for the augend being applied to the carry save adder. A corrective number (0, 1 or 2) is applied to the adder circuit which corresponds to neither, one, or both the addend and augend being applied to the adder circuit through their respective 1's complementer.
摘要翻译：公开了一种用于控制由2位补码表示的N位表示的有符号二进制数的加法的系统，其包括加数和加数符号控制电路，以及包括进位存储加法器和进位本门加法器的加法器电路。加数符号控制电路接收用于加法器的操作命令符号信号（B，-B，| B或-BB），其指定特定类型的加数（B，| B |或 - ）直接应用于进位存储加法器，并通过1的补码器指定要应用于进位保存加法器的另一种类型（-B，| -B|或-BB）的加数。加法符号控制电路的功能类似于加法器应用于进位保存加法器。校正号码（0,1或2）被施加到加法器电路，对应于加法器电路和加法器电路两者之一，加法器和加法器都不通过其相应的1的补码器。

18. 发明授权

US4963611A Vinyl acetate resin emulsion composition 失效
标题翻译：乙酸乙烯酯树脂乳液组合物
公开(公告)号：US4963611A
公开(公告)日：1990-10-16
申请号：US463007
申请日：1990-01-09
申请人： Shigeru Nagasawa , Hisao Noziri , Yoshizumi Nakai , Yasuaki Araki , Eizo Sakamoto , Masao Yagasaki , Mutsumi Kozima
发明人： Shigeru Nagasawa , Hisao Noziri , Yoshizumi Nakai , Yasuaki Araki , Eizo Sakamoto , Masao Yagasaki , Mutsumi Kozima
IPC分类号： C08F2/26 , C08F2/16 , C08F2/24 , C08F2/44 , C08F18/00 , C08F18/08 , C08K5/05 , C08L31/04
CPC分类号： C08F18/08
摘要： Vinyl acetate resin emulsion composition produced by the addition of a water soluble compound having alcoholic OH group during emulsion-polymerization or emulsion-copolymerization reaction to vinyl acetate resin emulsion which is obtained by emulsion-polymerization or emulsion-copolymerization of vinyl acetate under the presence of polyvinyl alcohol.

19. 发明授权

US06189414B1 Counter plate and cutting die for die cutting machine 失效
标题翻译：平板切割机和切割机
公开(公告)号：US06189414B1
公开(公告)日：2001-02-20
申请号：US09130832
申请日：1998-08-07
申请人： Akinori Yoshizawa , Isamu Katayama , Shigeru Nagasawa
发明人： Akinori Yoshizawa , Isamu Katayama , Shigeru Nagasawa
IPC分类号： B21K520
CPC分类号： B23P15/406 , B26D7/20 , B26F1/44
摘要： A counter plate is provided as a receiving surface opposed to a cutting die to be installed in a die cutting machine for stamping a sheet material into a predetermined shape and making ruled lines thereon, wherein the cutting die has rulings and cutting blades and the counter plate has edge bearing portions formed on portions corresponding to the cutting blades and hollows corresponding to the rulings, and a process for manufacturing the cutting die and counter plate comprising hardening selected portions thereof using laser beam irradiation.
摘要翻译：设置有相对于与切割模具相对的切割模具的接收面，用于将片材冲压成规定形状并在其上划线，其中切割模具具有划线和切割刀片以及对置板具有形成在对应于切割刀片的部分上的边缘支承部分和对应于刻线的中空部分，以及用于制造切割模具和对置板的方法，包括使用激光束照射来硬化其选择的部分。

20. 发明授权

US5889079A Antislipping composition 失效
标题翻译：防滑组合物
公开(公告)号：US5889079A
公开(公告)日：1999-03-30
申请号：US976404
申请日：1997-11-21
申请人： Kenji Idemoto , Shigeru Nagasawa , Kenji Ueji , Kunihiko Asano , Toshiyuki Uenoyama
发明人： Kenji Idemoto , Shigeru Nagasawa , Kenji Ueji , Kunihiko Asano , Toshiyuki Uenoyama
IPC分类号： F16B33/06 , C08F290/06 , C08J5/14 , C08K3/14 , C08K5/04 , C08L71/02 , C09J155/00 , C09K3/14
CPC分类号： C09K3/149 , C08F290/062 , C08K3/14 , C08K5/04 , C08L71/02 , C09J155/005
摘要： An antislipping composition for a fastener having a head portion, comprising a crosslinked polymer prepared by the polymerization of an olefinic unsaturated carboxylic acid and a compound represented by a general formula (1) given below ##STR1## where R is a hydrogen atom or a methyl group, and the sum of 1, m and n is larger than 0 and not larger than 500, except that where R is a hydrogen atom and n is zero, l+m is not 1, a liquid medium containing at least one compound selected from the group consisting of glycol ethers and glycerin, and silicon carbide particles having acute corner portions.
摘要翻译：一种用于紧固件的防滑组合物，其具有头部，其包含通过烯属不饱和羧酸的聚合制备的交联聚合物和由下式（1）表示的通式（1）表示的化合物，其中R是氢原子或甲基，除了其中R为氢原子，n为零，l + m不为1的情况下，1，m和n的总和大于0且不大于500，液体介质至少含有一种选自二醇醚和甘油的化合物和具有锐角部分的碳化硅颗粒。

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