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11. 发明授权

US07791100B2 Vertical gallium nitride based light emitting diode with multiple electrode branches 失效
标题翻译：具有多个电极分支的垂直氮化镓基发光二极管
公开(公告)号：US07791100B2
公开(公告)日：2010-09-07
申请号：US11602285
申请日：2006-11-21
申请人： Su Yeol Lee , Dong Woo Kim , Seok Beom Choi , Tae Jun Kim
发明人： Su Yeol Lee , Dong Woo Kim , Seok Beom Choi , Tae Jun Kim
IPC分类号： H01L33/00
CPC分类号： H01L33/20 , H01L33/38
摘要： A vertical GaN-based LED includes an n-type bonding pad; an n-electrode formed under the n-type bonding pad; a light-emitting structure formed by sequentially laminating an n-type GaN layer, an active layer, and a p-type GaN layer under the n-electrode; a p-electrode formed under the light-emitting structure; and a support layer formed under the p-electrode. The light-emitting structure has or or more trenches which are spaced at a predetermined distance with the n-electrode from the outermost side of the light-emitting structure and in which the active layer of the light-emitting structure is removed.
摘要翻译：垂直GaN基LED包括n型接合焊盘; 形成在n型焊盘下面的n电极; 通过在n电极下依次层叠n型GaN层，有源层和p型GaN层而形成的发光结构体; 形成在发光结构下的p电极; 以及形成在p电极下方的支撑层。发光结构具有与n电极与发光结构的最外侧隔开预定距离的沟槽，并且其中除去发光结构的有源层。

12. 发明授权

US07393710B2 Fabrication method of multi-wavelength semiconductor laser device 有权
标题翻译：多波长半导体激光器件的制作方法
公开(公告)号：US07393710B2
公开(公告)日：2008-07-01
申请号：US11247935
申请日：2005-10-11
申请人： Jin Chul Kim , Su Yeol Lee , Chang Zoo Kim , Sang Heon Han , Keun Man Song , Tae Jun Kim , Seok Beom Choi
发明人： Jin Chul Kim , Su Yeol Lee , Chang Zoo Kim , Sang Heon Han , Keun Man Song , Tae Jun Kim , Seok Beom Choi
IPC分类号： H01L21/00
CPC分类号： H01S5/4031 , H01L21/02395 , H01L21/02461 , H01L21/02463 , H01L21/02488 , H01L21/02505 , H01L21/02543 , H01L21/02546 , H01L21/0262 , H01S5/2231 , H01S5/4087 , H01S2304/04
摘要： The present invention relates to a two-wavelength semiconductor laser device, more particularly, to a fabrication method of a multi-wavelength semiconductor laser device. In this method, a substrate having an upper surface separated into at least first and second areas is provided. Then, a first dielectric mask on the substrate is formed to expose only the first area. Then, epitaxial layers for a first semiconductor laser are grown on the first area of the substrate. Then, a second dielectric mask on the substrate is formed to expose only the second area. Then, epitaxial layers for a second semiconductor laser are grown on the second area of the substrate.
摘要翻译：本发明涉及一种双波长半导体激光器件，更具体地涉及一种多波长半导体激光器件的制造方法。在该方法中，提供了具有分隔成至少第一和第二区域的上表面的基板。然后，形成基板上的第一电介质掩模，仅露出第一区域。然后，在衬底的第一区域上生长用于第一半导体激光器的外延层。然后，形成基板上的第二电介质掩模，仅露出第二区域。然后，在衬底的第二区域上生长用于第二半导体激光器的外延层。

13. 发明授权

US06653724B1 Chip on board package for optical mice and lens cover for the same 失效
标题翻译：光电鼠标芯片封装和镜头盖相同
公开(公告)号：US06653724B1
公开(公告)日：2003-11-25
申请号：US10198982
申请日：2002-07-22
申请人： Tae Jun Kim , Yoo Sun Song
发明人： Tae Jun Kim , Yoo Sun Song
IPC分类号： H01L2306
CPC分类号： G06F3/0317 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/00014 , H01L2924/00
摘要： Disclosed herein is a chip on board lead package for optical mice and lens cover for the same. A semiconductor chip on board package for optical mice has a board, a semiconductor chip, at least one circuit pattern, at least one bonding wire, and a lens cover. The board has top and bottom surfaces, and a pair of via holes. The semiconductor chip is attached to a center portion on the top surface of the board and provided with a plurality of electrode terminals. The circuit pattern is formed on the top surface of the board. The bonding wire electrically connects the electrode terminals of the semiconductor chip with the circuit pattern. The lens cover encloses the top surface of the board and has a lens disposed on the same axis as that of the semiconductor chip, a plurality of electrode pins formed at positions of the lens cover corresponding to the positions of the via holes in the board to be integrated with the lens cover, and an opening formed in a center portion within the lens cover.
摘要翻译：这里公开了用于光学鼠标的芯片上的铅封装和用于其的透镜盖。用于光学鼠标的半导体芯片板上封装具有板，半导体芯片，至少一个电路图案，至少一个接合线和透镜盖。该板具有顶面和底面，以及一对通孔。半导体芯片安装在板的顶表面上的中心部分并且设置有多个电极端子。电路图案形成在板的顶表面上。接合线将半导体芯片的电极端子与电路图形电连接。透镜盖包围板的上表面，并且具有与半导体芯片相同的轴上设置的透镜，形成在透镜盖的位置上的多个电极引脚对应于板中的通孔的位置到与透镜盖一体化，以及形成在透镜盖内的中心部分的开口。

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