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11. 发明授权

US08105937B2 Conformal adhesion promoter liner for metal interconnects 失效
标题翻译：用于金属互连的保形粘合促进剂衬垫
公开(公告)号：US08105937B2
公开(公告)日：2012-01-31
申请号：US12190906
申请日：2008-08-13
申请人： Tien-Jen Cheng , Zhengwen Li , Keith Kwong Hon Wong , Huilong Zhu
发明人： Tien-Jen Cheng , Zhengwen Li , Keith Kwong Hon Wong , Huilong Zhu
IPC分类号： H01L21/44
CPC分类号： H01L23/53238 , H01L21/28556 , H01L21/28562 , H01L21/76846 , H01L21/76864 , H01L21/76868 , H01L21/76877 , H01L2221/1089 , H01L2924/0002 , H01L2924/00
摘要： A dielectric layer is patterned with at least one line trough and/or at least one via cavity. A metallic nitride liner is formed on the surfaces of the patterned dielectric layer. A metal liner is formed on the surface of the metallic nitride liner. A conformal copper nitride layer is formed directly on the metal liner by atomic layer deposition (ALD) or chemical vapor deposition (CVD). A Cu seed layer is formed directly on the conformal copper nitride layer. The at least one line trough and/or the at least one via cavity are filled with an electroplated material. The direct contact between the conformal copper nitride layer and the Cu seed layer provides enhanced adhesion strength. The conformal copper nitride layer may be annealed to covert an exposed outer portion into a contiguous Cu layer, which may be employed to reduce the thickness of the Cu seed layer.
摘要翻译：用至少一个线槽和/或至少一个通孔腔对电介质层进行构图。金属氮化物衬垫形成在图案化电介质层的表面上。在金属氮化物衬垫的表面上形成金属衬垫。通过原子层沉积（ALD）或化学气相沉积（CVD）直接在金属衬垫上形成共形的氮化铜层。在适形的氮化铜层上直接形成Cu籽晶层。至少一个线槽和/或至少一个通孔腔被电镀材料填充。保形氮化铜层和Cu籽晶层之间的直接接触提供了增强的粘合强度。可以将共形的氮化铜层退火以将暴露的外部部分翻转成连续的Cu层，其可用于减小Cu籽晶层的厚度。

12. 发明申请

US20110183520A1 Method for Removing Copper Oxide Layer 失效
标题翻译：去除氧化铜层的方法
公开(公告)号：US20110183520A1
公开(公告)日：2011-07-28
申请号：US12695273
申请日：2010-01-28
申请人： Tien-Jen Cheng , Stephan Grunow , Zhengwen Li , Huilong Zhu
发明人： Tien-Jen Cheng , Stephan Grunow , Zhengwen Li , Huilong Zhu
IPC分类号： H01L21/306
CPC分类号： H01L21/02074 , C23G5/00
摘要： The invention is directed to a method for removing copper oxide from a copper surface to provide a clean copper surface, wherein the method involves exposing the copper surface containing copper oxide thereon to an anhydrous vapor containing a carboxylic acid compound therein, wherein the anhydrous vapor is generated from an anhydrous organic solution containing the carboxylic acid and one or more solvents selected from hydrocarbon and ether solvents.
摘要翻译：本发明涉及从铜表面去除氧化铜以提供清洁的铜表面的方法，其中所述方法包括将含有氧化铜的铜表面暴露于其中含有羧酸化合物的无水蒸气，其中无水蒸气为由含有羧酸的无水有机溶液和选自烃和醚溶剂的一种或多种溶剂产生。

13. 发明申请

US20110162875A1 SELECTIVE COPPER ENCAPSULATION LAYER DEPOSITION 有权
标题翻译：选择铜包层沉积
公开(公告)号：US20110162875A1
公开(公告)日：2011-07-07
申请号：US12683857
申请日：2010-01-07
申请人： Tien-Jen Cheng , Abhishek Dube , Zhengwen Li , Huilong Zhu
发明人： Tien-Jen Cheng , Abhishek Dube , Zhengwen Li , Huilong Zhu
IPC分类号： H05K1/09 , B05D5/12
CPC分类号： H01L21/76834 , H01L21/76826 , H01L21/76832 , H05K3/282 , H05K3/388 , H05K3/4682
摘要： A metal interconnect structure provides high adhesive strength between copper atoms in a copper-containing structure and a self-aligned copper encapsulation layer, which is selectively deposited only on exposed copper surfaces. A lower level metal interconnect structure comprises a first dielectric material layer and a copper-containing structure embedded in a lower metallic liner. After a planarization process that forms the copper-containing structure, a material that forms Cu—S bonds with exposed surfaces of the copper-containing structure is applied to the surface of the copper-containing structure. The material is selectively deposited only on exposed Cu surfaces, thereby forming a self-aligned copper encapsulation layer, and provides a high adhesion strength to the copper surface underneath. A dielectric cap layer and an upper level metal interconnect structure can be subsequently formed on the copper encapsulation layer.
摘要翻译：金属互连结构在含铜结构中的铜原子和自对准铜封装层之间提供高粘合强度，其仅选择性地沉积在暴露的铜表面上。下层金属互连结构包括第一介电材料层和嵌入在下金属衬里中的含铜结构。在形成含铜结构的平坦化工艺之后，将含铜结构体的露出表面形成Cu-S键的材料施加到含铜结构体的表面。该材料仅选择性地沉积在暴露的Cu表面上，从而形成自对准的铜封装层，并且对下面的铜表面提供高粘附强度。随后可以在铜封装层上形成电介质盖层和上层金属互连结构。

14. 发明授权

US08415252B2 Selective copper encapsulation layer deposition 有权
标题翻译：选择性铜包层沉积
公开(公告)号：US08415252B2
公开(公告)日：2013-04-09
申请号：US12683857
申请日：2010-01-07
申请人： Tien-Jen Cheng , Abhishek Dube , Zhengwen Li , Huilong Zhu
发明人： Tien-Jen Cheng , Abhishek Dube , Zhengwen Li , Huilong Zhu
IPC分类号： H01L21/44
CPC分类号： H01L21/76834 , H01L21/76826 , H01L21/76832 , H05K3/282 , H05K3/388 , H05K3/4682
摘要： A metal interconnect structure provides high adhesive strength between copper atoms in a copper-containing structure and a self-aligned copper encapsulation layer, which is selectively deposited only on exposed copper surfaces. A lower level metal interconnect structure comprises a first dielectric material layer and a copper-containing structure embedded in a lower metallic liner. After a planarization process that forms the copper-containing structure, a material that forms Cu—S bonds with exposed surfaces of the copper-containing structure is applied to the surface of the copper-containing structure. The material is selectively deposited only on exposed Cu surfaces, thereby forming a self-aligned copper encapsulation layer, and provides a high adhesion strength to the copper surface underneath. A dielectric cap layer and an upper level metal interconnect structure can be subsequently formed on the copper encapsulation layer.
摘要翻译：金属互连结构在含铜结构中的铜原子和自对准铜封装层之间提供高粘合强度，其仅选择性地沉积在暴露的铜表面上。下层金属互连结构包括第一介电材料层和嵌入在下金属衬里中的含铜结构。在形成含铜结构的平坦化工艺之后，将含铜结构体的露出表面形成Cu-S键的材料施加到含铜结构体的表面。该材料仅选择性地沉积在暴露的Cu表面上，从而形成自对准的铜封装层，并且对下面的铜表面提供高粘附强度。随后可以在铜封装层上形成电介质盖层和上层金属互连结构。

15. 发明申请

US20110174369A1 Efficiency in Antireflective Coating Layers for Solar Cells 有权
标题翻译：太阳能电池抗反射涂层的效率
公开(公告)号：US20110174369A1
公开(公告)日：2011-07-21
申请号：US12689464
申请日：2010-01-19
申请人： Harold J. Hovel , Rainer K. Krause , Zhengwen Li , Huilong Zhu
发明人： Harold J. Hovel , Rainer K. Krause , Zhengwen Li , Huilong Zhu
IPC分类号： H01L31/04 , B05D5/12
CPC分类号： G02B1/113 , H01L31/02168 , H01L31/022425 , H01L31/068 , H01L31/1868 , Y02E10/547 , Y02P70/521
摘要： A method for fabricating a cell structure includes doping a substrate to form a N-region and a P-region, disposing a first anti-reflective layer on the substrate, disposing a metallic contact paste on the first anti-reflective layer, drying the metallic contact paste to form contacts, disposing a second anti-reflective layer on the first anti-reflective layer and the metallic contacts, and heating the cell structure, wherein heating the cell structure results in metallic contact material penetrating the first anti-reflective layer and contacting the substrate.
摘要翻译：一种电池结构的制造方法，其特征在于，在衬底上掺杂形成N区和P区，在所述衬底上设置第一抗反射层，在所述第一抗反射层上设置金属接触膏，干燥所述金属接触膏以形成接触，在第一抗反射层和金属触点上设置第二抗反射层，并加热电池结构，其中加热电池结构导致金属接触材料穿透第一抗反射层并接触底物。

16. 发明授权

US07768006B2 Field effect structure and method including spacer shaped metal gate with asymmetric source and drain regions 有权
标题翻译：场效应结构和方法包括具有不对称源极和漏极区域的间隔金属栅极
公开(公告)号：US07768006B2
公开(公告)日：2010-08-03
申请号：US12129033
申请日：2008-05-29
申请人： Huilong Zhu , Zhengwen Li
发明人： Huilong Zhu , Zhengwen Li
IPC分类号： H01L31/00
CPC分类号： H01L29/66545 , H01L21/26586 , H01L21/2815 , H01L29/66659 , H01L29/7835
摘要： A semiconductor structure and a method for fabricating the semiconductor structure provide a field effect device, such as a field effect transistor, that includes a spacer shaped metal gate located over a channel within a semiconductor substrate that separates a plurality of source and drain regions within the semiconductor substrate. Within the semiconductor structure, the plurality of source and drain regions is asymmetric with respect to the spacer shaped metal gate. The particular semiconductor structure may be fabricated using a self aligned dummy gate method that uses a portion of a spacer as a self alignment feature when forming the spacer shaped metal gate, which may have a sub-lithographic linewidth.
摘要翻译：半导体结构和半导体结构的制造方法提供场效应晶体管等场效应晶体管，该场效应晶体管包括位于半导体衬底内的通道之间的间隔金属栅极，该隔离物形金属栅极将多个源极和漏极区域分隔开，半导体衬底。在半导体结构内，多个源极和漏极区域相对于间隔物金属栅极是不对称的。可以使用自对准的虚拟栅极方法来制造特定的半导体结构，该方法在形成可具有亚光刻线宽的间隔物金属栅极时，使用间隔物的一部分作为自对准特征。

17. 发明授权

US09017486B2 Deposition chamber cleaning method including stressed cleaning layer 有权
公开(公告)号：US09017486B2
公开(公告)日：2015-04-28
申请号：US12878128
申请日：2010-09-09
申请人： Tien-Jen Cheng , Zhengwen Li , Keith Kwong Hon Wong
发明人： Tien-Jen Cheng , Zhengwen Li , Keith Kwong Hon Wong
IPC分类号： B08B7/00 , B08B7/04 , C23C16/44 , C23C14/34
CPC分类号： B08B7/04 , B08B7/0014 , C23C14/34 , C23C16/4404
摘要： A method for cleaning a deposition chamber includes forming a deposited layer over an interior surface of the deposition chamber, wherein the deposited layer has a deposited layer stress and a deposited layer modulus; forming a cleaning layer over the deposited layer, wherein a material comprising the cleaning layer is selected such that the cleaning layer adheres to the deposited layer, and has a cleaning layer stress and a cleaning layer modulus, wherein the cleaning layer stress is higher than the deposited layer stress, and wherein the cleaning layer modulus is higher than the deposited layer modulus; and removing the deposited layer and the cleaning layer from the interior of the deposition chamber.

18. 发明授权

US08916435B2 Self-aligned bottom plate for metal high-K dielectric metal insulator metal (MIM) embedded dynamic random access memory 有权
标题翻译：用于金属高K绝缘子金属（MIM）嵌入式动态随机存取存储器的自对准底板
公开(公告)号：US08916435B2
公开(公告)日：2014-12-23
申请号：US13228767
申请日：2011-09-09
申请人： Zhengwen Li , Damon B. Farmer , Michael P. Chudzik , Keith Kwong Hon Wong , Jian Yu , Zhen Zhang , Chengwen Pei
发明人： Zhengwen Li , Damon B. Farmer , Michael P. Chudzik , Keith Kwong Hon Wong , Jian Yu , Zhen Zhang , Chengwen Pei
IPC分类号： H01L21/8242 , H01L27/12 , H01L27/108 , H01L49/02 , H01L21/84 , H01L29/94
CPC分类号： H01L27/10829 , H01L21/84 , H01L27/10861 , H01L27/1203 , H01L28/91 , H01L29/945
摘要： A memory device, and a method of forming a memory device, is provided that includes a capacitor with a lower electrode of a metal semiconductor alloy. In one embodiment, the memory device includes a trench present in a semiconductor substrate including a semiconductor on insulating (SOI) layer on top of a buried dielectric layer, wherein the buried dielectric layer is on top of a base semiconductor layer. A capacitor is present in the trench, wherein the capacitor includes a lower electrode of a metal semiconductor alloy having an upper edge that is self-aligned to the upper surface of the base semiconductor layer, a high-k dielectric node layer, and an upper electrode of a metal. The memory device further includes a pass transistor in electrical communication with the capacitor.
摘要翻译：提供一种存储器件和形成存储器件的方法，其包括具有金属半导体合金的下电极的电容器。在一个实施例中，存储器件包括存在于半导体衬底中的沟槽，其包括在掩埋介电层顶部上的绝缘（SOI）半导体层，其中所述掩埋介电层位于基底半导体层的顶部。电容器存在于沟槽中，其中电容器包括金属半导体合金的下电极，其具有与基底半导体层的上表面自对准的上边缘，高k电介质节点层和上层金属电极。存储器件还包括与电容器电连通的传输晶体管。

19. 发明授权

US08896088B2 Reliable electrical fuse with localized programming 有权
标题翻译：可靠的电熔丝与本地编程
公开(公告)号：US08896088B2
公开(公告)日：2014-11-25
申请号：US13095164
申请日：2011-04-27
申请人： Yan Zun Li , Zhengwen Li , Chengwen Pei , Jian Yu
发明人： Yan Zun Li , Zhengwen Li , Chengwen Pei , Jian Yu
IPC分类号： H01L23/52 , H01L21/82 , H01L21/84 , H01L23/525 , H01L27/12 , G11C17/16
CPC分类号： H01L23/62 , G11C17/16 , H01L21/02532 , H01L21/28518 , H01L21/76886 , H01L21/823814 , H01L21/84 , H01L23/5256 , H01L27/1203 , H01L2924/0002 , H01L2924/00
摘要： An electrical fuse has an anode contact on a surface of a semiconductor substrate. The electrical fuse has a cathode contact on the surface of the semiconductor substrate spaced from the anode contact. The electrical fuse has a link within the substrate electrically interconnecting the anode contact and the cathode contact. The link comprises a semiconductor layer and a silicide layer. The silicide layer extends beyond the anode contact. An opposite end of the silicide layer extends beyond the cathode contact. A silicon germanium region is embedded in the semiconductor layer under the silicide layer, between the anode contact and the cathode contact.
摘要翻译：电熔丝在半导体衬底的表面上具有阳极接触。电熔丝在半导体衬底的与阳极接触件间隔开的表面上具有阴极接触。电熔丝在衬底内具有连接阳极接触件和阴极接触件的连接。该连接件包括半导体层和硅化物层。硅化物层延伸超过阳极接触。硅化物层的另一端延伸超过阴极接触。在硅化物层之下的阳极接触和阴极接触之间的半导体层中嵌入硅锗区。

20. 发明授权

US08802482B2 Method to fabricate multicrystal solar cell with light trapping surface using nanopore copolymer 有权
标题翻译：使用纳米孔共聚物制造具有光俘获表面的多晶太阳能电池的方法
公开(公告)号：US08802482B2
公开(公告)日：2014-08-12
申请号：US13289324
申请日：2011-11-04
申请人： Dechao Guo , Zhengwen Li , Kejia Wang , Zhen Zhang
发明人： Dechao Guo , Zhengwen Li , Kejia Wang , Zhen Zhang
IPC分类号： H01L21/00
CPC分类号： H01L31/02363 , Y02E10/50
摘要： Multi-crystalline silicon processing techniques are provided. In one aspect, a method for roughening a multi-crystalline silicon surface is provided. The method includes the following steps. The multi-crystalline silicon surface is coated with a diblock copolymer. The diblock copolymer is annealed to form nanopores therein. The multi-crystalline silicon surface is etched through the nanopores in the diblock copolymer to roughen the multi-crystalline silicon surface. The diblock copolymer is removed. A multi-crystalline silicon substrate with a roughened surface having a plurality of peaks and troughs is also provided, wherein a distance from one peak to an adjacent peak on the roughened surface is from about 20 nm to about 400 nm.
摘要翻译：提供多晶硅加工技术。一方面，提供了一种使多晶硅表面粗糙化的方法。该方法包括以下步骤。多晶硅表面涂有二嵌段共聚物。将二嵌段共聚物退火以在其中形成纳米孔。通过二嵌段共聚物中的纳米孔蚀刻多晶硅表面以粗糙化多晶硅表面。除去二嵌段共聚物。还提供了具有多个峰和谷的具有粗糙表面的多晶硅衬底，其中粗糙表面上的一个峰到相邻峰的距离为约20nm至约400nm。

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