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11. 发明授权

US07923732B2 Thin film transistor and method for manufacturing a display panel 有权
标题翻译：薄膜晶体管及制造显示面板的方法
公开(公告)号：US07923732B2
公开(公告)日：2011-04-12
申请号：US12331361
申请日：2008-12-09
申请人： Yu-Gwang Jeong , Young-Wook Lee , Sang-Gab Kim , Woo-Geun Lee , Min-Seok Oh , Jang-Soo Kim , Kap-Soo Yoon , Shin-Il Choi , Hong-Kee Chin , Seung-Ha Choi , Seung-Hwan Shim , Sung-Hoon Yang , Ki-Hun Jeong
发明人： Yu-Gwang Jeong , Young-Wook Lee , Sang-Gab Kim , Woo-Geun Lee , Min-Seok Oh , Jang-Soo Kim , Kap-Soo Yoon , Shin-Il Choi , Hong-Kee Chin , Seung-Ha Choi , Seung-Hwan Shim , Sung-Hoon Yang , Ki-Hun Jeong
IPC分类号： H01L29/00
CPC分类号： H01L27/127 , H01L27/1214 , H01L27/1259 , H01L27/1288 , H01L29/66765
摘要： Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.
摘要翻译：本发明的实施例涉及薄膜晶体管和显示面板的制造方法，包括在基板上形成包括栅电极的栅极线，在栅电极上形成栅绝缘层，在栅电极上形成本征半导体栅极绝缘层，在本征半导体上形成非本征半导体，在外部半导体上形成包括源电极和漏电极的数据线，以及对源电极和漏极之间的非本征半导体的一部分进行等离子体处理，以形成保护构件和保护构件的相应侧上的欧姆接触。因此，可以省略用于蚀刻外部半导体和形成用于保护本征半导体的无机绝缘层的工艺，从而可以简化显示面板的制造工艺，可以降低制造成本，并且可以提高生产率。

12. 发明申请

US20080081534A1 METHOD FOR FORMING METAL LINE AND METHOD FOR MANUFACTURING DISPLAY SUBSTRATE BY USING THE SAME 有权
标题翻译：用于形成金属线的方法和使用该方法制造显示衬底的方法
公开(公告)号：US20080081534A1
公开(公告)日：2008-04-03
申请号：US11862837
申请日：2007-09-27
申请人： Min-Seok Oh , Sang-Gab Kim , Shin-Il Choi , Hong-Kee Chin , Yu-Gwang Jeong , Seung-Ha Choi
发明人： Min-Seok Oh , Sang-Gab Kim , Shin-Il Choi , Hong-Kee Chin , Yu-Gwang Jeong , Seung-Ha Choi
IPC分类号： H01J9/12
CPC分类号： H01L21/32136 , G02F1/13439 , G02F2001/136295 , H01L21/02071 , H01L23/53223 , H01L27/124 , H01L29/458 , H01L29/4908 , H01L2924/0002 , H01L2924/00
摘要： In a method for forming a metal line, a first metal layer and a second metal layer are deposited on a substrate. The first metal layer includes aluminum, and the second metal layer includes molybdenum. A photoresist pattern having a line-shape is formed on the second metal layer. The second metal layer is etched with a chlorine-containing etching gas using the photoresist pattern as a mask. The first metal layer is then etched with a mixture of a chlorine-containing gas and nitrogen gas and/or a mixture of a chlorine-containing gas and argon gas as an etching gas. Impurities such as chlorine ions are removed from the base substrate after etching the first metal layer with a fluorine-containing gas, hydrogen gas, or water vapor. A method for manufacturing a display substrate is disclosed using the method for forming a metal line to form source, drain, and gate electrodes and gate lines.
摘要翻译：在金属线的形成方法中，在基板上沉积第一金属层和第二金属层。第一金属层包括铝，第二金属层包括钼。在第二金属层上形成具有线状的光致抗蚀剂图案。使用光致抗蚀剂图案作为掩模，用含氯蚀刻气体蚀刻第二金属层。然后用含氯气体和氮气和/或含氯气体和氩气的混合物的混合物蚀刻第一金属层作为蚀刻气体。在用含氟气体，氢气或水蒸气蚀刻第一金属层之后，从基底衬底去除诸如氯离子的杂质。公开了一种用于形成金属线以形成源极，漏极和栅电极和栅极线的方法，用于制造显示基板的方法。

13. 发明授权

US07833850B2 Method of fabricating a thin film transistor 有权
标题翻译：制造薄膜晶体管的方法
公开(公告)号：US07833850B2
公开(公告)日：2010-11-16
申请号：US12243592
申请日：2008-10-01
申请人： Shin-IL Choi , Sang-Gab Kim , Hong-Kee Chin , Min-Seok Oh , Yu-Gwang Jeong , Seung-Ha Choi
发明人： Shin-IL Choi , Sang-Gab Kim , Hong-Kee Chin , Min-Seok Oh , Yu-Gwang Jeong , Seung-Ha Choi
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： H01L27/124 , H01L29/458 , H01L29/66765
摘要： A method of fabricating a thin film transistor includes forming a gate electrode on a substrate, forming a semiconductor layer on the gate electrode, forming a source electrode on the semiconductor layer, forming a drain electrode on the semiconductor layer spaced apart from the source electrode, forming a copper layer pattern on the source electrode and the drain electrode, exposing the copper layer pattern on the source electrode and the drain electrode to a fluorine-containing process gas to form a copper fluoride layer pattern thereon, and patterning the semiconductor layer.
摘要翻译：一种薄膜晶体管的制造方法，包括在基板上形成栅电极，在栅电极上形成半导体层，在半导体层上形成源电极，在与源电极间隔开的半导体层上形成漏电极，在源电极和漏电极上形成铜层图案，将源电极和漏电极上的铜层图案暴露于含氟处理气体，以在其上形成氟化铜层图案，并对该半导体层进行构图。

14. 发明授权

US07833075B2 Method for forming metal line and method for manufacturing display substrate by using the same 有权
标题翻译：金属线形成方法及其制造方法
公开(公告)号：US07833075B2
公开(公告)日：2010-11-16
申请号：US11862837
申请日：2007-09-27
申请人： Min-Seok Oh , Sang-Gab Kim , Shin-Il Choi , Hong-Kee Chin , Yu-Gwang Jeong , Seung-Ha Choi
发明人： Min-Seok Oh , Sang-Gab Kim , Shin-Il Choi , Hong-Kee Chin , Yu-Gwang Jeong , Seung-Ha Choi
IPC分类号： H01J1/62 , H01J63/04 , H01J9/24
CPC分类号： H01L21/32136 , G02F1/13439 , G02F2001/136295 , H01L21/02071 , H01L23/53223 , H01L27/124 , H01L29/458 , H01L29/4908 , H01L2924/0002 , H01L2924/00
摘要： In a method for forming a metal line, a first metal layer and a second metal layer are deposited on a substrate. The first metal layer includes aluminum, and the second metal layer includes molybdenum. A photoresist pattern having a line-shape is formed on the second metal layer. The second metal layer is etched with a chlorine-containing etching gas using the photoresist pattern as a mask. The first metal layer is then etched with a mixture of a chlorine-containing gas and nitrogen gas and/or a mixture of a chlorine-containing gas and argon gas as an etching gas. Impurities such as chlorine ions are removed from the base substrate after etching the first metal layer with a fluorine-containing gas, hydrogen gas, or water vapor. A method for manufacturing a display substrate is disclosed using the method for forming a metal line to form source, drain, and gate electrodes and gate lines.
摘要翻译：在金属线的形成方法中，在基板上沉积第一金属层和第二金属层。第一金属层包括铝，第二金属层包括钼。在第二金属层上形成具有线状的光致抗蚀剂图案。使用光致抗蚀剂图案作为掩模，用含氯蚀刻气体蚀刻第二金属层。然后用含氯气体和氮气和/或含氯气体和氩气的混合物的混合物蚀刻第一金属层作为蚀刻气体。在用含氟气体，氢气或水蒸气蚀刻第一金属层之后，从基底衬底去除诸如氯离子的杂质。公开了一种用于形成金属线以形成源极，漏极和栅电极和栅极线的方法，用于制造显示基板的方法。

15. 发明申请

US20100163862A1 THIN FILM TRANSISTOR ARRAY SUBSTRATE AND METHOD OF FABRICATING THE SAME 有权
标题翻译：薄膜晶体管阵列基板及其制造方法
公开(公告)号：US20100163862A1
公开(公告)日：2010-07-01
申请号：US12484116
申请日：2009-06-12
申请人： Dong-Ju YANG , Yu-Gwang Jeong , Ki-Yeup Lee , Sang-Gab Kim , Yun-Jong Yeo , Shin-Il Choi , Hong-Kee Chin , Seung-Ha Choi , Jung-Suk Bang
发明人： Dong-Ju YANG , Yu-Gwang Jeong , Ki-Yeup Lee , Sang-Gab Kim , Yun-Jong Yeo , Shin-Il Choi , Hong-Kee Chin , Seung-Ha Choi , Jung-Suk Bang
IPC分类号： H01L29/786 , H01L29/24 , H01L21/336
CPC分类号： H01L27/1248 , H01L27/1214 , H01L27/1225 , H01L27/1288 , H01L29/7869
摘要： A method of fabricating a thin film transistor array substrate is presented. The method entails forming a gate interconnection line on an insulating substrate, forming a gate insulating layer on the gate interconnection line, forming a semiconductor layer and a data interconnection line on the semiconductor layer, sequentially forming multiple passivation layers, etching the passivation layers down to a drain electrode that is an extension of the data interconnection line. The portion of the drain electrode that is exposed at this stage is a part of the drain electrode-pixel electrode contact portion. A pixel electrode is formed connected to the drain electrode. Two of the passivation layers have the same composition but are processed at different temperatures. A thin film transistor prepared in the above manner is also presented.
摘要翻译：提出了制造薄膜晶体管阵列基板的方法。该方法需要在绝缘基板上形成栅极互连线，在栅极互连线上形成栅极绝缘层，在半导体层上形成半导体层和数据互连线，依次形成多个钝化层，将钝化层蚀刻到作为数据互连线的延伸线的漏电极。在该阶段暴露的漏电极的部分是漏极电极 - 像素电极接触部分的一部分。形成连接到漏电极的像素电极。两个钝化层具有相同的组成，但是在不同的温度下进行处理。还提出了以上述方式制备的薄膜晶体管。

16. 发明授权

US08017459B2 Method of fabricating a thin film transistor array substrate 有权
标题翻译：制造薄膜晶体管阵列基板的方法
公开(公告)号：US08017459B2
公开(公告)日：2011-09-13
申请号：US12484116
申请日：2009-06-12
申请人： Dong-Ju Yang , Yu-Gwang Jeong , Ki-Yeup Lee , Sang-Gab Kim , Yun-Jong Yeo , Shin-Il Choi , Hong-Kee Chin , Seung-Ha Choi , Jung-Suk Bang
发明人： Dong-Ju Yang , Yu-Gwang Jeong , Ki-Yeup Lee , Sang-Gab Kim , Yun-Jong Yeo , Shin-Il Choi , Hong-Kee Chin , Seung-Ha Choi , Jung-Suk Bang
IPC分类号： H01L21/00
CPC分类号： H01L27/1248 , H01L27/1214 , H01L27/1225 , H01L27/1288 , H01L29/7869
摘要： A method of fabricating a thin film transistor array substrate is presented. The method entails forming a gate interconnection line on an insulating substrate, forming a gate insulating layer on the gate interconnection line, forming a semiconductor layer and a data interconnection line on the semiconductor layer, sequentially forming multiple passivation layers, etching the passivation layers down to a drain electrode that is an extension of the data interconnection line. The portion of the drain electrode that is exposed at this stage is a part of the drain electrode-pixel electrode contact portion. A pixel electrode is formed connected to the drain electrode. Two of the passivation layers have the same composition but are processed at different temperatures. A thin film transistor prepared in the above manner is also presented.
摘要翻译：提出了制造薄膜晶体管阵列基板的方法。该方法需要在绝缘基板上形成栅极互连线，在栅极互连线上形成栅极绝缘层，在半导体层上形成半导体层和数据互连线，依次形成多个钝化层，将钝化层蚀刻到作为数据互连线的延伸线的漏电极。在该阶段暴露的漏电极的部分是漏极电极 - 像素电极接触部分的一部分。形成连接到漏电极的像素电极。两个钝化层具有相同的组成，但是在不同的温度下进行处理。还提出了以上述方式制备的薄膜晶体管。

17. 发明授权

US08586990B2 Method of fabricating a thin film transistor array substrate 有权
标题翻译：制造薄膜晶体管阵列基板的方法
公开(公告)号：US08586990B2
公开(公告)日：2013-11-19
申请号：US13210282
申请日：2011-08-15
申请人： Dong-Ju Yang , Yu Gwang Jeong , Ki-Yeup Lee , Sang-Gab Kim , Yun-Jong Yeo , Shin-Il Choi , Hong-Kee Chin , Seung-Ha Choi , Jung-Suk Bang
发明人： Dong-Ju Yang , Yu Gwang Jeong , Ki-Yeup Lee , Sang-Gab Kim , Yun-Jong Yeo , Shin-Il Choi , Hong-Kee Chin , Seung-Ha Choi , Jung-Suk Bang
IPC分类号： H01L27/14
CPC分类号： H01L27/1248 , H01L27/1214 , H01L27/1225 , H01L27/1288 , H01L29/7869
摘要： A method of fabricating a thin film transistor array substrate is presented. The method entails forming a gate interconnection line on an insulating substrate, forming a gate insulating layer on the gate interconnection line, forming a semiconductor layer and a data interconnection line on the semiconductor layer, sequentially forming multiple passivation layers, etching the passivation layers down to a drain electrode that is an extension of the data interconnection line. The portion of the drain electrode that is exposed at this stage is a part of the drain electrode-pixel electrode contact portion. A pixel electrode is formed connected to the drain electrode. Two of the passivation layers have the same composition but are processed at different temperatures. A thin film transistor prepared in the above manner is also presented.
摘要翻译：提出了制造薄膜晶体管阵列基板的方法。该方法需要在绝缘基板上形成栅极互连线，在栅极互连线上形成栅极绝缘层，在半导体层上形成半导体层和数据互连线，依次形成多个钝化层，将钝化层蚀刻到作为数据互连线的延伸线的漏电极。在该阶段暴露的漏电极的部分是漏极电极 - 像素电极接触部分的一部分。形成连接到漏电极的像素电极。两个钝化层具有相同的组成，但是在不同的温度下进行处理。还提出了以上述方式制备的薄膜晶体管。

18. 发明授权

US08643012B2 Display substrate and method for manufacturing the same 有权
标题翻译：显示基板及其制造方法
公开(公告)号：US08643012B2
公开(公告)日：2014-02-04
申请号：US12952744
申请日：2010-11-23
申请人： Min-Seok Oh , Bong-Kyu Shin , Sang-Gab Kim , Eun-Guk Lee , Hong-Kee Chin , Yu-Gwang Jeong , Seung-Ha Choi
发明人： Min-Seok Oh , Bong-Kyu Shin , Sang-Gab Kim , Eun-Guk Lee , Hong-Kee Chin , Yu-Gwang Jeong , Seung-Ha Choi
IPC分类号： H01L29/04
CPC分类号： G02F1/136227 , G02F1/13439 , G02F2201/50
摘要： A method of forming a display substrate includes forming an array layer on a substrate, forming a passivation layer on the array layer, forming a photoresist pattern on the passivation layer corresponding to a gate line, a source line and a thin-film transistor of the array layer, etching the passivation layer using the photoresist pattern as a mask, Non-uniformly surface treating a surface of the photoresist pattern, forming a transparent electrode layer on the substrate having the surface-treated photoresist pattern formed thereon and forming a pixel electrode. The forming a pixel electrode includes removing the photoresist pattern and the transparent electrode layer, such as by infiltrating a strip solution into the surface-treated photoresist pattern.
摘要翻译：形成显示基板的方法包括在基板上形成阵列层，在阵列层上形成钝化层，在对应于栅极线，源极线和薄膜晶体管的钝化层上形成光致抗蚀剂图案使用光致抗蚀剂图案作为掩模蚀刻钝化层，对光致抗蚀剂图案的表面进行不均匀的表面处理，在其上形成有表面处理的光致抗蚀剂图案的基板上形成透明电极层并形成像素电极。形成像素电极包括通过将带状溶液浸入表面处理的光致抗蚀剂图案中去除光致抗蚀剂图案和透明电极层。

19. 发明授权

US07758760B2 Thin film transistor array panel and method of manufacturing the same 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US07758760B2
公开(公告)日：2010-07-20
申请号：US11544987
申请日：2006-10-06
申请人： Seung-Ha Choi , Min-Seok Oh , Hong-Kee Chin , Sang-Gab Kim , Yu-Gwang Jeong
发明人： Seung-Ha Choi , Min-Seok Oh , Hong-Kee Chin , Sang-Gab Kim , Yu-Gwang Jeong
IPC分类号： B44C1/22
CPC分类号： H01L27/124 , H01L27/1288 , H01L29/458 , H01L29/4908
摘要： A thin film transistor (TFT) array panel and method of manufacturing the same are provided. The method includes forming a semiconductor layer and an ohmic contact layer over a gate line, forming a conductive layer on the ohmic contact layer, forming a first photosensitive layer pattern on the conductive layer, etching the conductive layer using the first photosensitive layer pattern as an etching mask, etching the ohmic contact layer and the semiconductor layer by a fluorine-containing gas, a chloride-containing gas, and an oxygen (O2) gas using the first photosensitive layer pattern as an etching mask, removing the first photosensitive layer pattern to a predetermined thickness to form a second photosensitive layer pattern, and etching the conductive layer using the second photosensitive layer pattern as an etching mask to expose a part of the ohmic contact layer.
摘要翻译：提供薄膜晶体管（TFT）阵列面板及其制造方法。该方法包括在栅极线上形成半导体层和欧姆接触层，在欧姆接触层上形成导电层，在导电层上形成第一感光层图案，使用第一感光层图案蚀刻导电层，作为蚀刻掩模，使用第一感光层图案作为蚀刻掩模，通过含氟气体，含氯气体和氧（O 2）气蚀刻欧姆接触层和半导体层，将第一感光层图案去除预定厚度以形成第二感光层图案，并且使用第二感光层图案蚀刻导电层作为蚀刻掩模以暴露欧姆接触层的一部分。

20. 发明授权

US07638375B2 Method of manufacturing thin film transistor substrate 失效
标题翻译：制造薄膜晶体管基板的方法
公开(公告)号：US07638375B2
公开(公告)日：2009-12-29
申请号：US12009253
申请日：2008-01-16
申请人： Hong-Kee Chin , Yu-Gwang Jeong , Sang-Gab Kim , Joo-Han Kim , Joo-Ae Youn , Min-Seok Oh , Jong-Hyun Choung , Seung-Ha Choi
发明人： Hong-Kee Chin , Yu-Gwang Jeong , Sang-Gab Kim , Joo-Han Kim , Joo-Ae Youn , Min-Seok Oh , Jong-Hyun Choung , Seung-Ha Choi
IPC分类号： H01L21/84
CPC分类号： H01L27/1288 , H01L27/1214
摘要： A method of manufacturing a TFT substrate includes: sequentially forming a transparent conductive layer and an opaque conductive layer on a substrate, patterning the transparent conductive layer and the opaque conductive layer by using a first mask to form a gate pattern including a pixel electrode, and forming a gate insulating layer and a semiconductor layer above the substrate. A contact hole is formed which exposes a portion of the pixel electrode and a semiconductor pattern using a second mask. A conductive layer is formed above the substrate and patterned to form a source/drain pattern including a drain electrode which overlaps a portion of the pixel electrode. Portions of the gate insulating layer and the opaque conductive layer above the pixel electrode are removed except a portion overlapping the drain electrode, by using a third mask.
摘要翻译：一种制造TFT基板的方法包括：在基板上依次形成透明导电层和不透明导电层，通过使用第一掩模对透明导电层和不透明导电层进行构图，形成包括像素电极的栅极图案，以及在基板上形成栅极绝缘层和半导体层。使用第二掩模形成露出一部分像素电极和半导体图案的接触孔。在衬底上形成导电层，并被图案化以形成包括与像素电极的一部分重叠的漏电极的源极/漏极图案。除了与漏电极重叠的部分之外，通过使用第三掩模除去栅极绝缘层和像素电极上方的不透明导电层的部分。

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