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11. 发明申请

US20070036256A1 Apparatus for and method of measuring clock skew 失效
标题翻译：仪器和测量时钟偏移的方法
公开(公告)号：US20070036256A1
公开(公告)日：2007-02-15
申请号：US11585526
申请日：2006-10-23
申请人： Takahiro Yamaguchi , Masahiro Ishida , Mani Soma
发明人： Takahiro Yamaguchi , Masahiro Ishida , Mani Soma
IPC分类号： H04L7/00
CPC分类号： G01R31/31709 , G01R31/31725 , G01R31/31922 , G01R31/31937 , H04L1/205
摘要： Timing jitter sequences Δφj[n] and Δφk[n] of respective clock signals under measurement xj(t) and xk(t) are estimated, and a timing difference sequence between those timing jitter sequences is calculated. In addition, initial phase angles φ0j and φ0k of linear instantaneous phases of the xj(t) and xk(t) are estimated, respectively. A sum of a difference between those initial angles and the timing difference sequence is calculated to obtain a clock skew sequence between the xj(t) and xk(t).
摘要翻译：（t）和x k（t），并且计算那些定时抖动序列之间的定时差异序列。另外，x 0 和＆lt; 0＆lt; 0＆gt; （t）和x（k）分别被估计。计算出这些初始角度和定时差分序列之间的差值的和，以获得x j（t）和x k（t）之间的时钟偏移序列。

12. 发明申请

US20060268970A1 Apparatus for measuring jitter and method of measuring jitter 有权
公开(公告)号：US20060268970A1
公开(公告)日：2006-11-30
申请号：US11137786
申请日：2005-05-25
申请人： Kiyotaka Ichiyama , Masahiro Ishida , Takahiro Yamaguchi , Mani Soma
发明人： Kiyotaka Ichiyama , Masahiro Ishida , Takahiro Yamaguchi , Mani Soma
IPC分类号： H04B3/46
CPC分类号： G01R31/31709
摘要： There is provided a jitter measuring apparatus for measuring jitter in a signal-under-measurement, including a pulse generating section having first pulse generating means for detecting edges of the data-signal-under-measurement to output a first pulse signal having a pulse width set in advance corresponding to the edge and second pulse generating means for detecting boundaries of data sections where data values do not change in the data-signal-under-measurement to output a second pulse signal having a pulse width set in advance over the edge timings of the boundaries of the detected data sections and a jitter calculating section for calculating timing jitter in the data-signal-under-measurement based on the first and second pulse signals.

13. 发明申请

US20060018418A1 Jitter measuring apparatus, jitter measuring method and PLL circuit 失效
公开(公告)号：US20060018418A1
公开(公告)日：2006-01-26
申请号：US10896751
申请日：2004-07-22
申请人： Kiyotaka Ichiyama , Masahiro Ishida , Takahiro Yamaguchi , Mani Soma
发明人： Kiyotaka Ichiyama , Masahiro Ishida , Takahiro Yamaguchi , Mani Soma
IPC分类号： H03D3/24
CPC分类号： G01R31/31709 , G01R29/26 , G01R31/3016 , G01R31/31725 , G01R31/3191 , G01R31/31937
摘要： A jitter measurement apparatus for measuring an intrinsic jitter of a circuit to be tested including a phase detector which outputs a signal according to a phase difference between a supplied first input signal and a supplied second input signal, includes: an input unit for supplying an identical signal to the phase detector as the first input signal and as the second input signal; and a jitter measurement unit for measuring the intrinsic jitter of the circuit to be tested by measuring a jitter of a signal which is generated in an inside of the circuit to be tested according to an signal output from the phase detector.

14. 发明授权

US06594595B2 Apparatus for and method of measuring cross-correlation coefficient between signals 有权
公开(公告)号：US06594595B2
公开(公告)日：2003-07-15
申请号：US09826295
申请日：2001-04-03
申请人： Takahiro Yamaguchi , Masahiro Ishida , Mani Soma
发明人： Takahiro Yamaguchi , Masahiro Ishida , Mani Soma
IPC分类号： G01R1300
CPC分类号： G06F17/15
摘要： Timing jitter sequences &Dgr;&phgr;j[n] and &Dgr;&phgr;k[n] of respective clock signals under measurement xj(t) and xk(t) are obtained, and a covariance &sgr;tj,tk=(1/N)&Sgr;i=1N&Dgr;&phgr;j[i]·&Dgr;&phgr;k[i] is obtained. In addition, root-mean-square values &sgr;tj and &sgr;tk of the respective &Dgr;&phgr;j[n] and &Dgr;&phgr;k[n] are obtained, and a cross-correlation coefficient &rgr;=&sgr;tj,tk/(&sgr;tj·&sgr;tk) between the xj(t) and xk(t) is calculated.

15. 发明授权

US06460001B1 Apparatus for and method of measuring a peak jitter 失效
标题翻译：用于测量峰值抖动的装置和方法
公开(公告)号：US06460001B1
公开(公告)日：2002-10-01
申请号：US09538135
申请日：2000-03-29
申请人： Takahiro Yamaguchi , Masahiro Ishida , Mani Soma
发明人： Takahiro Yamaguchi , Masahiro Ishida , Mani Soma
IPC分类号： G06F1900
CPC分类号： G01R29/26 , H04L1/205
摘要： An input clock signal is transformed into a complex analytic signal zc(t) by an analytic signal transforming means 13 and an instantaneous phase of its real part xc(t) is estimated using the analytic signal zc(t). A linear phase is removed from the instantaneous phase to obtain a phase noise waveform &Dgr;&phgr;(t). A peak value &Dgr;&phgr;max of absolute values of the &Dgr;&phgr;(t) is obtained, and 4&Dgr;&phgr;max is defined as the worst value of period jitter of the input signal. The &Dgr;&phgr;(t) is sampled at a timing close to a zero-crossing point of the xc(t) to extract the sample value. A differential between adjacent samples is obtained in the sequential order to calculate a root-mean-square value of the differentials (period jitters). An exp(−(2&Dgr;&phgr;max)2/(2&sgr;j2)) is calculated from the mean-square value &sgr;j and 2&Dgr;&phgr;max, and the calculated value is defined as a probability that a period jitter exceeds 2&Dgr;&phgr;max.
摘要翻译：通过分析信号变换装置13将输入时钟信号变换为复数分析信号zc（t），并使用分析信号zc（t）估计其实部xc（t）的瞬时相位。从瞬时相位除去线性相位以获得相位噪声波形DELTAphi（t）。获得DELTAphi（t）绝对值的峰值DELTAphimax，将4DELTAphimax定义为输入信号周期抖动的最差值。在接近xc（t）的过零点的定时采样DELTA（t），以提取样本值。按顺序获得相邻样本之间的差分，以计算差分的均方根（周期抖动）。根据平均值sigmaj和2DELTAphimax计算出exp（ - （2DELTAphimax）2 /（2sigmaj2）），计算出的值被定义为周期抖动超过2DELTAphimax的概率。

16. 发明授权

US06400129B1 Apparatus for and method of detecting a delay fault in a phase-locked loop circuit 失效
标题翻译：检测锁相环电路延时故障的装置及方法
公开(公告)号：US06400129B1
公开(公告)日：2002-06-04
申请号：US09494321
申请日：2000-01-28
申请人： Takahiro Yamaguchi , Masahiro Ishida , Mani Soma
发明人： Takahiro Yamaguchi , Masahiro Ishida , Mani Soma
IPC分类号： G01R2500
CPC分类号： G01R31/3016 , G01R25/00 , G01R31/2839
摘要： There is provided a method and an apparatus for detecting a delay fault in a phase-locked loop circuit. A frequency impulse is applied to the PLL circuit under test as a reference clock, and a waveform of a signal outputted from the PLL circuit under test is transformed to an analytic signal to estimate its instantaneous phase. A linear phase is estimated from the estimated instantaneous phase, and the estimated linear phase is removed from the estimated instantaneous phase to obtain a fluctuation term of the instantaneous phase. A delay fault is detected by comparing a time duration during which the PLL circuit stays in a state of oscillating a certain frequency with the time duration during which a fault-free PLL circuit stays in a state of oscillating a certain frequency.
摘要翻译：提供了一种用于检测锁相环电路中的延迟故障的方法和装置。对被测定的PLL电路施加频率脉冲作为参考时钟，将从被测PLL PLL输出的信号的波形变换为分析信号，估计其瞬时相位。从估计的瞬时相位估计线性相位，并且从估计的瞬时相位去除估计的线性相位以获得瞬时相位的波动项。通过比较PLL电路停留在某个频率的振荡状态的持续时间与无故障PLL电路停留在某个频率的振荡状态的持续时间来检测延迟故障。

17. 发明授权

US07636387B2 Measuring apparatus and measuring method 有权
标题翻译：测量装置和测量方法
公开(公告)号：US07636387B2
公开(公告)日：2009-12-22
申请号：US10776926
申请日：2004-02-11
申请人： Takahiro Yamaguchi , Masahiro Ishida , Mani Soma , Hirobumi Musha
发明人： Takahiro Yamaguchi , Masahiro Ishida , Mani Soma , Hirobumi Musha
IPC分类号： H04B3/46
CPC分类号： G01R31/3171 , G01R29/26 , G01R31/31709 , G01R31/31725 , G01R31/31922 , G01R31/31937 , H04L1/205
摘要： A measuring apparatus including a timing jitter estimator which estimates an output timing jitter sequence which indicates the output timing jitter of an output signal based on an output signal output from a DUT in response to an input signal input to the DUT, and a jitter transfer function estimator which estimates a jitter transfer function in the DUT based on the output timing jitter sequence. The jitter transfer function estimator includes an instantaneous phase noise estimator which estimates an instant phase noise of the output signal based on an output signal, and a resampler which generates the output timing jitter sequence by resampling the instantaneous phase noise at predetermined timing.
摘要翻译：一种测量装置，包括定时抖动估计器，其响应于输入到DUT的输入信号，估计基于从DUT输出的输出信号来输出输出信号的输出定时抖动的输出定时抖动序列，以及抖动传递函数估计器，其基于输出定时抖动序列来估计DUT中的抖动传递函数。抖动传递函数估计器包括：基于输出信号估计输出信号的瞬时相位噪声的瞬时相位噪声估计器;以及通过在预定定时重采样瞬时相位噪声来产生输出定时抖动序列的重采样器。

18. 发明授权

US07596173B2 Test apparatus, clock generator and electronic device 有权
标题翻译：测试仪器，时钟发生器和电子设备
公开(公告)号：US07596173B2
公开(公告)日：2009-09-29
申请号：US11260665
申请日：2005-10-28
申请人： Masahiro Ishida , Takahiro Yamaguchi , Mani Soma
发明人： Masahiro Ishida , Takahiro Yamaguchi , Mani Soma
IPC分类号： H04B3/46
CPC分类号： H03K5/13 , G01R31/31709 , H03L7/0812 , H03L7/0891 , H03L7/0995 , H03L7/16
摘要： There is provided a clock generator for generating a single-phase clock into which jitter has been injected, having a multi-phase clock generating section for generating a plurality of clock signals having an almost equal phase difference from each other and a jitter injecting section for injecting jitter into the respective clock signals.
摘要翻译：提供了一种时钟发生器，用于产生已经注入了抖动的单相时钟，具有用于产生彼此具有几乎相等的相位差的多个时钟信号的多相时钟产生部分，以及用于将抖动注入相应的时钟信号。

19. 发明授权

US07317309B2 Wideband signal analyzing apparatus, wideband period jitter analyzing apparatus, and wideband skew analyzing apparatus 有权
标题翻译：宽带信号分析装置，宽带周期抖动分析装置以及宽带歪斜分析装置
公开(公告)号：US07317309B2
公开(公告)日：2008-01-08
申请号：US10862904
申请日：2004-06-07
申请人： Takahiro Yamaguchi , Masahiro Ishida , Mani Soma
发明人： Takahiro Yamaguchi , Masahiro Ishida , Mani Soma
IPC分类号： G01R23/00 , G01R13/00 , G10L21/00
CPC分类号： G01R23/16 , G01R29/26 , G01R31/31709
摘要： A wideband signal analyzing apparatus for analyzing an input signal includes frequency-shifting means for generating a plurality of intermediate frequency signals by shifting a frequency of the input signal as much as respectively different frequency-shifting amounts, so that if a frequency band of the input signal is divided into a plurality of frequency bands, each of the frequency bands can be shifted to a predetermined intermediate band, spectrum measuring means for outputting a complex spectrum of each of the intermediate frequency signals, and spectrum reconstructing means for merging the complex spectra.
摘要翻译：用于分析输入信号的宽带信号分析装置包括频移装置，用于通过将输入信号的频率分别移动到分别不同的频移量来产生多个中频信号，使得如果输入的频带信号被分成多个频带，每个频带可以移动到预定的中间频带，用于输出每个中频信号的复谱的频谱测量装置和用于合并复谱的频谱重建装置。

20. 发明授权

US07313496B2 Test apparatus and test method for testing a device under test 有权
标题翻译：用于测试被测设备的测试设备和测试方法
公开(公告)号：US07313496B2
公开(公告)日：2007-12-25
申请号：US11056330
申请日：2005-02-11
申请人： Masahiro Ishida , Takahiro Yamaguchi , Mani Soma
发明人： Masahiro Ishida , Takahiro Yamaguchi , Mani Soma
IPC分类号： G01D3/00 , G01R27/28
CPC分类号： G01R31/31709 , G01R31/2882 , G01R31/31716
摘要： A testing apparatus for testing a device under test (DUT) includes a performance board; a main frame for generating a test signal for testing the DUT and determining pass/fail of the DUT based on an output signal output by the DUT; a pin electronics between the main frame and the performance board and performs sending and receiving signals between the main frame and the DUT; a deterministic jitter injecting unit for receiving the output signal without passing through the pin electronics and inputting a loop signal, which is the received output signal into which a deterministic jitter is injected, to an input pin of the DUT without passing through the pin electronics; and a switching unit for determining whether the input pin of the DUT is provided with the test signal output by the pin electronics or the loop signal output by the deterministic jitter injecting unit.
摘要翻译：用于测试被测设备（DUT）的测试设备包括一个性能板; 用于产生用于测试DUT的测试信号和根据DUT输出的输出信号确定DUT的通过/失败的主框架; 在主框架和执行板之间的引脚电子设备，并在主框架和DUT之间执行发送和接收信号; 确定性抖动注入单元，用于在不通过引脚电子装置的情况下接收输出信号，并将作为所注入的确定性抖动的接收输出信号的环路信号输入到DUT的输入引脚，而不通过引脚电子器件; 以及用于确定DUT的输入引脚是否具有由引脚电子器件输出的测试信号或由确定性抖动注入单元输出的环路信号的开关单元。

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