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11. 发明申请

US20080178183A1 Scheduling Threads In A Multi-Processor Computer 有权
标题翻译：在多处理器计算机中调度线程
公开(公告)号：US20080178183A1
公开(公告)日：2008-07-24
申请号：US12055179
申请日：2008-03-25
申请人： Jos Manuel Accapadi , Herman Dietrich Dierks , Andrew Dunshea , Dirk Michel
发明人： Jos Manuel Accapadi , Herman Dietrich Dierks , Andrew Dunshea , Dirk Michel
IPC分类号： G06F9/46
CPC分类号： G06F9/4812
摘要： Scheduling threads in a multi-processor computer system including establishing an interrupt threshold for a thread, where the interrupt threshold represents a maximum permissible number of interrupts during thread execution on a processor; executing the thread on a current processor, where the thread has thread affinity for one or more processors including the current processor; counting a number of interrupts during execution of the thread on the current processor; and removing thread affinity for the current processor in dependence upon the counted number of interrupts and the interrupt threshold.
摘要翻译：在多处理器计算机系统中调度线程，包括建立线程的中断阈值，其中中断阈值表示在处理器上的线程执行期间的最大允许中断次数; 在当前处理器上执行线程，其中线程对于包括当前处理器的一个或多个处理器具有线程亲和性; 在当前处理器上的线程执行期间对多个中断进行计数; 并根据计数的中断次数和中断阈值去除当前处理器的线程亲和度。

12. 发明授权

US07360218B2 System and method for scheduling compatible threads in a simultaneous multi-threading processor using cycle per instruction value occurred during identified time interval 有权
标题翻译：用于在同步多线程处理器中调度兼容线程的系统和方法，使用在指定时间间隔期间的每个指令值周期
公开(公告)号：US07360218B2
公开(公告)日：2008-04-15
申请号：US10671132
申请日：2003-09-25
申请人： Jos Manuel Accapadi , Andrew Dunshea , Dirk Michel , Mysore Sathyanarayana Srinivas
发明人： Jos Manuel Accapadi , Andrew Dunshea , Dirk Michel , Mysore Sathyanarayana Srinivas
IPC分类号： G06F9/455 , G06F9/46 , G06F9/00 , G06F9/30
CPC分类号： G06F9/4881 , G06F2209/483
摘要： A system and method for identifying compatible threads in a Simultaneous Multithreading (SMT) processor environment is provided by calculating a performance metric, such as cycles per instruction (CPI), that occurs when two threads are running on the SMT processor. The CPI that is achieved when both threads were executing on the SMT processor is determined. If the CPI that was achieved is better than the compatibility threshold, then information indicating the compatibility is recorded. When a thread is about to complete, the scheduler looks at the run queue from which the completing thread belongs to dispatch another thread. The scheduler identifies a thread that is (1) compatible with the thread that is still running on the SMT processor (i.e., the thread that is not about to complete), and (2) ready to execute. The CPI data is continually updated so that threads that are compatible with one another are continually identified.
摘要翻译：通过计算在SMT处理器上运行两个线程时发生的性能指标（例如每个指令周期（CPI）），可以提供用于在同时多线程（SMT）处理器环境中识别兼容线程的系统和方法。确定在两个线程在SMT处理器上执行时实现的CPI。如果实现的CPI优于兼容性阈值，则记录指示兼容性的信息。当线程即将完成时，调度程序将查看完成线程所属的运行队列，以调度另一个线程。调度程序标识（1）与SMT处理器上仍然运行的线程（即，即将完成的线程）兼容的线程，以及（2）准备执行。持续更新CPI数据，以便不断地识别彼此兼容的线程。

13. 发明申请

US20090254730A1 Memory Pacing 失效
标题翻译：内存起搏
公开(公告)号：US20090254730A1
公开(公告)日：2009-10-08
申请号：US12478830
申请日：2009-06-05
申请人： Andrew Dunshea , Jos Manuel Accapadi , Catherine Moriarty Nunez
发明人： Andrew Dunshea , Jos Manuel Accapadi , Catherine Moriarty Nunez
IPC分类号： G06F12/02
CPC分类号： G06F12/1009 , Y10S707/99953 , Y10S707/99957
摘要： A method, system, and program for managing memory page requests in a multi-processor data processing system determines a threshold value of available memory, and dynamically adjusts an allocation time to fulfill a page request if the available memory is below a threshold value. The allocation time to fulfill the page request is based upon a percentage of available memory pages once a page stealer commences a scan for pages. An allocation wait time is inversely proportionally adjusted depending upon the percentage of available memory. The allocation wait time has a duration that increases in time as the percentage of available memory decreases and decreases in time as the percentage of available memory increases. More specifically, an average time per page to allocate a page including a scan time for the scan in computing the average time is determined. Then a tunable value is applied to the average time to determine a wait time. In a preferred embodiment, user defined values are received that would control the allocation wait time before fulfilling a page request.
摘要翻译：用于管理多处理器数据处理系统中的存储器页面请求的方法，系统和程序确定可用存储器的阈值，并且如果可用存储器低于阈值，则动态地调整分配时间以满足页面请求。一旦页面窃取器开始扫描页面，则完成页面请求的分配时间基于可用内存页面的百分比。分配等待时间根据可用内存的百分比进行反比例调整。分配等待时间具有随时间增加的持续时间，随着可用内存的百分比的增加，可用内存的百分比随时间而减少。更具体地，确定在计算平均时间时分配包括用于扫描的扫描时间的页面的每页的平均时间。然后将可调值应用于平均时间以确定等待时间。在优选实施例中，接收用户定义的值，其将在满足页面请求之前控制分配等待时间。

14. 发明申请

US20090113239A1 METHOD AND APPARATUS FOR INSTRUCTION TRACE REGISTERS 有权
标题翻译：指令跟踪寄存器的方法和装置
公开(公告)号：US20090113239A1
公开(公告)日：2009-04-30
申请号：US11924192
申请日：2007-10-25
申请人： Jos Manuel Accapadi , Andrew Dunshea , Miho Ogishima , Suzanne Shi
发明人： Jos Manuel Accapadi , Andrew Dunshea , Miho Ogishima , Suzanne Shi
IPC分类号： G06F9/30 , G06F11/07 , G06F9/312
CPC分类号： G06F9/30101
摘要： A computer implemented method, apparatus, and computer usable program product for utilizing instruction trace registers. In one embodiment, a value in a target processor register in a plurality of processor registers is updated in response to executing an instruction associated with program code. In response to updating the value in the target processor register, an address for the instruction is copied from an instruction address register into an instruction trace register associated with the target processor register. The instruction trace register holds the address of the instruction that updated the value stored in the target processor register.
摘要翻译：一种用于使用指令跟踪寄存器的计算机实现的方法，装置和计算机可用程序产品。在一个实施例中，响应于执行与程序代码相关联的指令，更新多个处理器寄存器中的目标处理器寄存器中的值。响应更新目标处理器寄存器中的值，将指令的地址从指令地址寄存器复制到与目标处理器寄存器相关联的指令跟踪寄存器中。指令跟踪寄存器保存更新存储在目标处理器寄存器中的值的指令的地址。

15. 发明授权

US07318142B2 System and method for dynamically adjusting read ahead values based upon memory usage 失效
标题翻译：基于内存使用动态调整预读值的系统和方法
公开(公告)号：US07318142B2
公开(公告)日：2008-01-08
申请号：US11463100
申请日：2006-08-08
申请人： Jos Manuel Accapadi , Andrew Dunshea , Li Li , Grover Herbert Neuman , Mysore Sathyanarayana Srinivas , David Alan Hepkin
发明人： Jos Manuel Accapadi , Andrew Dunshea , Li Li , Grover Herbert Neuman , Mysore Sathyanarayana Srinivas , David Alan Hepkin
IPC分类号： G06F12/06
CPC分类号： G06F12/023
摘要： A system and method for dynamically altering a Virtual Memory Manager (VMM) Sequential-Access Read Ahead settings based upon current system memory conditions is provided. Normal VMM operations are performed using the Sequential-Access Read Ahead values set by the user. When low memory is detected, the system either turns off Sequential-Access Read Ahead operations or decreases the maximum page ahead (maxpgahead) value based upon whether the amount of free space is simply low or has reached a critically low level. The altered VMM Sequential-Access Read Ahead state remains in effect until enough free space is available so that normal VMM Sequential-Access Read Ahead operations can be performed (at which point the altered Sequential-Access Read Ahead values are reset to their original levels).
摘要翻译：提供了一种基于当前系统内存条件动态更改虚拟内存管理器（VMM）顺序访问预读设置的系统和方法。使用用户设置的顺序访问读取前值可以执行正常的VMM操作。当检测到低内存时，系统会根据自由空间量是否很低或已经达到极低的水平，关闭顺序访问预读操作或者减小最大页面前提（maxpgahead）值。改变的VMM顺序访问预读状态在有足够的可用空间可用之前保持有效，以便可以执行正常的VMM顺序访问预读操作（此时，改变的顺序访问读取前置值被重置为其原始级别）。

16. 发明授权

US08424078B2 Methodology for secure application partitioning enablement 有权
标题翻译：安全应用程序分区启用的方法
公开(公告)号：US08424078B2
公开(公告)日：2013-04-16
申请号：US11935585
申请日：2007-11-06
申请人： Jos Manuel Accapadi , Andrew Dunshea , Lynne Marie Weber , Linda Ann Zimmer
发明人： Jos Manuel Accapadi , Andrew Dunshea , Lynne Marie Weber , Linda Ann Zimmer
IPC分类号： G06F7/04 , G06F12/00 , G06F13/00 , G06F17/30 , G11C7/00 , G08B23/00 , G06F13/28 , H04L29/06
CPC分类号： G06F9/5061 , G06F21/53 , G06F21/80
摘要： A computer implemented methods data processing system, and computer program product for configuring a partition with needed system resources to enable an application to run and process in a secure environment. Upon receiving a command to create a short lived secure partition for a secure application, a short lived secure partition is created in the data processing system. This short lived secure partition is inaccessible by superusers or other applications. System resources comprising physical resources and virtual allocations of the physical resources are allocated to the short lived secure partition. Hardware and software components needed to run the secure application are loaded into the short lived secure partition.
摘要翻译：计算机实现的方法数据处理系统和用于配置具有所需系统资源的分区的计算机程序产品，以使应用程序能够在安全环境中运行和处理。在接收到为安全应用创建短寿命安全分区的命令时，在数据处理系统中创建一个短暂的安全分区。这个短暂的安全分区是超级用户或其他应用程序无法访问的。包括物理资源和物理资源的虚拟分配的系统资源被分配给短寿命安全分区。运行安全应用程序所需的硬件和软件组件将加载到短寿命安全分区中。

17. 发明授权

US07698529B2 Method for trading resources between partitions of a data processing system 失效
标题翻译：用于在数据处理系统的分区之间交换资源的方法
公开(公告)号：US07698529B2
公开(公告)日：2010-04-13
申请号：US11621637
申请日：2007-01-10
申请人： Jos Manuel Accapadi , Andrew Dunshea , Diane Garza Flemming , Catherine Moriarty Nunez
发明人： Jos Manuel Accapadi , Andrew Dunshea , Diane Garza Flemming , Catherine Moriarty Nunez
IPC分类号： G06F13/00
CPC分类号： G06F9/5077
摘要： A method is provided for a data processing system configured to include multiple logical partitions, wherein resources of the system are selectively allocated among respective partitions. In the method, an entity such as a Partition Load Manager or a separate background process is used to manage resources based on locality levels. The method includes the step of evaluating the allocation of resources to each of the partitions at a particular time, in order to select a partition having at least one resource considered to be of low desirability due to its level of locality with respect to the selected partition. The method further comprises identifying each of the other partitions that has a resource matching the resource of low desirability, and determining the overall benefit to the system that would result from trading the resource of low desirability for the matching resource of each of the identified partitions. Resources are reallocated to trade the resource of low desirability for the matching resource of the identified partition that is determined to provide the greatest overall benefit for the system, provided that at least some overall system benefit will result from the reallocation.
摘要翻译：提供了一种用于数据处理系统的方法，所述数据处理系统被配置为包括多个逻辑分区，其中所述系统的资源在各个分区之间被选择性地分配。在该方法中，使用诸如分区加载管理器或单独的后台进程的实体来基于地点级别来管理资源。该方法包括在特定时间评估对每个分区的资源分配的步骤，以便由于其相对于所选择的分区的局部性水平而选择具有被认为是低可取性的至少一个资源的分区。该方法还包括识别具有与低可靠性的资源匹配的资源的每个其他分区，以及确定由对于每个所识别的分区的匹配资源的低期望性的资源进行交易而导致的系统的总体利益。重新分配资源以交换被确定为系统提供最大整体利益的所识别分区的匹配资源的低可用性资源，前提是至少部分整体系统利益将由重新分配产生。

18. 发明申请

US20090248809A1 Instant Message Session Transfers 审中-公开
标题翻译：即时消息会话传输
公开(公告)号：US20090248809A1
公开(公告)日：2009-10-01
申请号：US12057737
申请日：2008-03-28
申请人： Aruna Yedavilli , Andrew Dunshea , Suzanne Shi , Jos Manuel Accapadi
发明人： Aruna Yedavilli , Andrew Dunshea , Suzanne Shi , Jos Manuel Accapadi
IPC分类号： G06F15/16
CPC分类号： H04L12/66
摘要： A method facilitates instant message (IM) session transfer of messages intended for an IM user to a new IM session being established by the user. Existing IM sessions may be queried for active IM sessions when the user is connecting to an instant message service. If there is an active session for the user, the IM server will request the content and sender of active messages waiting for the user, and transfer this information to the new IM session being established for the user. In this way, the user does not “miss” IM message(s) intended for him or her while going between existing, active IM sessions and new IM sessions. As used herein, session or sessions refer to IM session or IM sessions.
摘要翻译：一种方法有助于即将消息（IM）会话传送IM用户的消息到由用户建立的新IM会话。当用户正在连接到即时消息服务时，可以查询现有IM会话用于活动IM会话。如果用户有活动会话，则IM服务器将请求等待用户的活动消息的内容和发送方，并将该信息传送到为用户建立的新IM会话。以这种方式，当在现有的，活动的IM会话和新的IM会话之间进行时，用户不会“错过”针对他或她的IM消息。如本文所使用的，会话或会话是指IM会话或IM会话。

19. 发明授权

US07487503B2 Scheduling threads in a multiprocessor computer 失效
标题翻译：在多处理器计算机中调度线程
公开(公告)号：US07487503B2
公开(公告)日：2009-02-03
申请号：US10916976
申请日：2004-08-12
申请人： Jos Manuel Accapadi , Mathew Accapadi , Andrew Dunshea , Mark Elliott Hack , Agustin Mena, III , Mysore Sathyanarayana Srinivas
发明人： Jos Manuel Accapadi , Mathew Accapadi , Andrew Dunshea , Mark Elliott Hack , Agustin Mena, III , Mysore Sathyanarayana Srinivas
IPC分类号： G06F9/46 , G06F13/24
CPC分类号： G06F9/5027 , G06F9/4812
摘要： Methods, systems, and computer program products are provided for scheduling threads in a multiprocessor computer. Embodiments include selecting a thread in a ready queue to be dispatched to a processor and determining whether an interrupt mask flag is set in a thread control block associated with the thread. If the interrupt mask flag is set in the thread control block associated with the thread, embodiments typically include selecting a processor, setting a current processor priority register of the selected processor to least favored, and dispatching the thread from the ready queue to the selected processor. In some embodiments, setting the current processor priority register of the selected processor to least favored is carried out by storing a value associated with the highest interrupt priority in the current processor priority register.
摘要翻译：提供方法，系统和计算机程序产品用于在多处理器计算机中调度线程。实施例包括选择要发送到处理器的准备队列中的线程，并且确定是否在与线程相关联的线程控制块中设置了中断屏蔽标志。如果在与线程相关联的线程控制块中设置中断屏蔽标志，则实施例通常包括选择处理器，将所选择的处理器的当前处理器优先级寄存器设置为最不利，并将线程从就绪队列调度到所选择的处理器。在一些实施例中，将所选择的处理器的当前处理器优先级寄存器设置为最不利的是通过在当前处理器优先级寄存器中存储与最高中断优先级相关联的值来执行。

20. 发明授权

US07962913B2 Scheduling threads in a multiprocessor computer 失效
标题翻译：在多处理器计算机中调度线程
公开(公告)号：US07962913B2
公开(公告)日：2011-06-14
申请号：US12342352
申请日：2008-12-23
申请人： Jos Manuel Accapadi , Mathew Accapadi , Andrew Dunshea , Mark Elliott Hack , Agustin Mena, III , Mysore Sathyanarayana Srinivas
发明人： Jos Manuel Accapadi , Mathew Accapadi , Andrew Dunshea , Mark Elliott Hack , Agustin Mena, III , Mysore Sathyanarayana Srinivas
IPC分类号： G06F9/46 , G06F13/24
CPC分类号： G06F9/5027 , G06F9/4812
摘要： Methods, systems, and computer program products are provided for scheduling threads in a multiprocessor computer. Embodiments include selecting a thread in a ready queue to be dispatched to a processor and determining whether an interrupt mask flag is set in a thread control block associated with the thread. If the interrupt mask flag is set in the thread control block associated with the thread, embodiments typically include selecting a processor, setting a current processor priority register of the selected processor to least favored, and dispatching the thread from the ready queue to the selected processor. In some embodiments, setting the current processor priority register of the selected processor to least favored is carried out by storing a value associated with the highest interrupt priority in the current processor priority register.
摘要翻译：提供方法，系统和计算机程序产品用于在多处理器计算机中调度线程。实施例包括选择要发送到处理器的准备队列中的线程，并且确定是否在与线程相关联的线程控制块中设置了中断屏蔽标志。如果在与线程相关联的线程控制块中设置中断屏蔽标志，则实施例通常包括选择处理器，将所选择的处理器的当前处理器优先级寄存器设置为最不利，并将线程从就绪队列调度到所选择的处理器。在一些实施例中，将所选择的处理器的当前处理器优先级寄存器设置为最不利的是通过在当前处理器优先级寄存器中存储与最高中断优先级相关联的值来执行。

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