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11. 发明申请

US20060215475A1 Wordline enable circuit in semiconductor memory device and method thereof 有权
标题翻译：半导体存储器件中的字线使能电路及其方法
公开(公告)号：US20060215475A1
公开(公告)日：2006-09-28
申请号：US11320967
申请日：2005-12-30
申请人： Jong-Won Lee , Shin-Ho Chu
发明人： Jong-Won Lee , Shin-Ho Chu
IPC分类号： G11C7/00
CPC分类号： G11C11/4085 , G11C11/406 , G11C2211/4065
摘要： There is provided a wordline enable circuit and its method for reducing power consumption by controlling a wordline select signal in a self-refresh mode. The wordline enable circuit includes a wordline control signal generating unit for outputting an untoggled wordline control signal while a unit wordline block is enabled in a self-refresh mode; a wordline enable signal generating unit for generating a wordline enable control signal, controlled by the untoggled wordline control signal and a toggled address signal, and a first to an n-th wordline enable power supply signals; and a wordline block enable unit for enabling each wordline, controlled by the wordline enable control signal and the first to the n-th wordline enable power supply signals.
摘要翻译：提供了一种字线使能电路及其通过在自刷新模式中控制字线选择信号来降低功耗的方法。字线使能电路包括字线控制信号生成单元，用于在自刷新模式下启用单位字线块时输出未切换的字线控制信号; 字线使能信号生成单元，用于生成由未切换的字线控制信号和切换的地址信号控制的字线使能控制信号，以及第一至第n字线使能电源信号; 以及字线块使能单元，用于启用由字线使能控制信号和第一至第n字线使能电源信号控制的每个字线。

12. 发明申请

US20050032269A1 Forming planarized semiconductor structures 审中-公开
标题翻译：形成平坦化的半导体结构
公开(公告)号：US20050032269A1
公开(公告)日：2005-02-10
申请号：US10633881
申请日：2003-08-04
申请人： Daniel Xu , Tyler Lowrey , Jong-Won Lee , Kyu Min , Donghui Lu , Jenn Chow
发明人： Daniel Xu , Tyler Lowrey , Jong-Won Lee , Kyu Min , Donghui Lu , Jenn Chow
IPC分类号： H01L21/06 , H01L27/24 , H01L45/00
CPC分类号： H01L45/16 , H01L27/2409 , H01L45/06 , H01L45/1233 , H01L45/1253 , H01L45/1293 , H01L45/144
摘要： A planarized surface may be formed by initially forming an aperture through an insulating layer. The insulating layer and its aperture may be conformally coated with a conductive material that ultimately acts as a planarization stop. The conductive material may then be covered with another insulator that fills the remainder of the aperture. Thereafter, the structure may be planarized down to the conductive layer that acts as a planarization stop.
摘要翻译：可以通过最初通过绝缘层形成孔而形成平坦化表面。绝缘层及其孔可以共形地涂覆有最终用作平坦化停止的导电材料。然后可以用填充孔的其余部分的另一绝缘体覆盖导电材料。此后，该结构可以平坦化为用作平坦化停止的导电层。

13. 发明授权

US06845049B2 Semiconductor memory device including a delaying circuit capable of generating a delayed signal with a substantially constant delay time 失效
标题翻译：半导体存储器件包括能够产生具有基本恒定的延迟时间的延迟信号的延迟电路
公开(公告)号：US06845049B2
公开(公告)日：2005-01-18
申请号：US10313817
申请日：2002-12-05
申请人： Kyu-Nam Lim , Jei-Hwan Yoo , Young-Gu Kang , Jong-Won Lee , Jae-Yoon Shim
发明人： Kyu-Nam Lim , Jei-Hwan Yoo , Young-Gu Kang , Jong-Won Lee , Jae-Yoon Shim
IPC分类号： G11C11/409 , G11C7/04 , G11C7/06 , G11C7/08 , G11C7/22 , G11C8/08 , G11C7/00
CPC分类号： G11C7/04 , G11C7/06 , G11C7/22 , G11C7/227 , G11C2207/2281
摘要： A semiconductor memory device with a bit line sense enable signal generating circuit is disclosed. The semiconductor memory device includes a word line selection signal generating circuit for generating a word line selection signal for selecting a word line; a delay circuit for generating a delayed signal by delaying a signal to the same extent of time period which is needed for the word line selection signal generating circuit to generate the word line selection signal; and a Schmitt trigger for generating a word line enable detecting signal by receiving an output signal from the delay circuit and that is connected to a power supply voltage which has the same voltage level as the voltage level used to enable the word line. The bit line sense enable signal generating circuit in the present invention occupies a relatively smaller layout area than that of conventional semiconductor memory devices. Furthermore, the generating circuit generates a bit line sense enable signal with constant delay time that is immune from process changes, voltage fluctuations, and temperature fluctuations.
摘要翻译：公开了一种具有位线检测使能信号发生电路的半导体存储器件。半导体存储器件包括用于产生用于选择字线的字线选择信号的字线选择信号发生电路; 延迟电路，用于通过将信号延迟到所述字线选择信号发生电路产生字线选择信号所需的相同的时间周期来产生延迟信号; 以及施密特触发器，用于通过接收来自延迟电路的输出信号并连接到与用于使能字线的电压电平相同的电压电平的电源电压来产生字线使能检测信号。本发明中的位线检测使能信号发生电路的布局面积比传统的半导体存储器件要小。此外，发生电路产生具有恒定延迟时间的位线检测使能信号，其免受过程变化，电压波动和温度波动的影响。

14. 发明授权

US06569705B2 Metal structure for a phase-change memory device 有权
公开(公告)号：US06569705B2
公开(公告)日：2003-05-27
申请号：US09745835
申请日：2000-12-21
申请人： Chien Chiang , Jong-Won Lee , Patrick Klersy
发明人： Chien Chiang , Jong-Won Lee , Patrick Klersy
IPC分类号： H01L2100
CPC分类号： H01L45/1233 , H01L27/2409 , H01L27/2463 , H01L45/06 , H01L45/1253 , H01L45/126 , H01L45/144 , H01L45/16 , H01L45/1666 , Y10S438/90
摘要： The invention relates to a damascene chalcogenide memory cell structure. The damascene chalcogenide memory cell structure is fabricated under conditions that simplify previous process flows. The damascene chalcogenide memory cell structure also prevents volatilization of the chalcogenide memory material.

15. 发明授权

US08845375B2 Disposable life-saving garment 有权
标题翻译：一次性救生服
公开(公告)号：US08845375B2
公开(公告)日：2014-09-30
申请号：US13386127
申请日：2010-07-01
申请人： Jong-Won Lee
发明人： Jong-Won Lee
IPC分类号： B63C9/08 , A41D13/002 , A62B17/00 , A41D13/01 , A41D31/00
CPC分类号： A62B17/003 , A41D13/0025 , A41D13/01 , A41D31/0027 , A41D2400/52
摘要： A disposable life-saving garment for use in the event of fire, comprises a body-protecting portion and a head-protecting portion. The body-protecting portion is configured with a lining formed to enclose the body of a wearer and a cover covering the liner, the cover being made of a sealed material that can block the passage of air. A closed air passage is formed between the liner and cover. A compressed air tank is installed in a pocket of the cover and is connected to the air passage through a check valve. An intake hose supplies compressed air from the air passage of the body-protecting portion to the head-protecting portion. The head-protecting portion has a heat-resistant transparent window and a one-way outlet unit. The body-protecting portion and the head-protecting portion are made of a nonflammable material or a fire retardant material.
摘要翻译：用于发生火灾的一次性救生衣包括身体保护部分和头部保护部分。身体保护部分构造有衬里，该衬里形成为围绕穿着者的身体和覆盖衬里的罩，该罩由可阻挡空气通过的密封材料制成。在衬套和盖子之间形成封闭的空气通道。压缩空气罐安装在盖的凹槽中，并通过止回阀连接到空气通道。进气软管将压缩空气从身体保护部分的空气通道提供到头部保护部分。头部保护部分具有耐热透明窗口和单向出口单元。身体保护部分和头部保护部分由不燃材料或阻燃材料制成。

16. 发明授权

US08735250B2 Methods of forming gates of semiconductor devices 有权
标题翻译：形成半导体器件栅极的方法
公开(公告)号：US08735250B2
公开(公告)日：2014-05-27
申请号：US13241957
申请日：2011-09-23
申请人： Jong-Won Lee , Bo-Un Yoon , Seung-Jae Lee
发明人： Jong-Won Lee , Bo-Un Yoon , Seung-Jae Lee
IPC分类号： H01L21/8234
CPC分类号： H01L21/28008 , H01L21/28105 , H01L21/823842 , H01L29/42376 , H01L29/49 , H01L29/513 , H01L29/66545
摘要： Methods of forming gates of semiconductor devices are provided. The methods may include forming a first recess in a first substrate region having a first conductivity type and forming a second recess in a second substrate region having a second conductivity type. The methods may also include forming a high-k layer in the first and second recesses. The methods may further include providing a first metal on the high-k layer in the first and second substrate regions, the first metal being provided within the second recess. The methods may additionally include removing at least portions of the first metal from the second recess while protecting materials within the first recess from removal. The methods may also include, after removing at least portions of the first metal from the second recess, providing a second metal within the second recess.
摘要翻译：提供了形成半导体器件的栅极的方法。所述方法可以包括在具有第一导电类型的第一衬底区域中形成第一凹槽，并在具有第二导电类型的第二衬底区域中形成第二凹部。所述方法还可以包括在第一和第二凹部中形成高k层。所述方法还可以包括在第一和第二衬底区域中的高k层上提供第一金属，第一金属设置在第二凹槽内。所述方法还可以包括从第二凹部移除第一金属的至少一部分，同时保护第一凹槽内的材料不被去除。所述方法还可以包括在从第二凹部去除第一金属的至少一部分之后，在第二凹部内提供第二金属。

17. 发明授权

US08345472B2 Three-terminal ovonic threshold switch as a current driver in a phase change memory 有权
标题翻译：三端子超声门限开关作为相变存储器中的当前驱动器
公开(公告)号：US08345472B2
公开(公告)日：2013-01-01
申请号：US12974424
申请日：2010-12-21
申请人： Jong-Won Lee , Gianpaolo Spadini
发明人： Jong-Won Lee , Gianpaolo Spadini
IPC分类号： G11C11/00
CPC分类号： H01L45/1675 , G11C5/147 , G11C13/0004 , G11C13/0023 , G11C13/0026 , G11C13/0028 , G11C13/003 , G11C13/0069 , G11C2013/0092 , G11C2213/76 , H01L27/2436 , H01L45/00 , H01L45/04 , H01L45/1206 , H01L45/141
摘要： A three-terminal Ovonic Threshold Switch (OTS) is used to provide current to a Phase Change Memory Switch (PCMS) cross point array. The current is started by sending a small current into the second terminal of the three-terminal OTS allowing a larger current to flow from the first terminal to the third terminal of the three-terminal OTS. A method of making the three-terminal OTS is also presented.
摘要翻译：三端Ovonic阈值开关（OTS）用于向相变存储器开关（PCMS）交叉点阵列提供电流。通过向三端子OTS的第二端子发送小电流来开始电流，允许较大的电流从三端子OTS的第一端子流向第三端子。还提出了制作三端OTS的方法。

18. 发明申请

US20120088358A1 Methods of Forming Gates of Semiconductor Devices 有权
标题翻译：半导体器件门形成方法
公开(公告)号：US20120088358A1
公开(公告)日：2012-04-12
申请号：US13241957
申请日：2011-09-23
申请人： Jong-Won Lee , Bo-Un Yoon , Seung-Jae Lee
发明人： Jong-Won Lee , Bo-Un Yoon , Seung-Jae Lee
IPC分类号： H01L21/336
CPC分类号： H01L21/28008 , H01L21/28105 , H01L21/823842 , H01L29/42376 , H01L29/49 , H01L29/513 , H01L29/66545
摘要： Methods of forming gates of semiconductor devices are provided. The methods may include forming a first recess in a first substrate region having a first conductivity type and forming a second recess in a second substrate region having a second conductivity type. The methods may also include forming a high-k layer in the first and second recesses. The methods may further include providing a first metal on the high-k layer in the first and second substrate regions, the first metal being provided within the second recess. The methods may additionally include removing at least portions of the first metal from the second recess while protecting materials within the first recess from removal. The methods may also include, after removing at least portions of the first metal from the second recess, providing a second metal within the second recess.
摘要翻译：提供了形成半导体器件的栅极的方法。所述方法可以包括在具有第一导电类型的第一衬底区域中形成第一凹槽，并在具有第二导电类型的第二衬底区域中形成第二凹部。所述方法还可以包括在第一和第二凹部中形成高k层。所述方法还可以包括在第一和第二衬底区域中的高k层上提供第一金属，第一金属设置在第二凹槽内。所述方法还可以包括从第二凹部移除第一金属的至少一部分，同时保护第一凹槽内的材料不被去除。所述方法还可以包括在从第二凹部去除第一金属的至少一部分之后，在第二凹部内提供第二金属。

19. 发明申请

US20120052682A1 POLISHING SLURRY AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME 审中-公开
标题翻译：抛光浆和使用其制造半导体器件的方法
公开(公告)号：US20120052682A1
公开(公告)日：2012-03-01
申请号：US13204862
申请日：2011-08-08
申请人： Sang-Kyun Kim , Jong-Won Lee , Eui-Hoon Jung , Bo-Un Yoon , Sang-Hyun Park , Seung-Jae Lee , Yun-Jeong Kim
发明人： Sang-Kyun Kim , Jong-Won Lee , Eui-Hoon Jung , Bo-Un Yoon , Sang-Hyun Park , Seung-Jae Lee , Yun-Jeong Kim
IPC分类号： H01L21/302 , C09K13/00
CPC分类号： H01L21/3212 , C09G1/02 , C09K3/1409 , C09K3/1463
摘要： A polishing slurry for polishing an aluminum film includes an abrasive agent, an oxidizing agent, an anti-corrosion agent, and a removal rate reducing agent that is an anionic compound exhibiting a negative charge in the slurry. The polishing slurry can be used in a method of manufacturing a semiconductor device.
摘要翻译：用于抛光铝膜的抛光浆料包括研磨剂，氧化剂，防腐蚀剂和作为在浆料中显示负电荷的阴离子化合物的去除速率还原剂。抛光浆料可用于制造半导体器件的方法中。

20. 发明申请

US20120045707A1 ANODE SUPPORTED FLAT-TUBE SOFC AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译： ANODE支持的平板SOFC及其制造方法
公开(公告)号：US20120045707A1
公开(公告)日：2012-02-23
申请号：US13008370
申请日：2011-01-18
申请人： Rak-Hyun Song , Seung-Bok Lee , Seok-Joo Park , Tak-Hyung Lim , Jong-Won Lee , Dong-Ryul Shin , Seuk-Hoon Pi , Wan-Je Kim , Eun-Gu Kim
发明人： Rak-Hyun Song , Seung-Bok Lee , Seok-Joo Park , Tak-Hyung Lim , Jong-Won Lee , Dong-Ryul Shin , Seuk-Hoon Pi , Wan-Je Kim , Eun-Gu Kim
IPC分类号： H01M8/24 , H01M8/00
CPC分类号： H01M8/2404 , H01M8/006 , H01M8/0206 , H01M8/0217 , H01M8/0226 , H01M8/0232 , H01M8/0247 , H01M8/0258 , H01M8/1226 , H01M8/2425 , H01M8/243 , H01M2008/1293 , H01M2300/0071 , Y02P70/56
摘要： Disclosed is an anode supported flat-tube solid oxide fuel cell including: a stack including a plurality of unit cells layered therein, each of the unit cells having an anode support, wherein within the anode support, a flow path allowing a fuel gas to flow is formed, and on a surface of the anode support, an electrolyte, a cathode, and an interconnect layer are provided, wherein the interconnect layer positioned between the unit cells constituting the stack is formed by a paste obtained by mixing an electrical conductive material with glass, and on the interconnect layer formed by the paste, a metallic mesh for drawing out a current collection wire is disposed.
摘要翻译：公开了一种阳极支撑的扁管固体氧化物燃料电池，其包括：堆叠体，其中层叠有多个单元电池，每个单电池具有阳极支撑件，其中在阳极支撑件内，允许燃料气体流动的流路并且在阳极支撑体的表面上提供电解质，阴极和互连层，其中位于构成堆叠的单元电池之间的互连层由通过将导电材料与玻璃，并且在由糊料形成的互连层上设置用于拉出集电线的金属网。

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