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11. 发明授权

US4494301A Method of making semiconductor device with multi-levels of polycrystalline silicon conductors 失效
标题翻译：制造具有多层多晶硅导体的半导体器件的方法
公开(公告)号：US4494301A
公开(公告)日：1985-01-22
申请号：US528451
申请日：1983-09-01
申请人： Lorenzo Faraone
发明人： Lorenzo Faraone
IPC分类号： H01L21/321 , H01L21/768 , H01L21/90
CPC分类号： H01L21/32105 , H01L21/768
摘要： A method of making a semiconductor device having multi-levels of polycrystalline silicon conductors insulated from each other and from the silicon substrate on which the semiconductor device if formed. In this method, each of the silicon oxide layers insulating the conductors from each other and from the substrate surface are each individually formed by thermal oxidation so that each is tailored in thickness and electrical characteristics for the particular purpose that each serves.
摘要翻译：一种制造半导体器件的方法，该半导体器件具有彼此绝缘的多层多晶硅导体和半导体器件如果形成的硅衬底。在这种方法中，将导体彼此之间和从衬底表面绝缘的每个氧化硅层各自通过热氧化分别形成，以便为了每个用途的特定目的，各自的厚度和电特性被定制。

12. 发明申请

US20120218556A1 OPTICAL CANTILEVER BASED ANALYTE DETECTION 审中-公开
标题翻译：基于光学检测器的分析仪检测
公开(公告)号：US20120218556A1
公开(公告)日：2012-08-30
申请号：US13035181
申请日：2011-02-25
申请人： John Marcel Dell , Mariusz Martyniuk , Adrian John Keating , Gino Michael Putrino , Lorenzo Faraone
发明人： John Marcel Dell , Mariusz Martyniuk , Adrian John Keating , Gino Michael Putrino , Lorenzo Faraone
IPC分类号： G01B9/02
CPC分类号： G01N21/7703
摘要： An apparatus for detecting a presence of one or more analytes in a sample. A plurality of optical cantilevered waveguides (200a, 200b) are optically coupled to an optical circuit between an input and an output of the circuit. Each of the optical cantilevered waveguides (200a, 200b) have an analyte selective coating, at least two of the waveguides having different analyte selective coatings. A detection module (304) analyses the output of the circuit to detect the presence of analytes in the sample.
摘要翻译：一种用于检测样品中一种或多种分析物的存在的装置。多个光悬臂波导（200a，200b）光耦合到电路的输入和输出之间的光电路。每个光学悬臂波导（200a，200b）具有分析物选择性涂层，至少两个波导具有不同的分析物选择性涂层。检测模块（304）分析电路的输出以检测样品中分析物的存在。

13. 发明申请

US20090303570A1 Tunable cavity resonator and method for fabricating same 有权
标题翻译：可调谐空腔谐振器及其制造方法
公开(公告)号：US20090303570A1
公开(公告)日：2009-12-10
申请号：US12153412
申请日：2008-05-19
申请人： Lorenzo Faraone , John Marcel Dell , Charles Anthony Musca , Jarek Antoszewski , Kevin James Winchester
发明人： Lorenzo Faraone , John Marcel Dell , Charles Anthony Musca , Jarek Antoszewski , Kevin James Winchester
IPC分类号： G02B26/00 , C23F1/00 , C23C16/513
CPC分类号： G02B26/001 , G01J3/26 , H01S3/08059 , H01S3/105
摘要： An example tunable cavity resonator for filtering radiation in the optical and IR wavelengths and an example method for fabricating same. The example resonator includes a pair of reflectors, one in fixed relationship to a substrate and the other formed upon a suspended moveable membrane disposed a cavity length from the one reflector. The resonator also includes a pair of spaced apart electrodes either constituted by the reflectors or juxtaposed therewith, which are electrostatically operable to move the membrane and other reflector relative to the one reflector.
摘要翻译：用于对光学和红外波长的辐射进行滤波的示例性可调谐空腔谐振器及其制造方法。示例性谐振器包括一对反射器，其一个与基板固定，另一个反射器形成在悬挂的可移动膜上，其设置有来自该反射器的腔长度。谐振器还包括由反射器构成或与其并置的一对间隔开的电极，其可静电操作以相对于一个反射器移动膜和其它反射器。

14. 发明授权

US07541584B2 Resonant cavity enhanced device and a method for fabricating same 有权
标题翻译：谐振腔增强器件及其制造方法
公开(公告)号：US07541584B2
公开(公告)日：2009-06-02
申请号：US10524140
申请日：2003-08-13
申请人： Jarek Antoszewski , John M Dell , Lorenzo Faraone , Charles A Musca , Kevin J Winchester
发明人： Jarek Antoszewski , John M Dell , Lorenzo Faraone , Charles A Musca , Kevin J Winchester
IPC分类号： H01L27/14
CPC分类号： G01J3/02 , G01J3/0256 , G01J3/26 , G02B26/001 , H01L31/02327 , H01L31/02966 , H01L31/1013 , H01L31/1032
摘要： A detector device for detecting incident radiation at particular wavelengths is disclosed. The device includes a base layer comprising a substrate. A resonant cavity is formed on the base layer between a pair of reflectors. One reflector is formed by a first reflector layer disposed in fixed relationship with respect to the base layer and the other reflector is formed by a second reflector layer disposed on a membrane in substantially parallel relationship to the substrate. A detector is provided within the cavity to absorb incident radiation therein for detection purposes. By placing the absorbing layer of the detector within the resonant cavity, high quantum efficiency can be achieved using very thin absorbing layers, thus significantly reducing the detector volume and hence noise. Various different arrangements of the detector device and different methods of fabricating the same are also disclosed.
摘要翻译：公开了用于检测特定波长的入射辐射的检测器装置。该装置包括包含基底的基层。在一对反射器之间的基底层上形成谐振腔。一个反射器由相对于基底层固定关系设置的第一反射器层形成，而另一个反射器由设置在膜上的与基底基本平行的第二反射层形成。在腔内提供检测器以吸收其中的入射辐射用于检测目的。通过将检测器的吸收层放置在谐振腔内，可以使用非常薄的吸收层实现高量子效率，从而显着降低检测器体积，从而显着降低噪声。还公开了检测器装置的各种不同布置及其制造方法。

15. 发明申请

US20050121747A1 Automatically passivated n-p junction and a method for making it 审中-公开
标题翻译：自动钝化n-p结及其制作方法
公开(公告)号：US20050121747A1
公开(公告)日：2005-06-09
申请号：US10501778
申请日：2003-01-17
申请人： Jarek Antoszewski , John Dell , Charles Musca , Lorenzo Faraone , Brett Nener , John Siliquini
发明人： Jarek Antoszewski , John Dell , Charles Musca , Lorenzo Faraone , Brett Nener , John Siliquini
IPC分类号： H01L21/8238 , H01L27/06 , H01L27/14 , H01L27/146 , H01L29/00 , H01L29/22 , H01L31/0296 , H01L31/102 , H01L31/103 , H01L31/18
CPC分类号： H01L27/0605 , H01L27/14643 , H01L27/14696 , H01L29/22 , H01L31/1032 , H01L31/1828 , Y02E10/543
摘要： An automatically passivated n-p junction is formed from a p-type body containing Group II and Group VI elements, one of which is mercury. A passivation layer is then formed having at least one window provided therein on a surface of the p-type body. The p-type body is then subjected to a reactive ion etching process using the passivation layer as a mask to form the n-p junction. Ohmic contacts are then formed on the n-type and p-type regions. The method may be extended to form an array of n-p junctions on a semiconductor body having a plurality of p-type material layers. This method comprises the further step of: etching the body to expose a portion of each layer; forming a passivation layer over the body; forming windows in the passivation layer; subjecting the body to a reactive ion etching process using the passivation layer as a mask to form an n-p junction in each layer or to form n-p junctions that extend substantially to the substrate; forming an ohmic contact to each of the n-type regions; and forming an ohmic contact to a common p-type layer or each layer of the portions. A semiconductor material comprising an n-p junction formed according to the aforementioned methods is also described, having a substrate, a layer of p-type material surmounting the substrate, a region of converted n-type material formed on a localised portion of the surface of the p-type material, so as to define an n-p junction between the p-type and the n-type material; a passivation layer surmounting the surface of the p-type material and the n-p junction, including windows respectively exposing part of the surface of the converted n-type material and a portion of the surface of the p-type material distant from the n-type material, such that ohmic contacts may be disposed on the exposed surface, without exposing the n-p junction.
摘要翻译：由含有II族和VI族元素的p型体形成自动钝化的n-p结，其中之一是汞。然后形成钝化层，其中在p型体的表面上设置有至少一个窗口。然后使用钝化层作为掩模对p型体进行反应离子蚀刻工艺以形成n-p结。然后在n型和p型区域上形成欧姆接触。该方法可以扩展以在具有多个p型材料层的半导体主体上形成n-p结阵列。该方法还包括以下步骤：蚀刻所述主体以暴露每层的一部分; 在身体上形成钝化层; 在钝化层中形成窗; 使用钝化层作为掩模对体进行反应离子蚀刻工艺，以在每个层中形成n-p结或形成基本上延伸到衬底的n-p结; 与n型区域中的每一个形成欧姆接触; 并且形成与共同的p型层或各层的欧姆接触。还描述了包括根据上述方法形成的np结的半导体材料，其具有衬底，覆盖衬底的p型材料层，形成在表面的局部部分上的转换的n型材料的区域 p型材料，以便在p型和n型材料之间限定np结; 覆盖p型材料和np结的表面的钝化层，包括分别暴露转换的n型材料的表面的一部分和远离n型材料的p型材料的表面的一部分的窗口材料，使得欧姆接触可以设置在暴露的表面上，而不暴露np结。

16. 发明授权

US4755481A Method of making a silicon-on-insulator transistor 失效
标题翻译：制造绝缘体上硅晶体管的方法
公开(公告)号：US4755481A
公开(公告)日：1988-07-05
申请号：US863432
申请日：1986-05-15
申请人： Lorenzo Faraone
发明人： Lorenzo Faraone
IPC分类号： H01L21/86 , H01L21/38
CPC分类号： H01L21/86
摘要： A silicon-on-insulator (SOI) device is fabricated by forming at least one island of semiconductor material on a surface of an insulating material. Silicon is then formed on the areas which surround the at least one island. The silicon is oxidized to form silicon dioxide regions which surround the at least one island.
摘要翻译：通过在绝缘材料的表面上形成至少一个半导体材料岛制造绝缘体上硅（SOI）器件。然后在围绕至少一个岛的区域上形成硅。硅被氧化以形成围绕至少一个岛的二氧化硅区域。

17. 发明授权

US4735919A Method of making a floating gate memory cell 失效
标题翻译：制造浮动栅极存储单元的方法
公开(公告)号：US4735919A
公开(公告)日：1988-04-05
申请号：US852289
申请日：1986-04-15
申请人： Lorenzo Faraone
发明人： Lorenzo Faraone
IPC分类号： H01L21/28 , H01L21/283 , H01L21/316
CPC分类号： H01L21/28273 , Y10S438/981
摘要： A method of making a floating gate memory cell which relies on control gate to floating gate conduction to charge and discharge the floating gate. The gate oxide and inter-level dielectric thicknesses are independently controlled by using a mask which can compensate for the different substrate and floating gate oxidation rates.
摘要翻译：一种制造浮动栅极存储单元的方法，其依赖于控制栅极至浮置栅极导通来对浮置栅极进行充电和放电。通过使用可以补偿不同衬底和浮栅氧化速率的掩模来独立地控制栅极氧化物和层间电介质厚度。

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