专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明申请

US20080133952A1 Power saving for isochronous data streams in a computer system 有权
标题翻译：节电计算机系统中的同步数据流
公开(公告)号：US20080133952A1
公开(公告)日：2008-06-05
申请号：US11633183
申请日：2006-12-04
申请人： Chai Huat Gan , Darren Abramson , Zohar Bogin
发明人： Chai Huat Gan , Darren Abramson , Zohar Bogin
IPC分类号： G06F13/00 , G06F1/32
CPC分类号： G06F1/3225
摘要： For isochronous data steams processed by a computer system, for example high definition audio streams, embodiments keep track of the free space available in the input and output buffers for the data streams. The available free space in the buffers determines whether various low power entry and exit thresholds are met or not. If all low power entry thresholds are met, then various circuits such as clocks, phase locked loops, and direct media interface links, may be put into a low power state, and the data stream controller enters an idle window so that memory requests are not serviced. During this time, system DRAM may begin refresh. Once the low power state has been entered into, if any exit threshold is met, then the low power state is ended. Other embodiments are described and claimed.
摘要翻译：对于由计算机系统处理的等时数据流，例如高清晰度音频流，实施例跟踪用于数据流的输入和输出缓冲器中的可用空间。缓冲器中的可用空间确定是否满足各种低功率进入和退出阈值。如果满足所有低功率入口阈值，则诸如时钟，锁相环和直接介质接口链路的各种电路可能被置于低功率状态，并且数据流控制器进入空闲窗口，使得存储器请求不是服务。在此期间，系统DRAM可能会开始刷新。一旦输入低功率状态，如果满足任何退出阈值，则低功率状态结束。描述和要求保护其他实施例。

12. 发明授权

US07181605B2 Deterministic shut down of memory devices in response to a system warm reset 有权
标题翻译：响应于系统热复位，确定性地关闭存储器件
公开(公告)号：US07181605B2
公开(公告)日：2007-02-20
申请号：US10693226
申请日：2003-10-24
申请人： Zohar Bogin , Surya Kareenahalli , Anoop Mukker , David Sastry , Tuong Trieu
发明人： Zohar Bogin , Surya Kareenahalli , Anoop Mukker , David Sastry , Tuong Trieu
IPC分类号： G06F9/00
CPC分类号： G06F1/24
摘要： A method to deterministically shut down memory devices in response to a system warm reset has been disclosed. One embodiment of the method includes causing a first type of reset in a number of memory devices in a system in response to a second type of reset in the system being initiated if the memory devices are not initialized and enabling a deterministic shutdown mode in a memory controller, which is coupled to the memory devices, after the memory devices have been initialized. Other embodiments are described and claimed.
摘要翻译：已经公开了响应于系统热复位来确定地关闭存储器件的方法。该方法的一个实施例包括在系统中响应于系统中的第二类型的复位而引起系统中的多个存储器件中的第一类型的复位，如果存储器件未被初始化并且使能存储器中的确定性关断模式控制器，其在存储器件初始化之后耦合到存储器件。描述和要求保护其他实施例。

13. 发明申请

US20050195202A1 Optimized memory addressing 有权
标题翻译：优化的内存寻址
公开(公告)号：US20050195202A1
公开(公告)日：2005-09-08
申请号：US10796686
申请日：2004-03-08
申请人： David Freker , Aditya Sreenivas , Zohar Bogin , Anoop Mukker , Tuong Trieu
发明人： David Freker , Aditya Sreenivas , Zohar Bogin , Anoop Mukker , Tuong Trieu
IPC分类号： G06F12/00 , G06F12/14 , G06F13/00
CPC分类号： G06F13/1684
摘要： Embodiments of the present invention relate to accessing a first pair of adjacent data blocks using a first channel of a dual channel memory device; and simultaneously accessing a second pair of adjacent data blocks using a second channel of the memory device, the second pair being spaced apart from the first pair by a predetermined interval.
摘要翻译：本发明的实施例涉及使用双通道存储器件的第一通道访问第一对相邻数据块; 并且使用所述存储器件的第二通道同时访问第二对相邻数据块，所述第二对与所述第一对间隔开预定间隔。

14. 发明申请

US20050143843A1 Command pacing 审中-公开
标题翻译：命令起搏
公开(公告)号：US20050143843A1
公开(公告)日：2005-06-30
申请号：US10723132
申请日：2003-11-25
申请人： Zohar Bogin , Arthur Hunter , Krishnamurthy Venkataramana , Mihir Shah
发明人： Zohar Bogin , Arthur Hunter , Krishnamurthy Venkataramana , Mihir Shah
IPC分类号： G05B11/01 , G10L19/14
CPC分类号： G10L19/167
摘要： Machine-readable media, methods, and apparatus are described to pace commands to codecs. Some embodiments comprise an audio controller that transfers frames to codecs and places commands in the frames at a pace dictated by a command pacer.
摘要翻译：描述了机器可读介质，方法和装置，以将命令调整到编解码器。一些实施例包括音频控制器，该音频控制器将帧传送到编解码器，并以由命令起搏器指示的速度将命令放置在帧中。

15. 发明申请

US20050114569A1 Tracking progress of data streamer 有权
标题翻译：跟踪数据流的进度
公开(公告)号：US20050114569A1
公开(公告)日：2005-05-26
申请号：US10723347
申请日：2003-11-25
申请人： Zohar Bogin , Brent Chartrand , Arthur Hunter
发明人： Zohar Bogin , Brent Chartrand , Arthur Hunter
IPC分类号： G06F13/16 , G06F13/28 , G06F13/00
CPC分类号： G06F13/28
摘要： Machine-readable media, methods, and apparatus are described to stream data between a codec and a buffer in system memory and to maintain a value in system memory that is indicative of a current position in the buffer. In some embodiments, an audio controller streams the data across an isochronous channel having relaxed ordering rules to the buffer in the system memory and updates the value indicative of current position via a write across the isochronous channel to the system memory.
摘要翻译：描述了机器可读介质，方法和装置，以在系统存储器中的编解码器和缓冲器之间流式传输数据，并维持指示缓冲器中当前位置的系统存储器中的值。在一些实施例中，音频控制器通过具有放松排序规则的同步信道将数据流传输到系统存储器中的缓冲器，并且通过跨同步信道的写入更新指示当前位置的值到系统存储器。

16. 发明授权

US06502150B1 Method and apparatus for resource sharing in a multi-processor system 失效
标题翻译：多处理器系统资源共享的方法和装置
公开(公告)号：US06502150B1
公开(公告)日：2002-12-31
申请号：US09205649
申请日：1998-12-03
申请人： Zohar Bogin , Narendra S. Khandekar , Steve J. Clohset
发明人： Zohar Bogin , Narendra S. Khandekar , Steve J. Clohset
IPC分类号： G06F1300
CPC分类号： G06F13/364
摘要： A computer system that includes at least two host agents is provided. The computer system further includes a chipset that includes a resource to be shared by the at least two host agents. The chipset is coupled to the-at least two host agents. The chipset prevents a first host agent, that occupies the shared resource to access the shared resource until a second host agent, has made progress in accessing said shared resource.
摘要翻译：提供了包括至少两个主机代理的计算机系统。计算机系统还包括芯片组，其包括要由至少两个主机代理共享的资源。芯片组耦合到至少两个主机代理。芯片组防止占用共享资源的第一主机代理访问共享资源，直到第二个主机代理在访问所述共享资源时取得进展。

17. 发明授权

US5533200A Method and apparatus for transmission of signals over a shared line 失效
标题翻译：用于在共享线路上传输信号的方法和装置
公开(公告)号：US5533200A
公开(公告)日：1996-07-02
申请号：US210560
申请日：1994-03-18
申请人： Timothy M. Dobbins , Zohar Bogin
发明人： Timothy M. Dobbins , Zohar Bogin
IPC分类号： G06F13/36 , G06F1/22 , G06F13/00 , G06F13/364
CPC分类号： G06F13/364 , G06F1/22
摘要： A semiconductor component is which is capable of controlling transmission of information between a plurality of semiconductor components in a computer system. The semiconductor component comprises of a first signal generator capable of sending a signal of a first type over a shared line and a second signal generator capable of sending a signal of a second type over the line. It also comprises of a first logic device capable of controlling the first signal generator and a second logic device capable of controlling the second signal generator.
摘要翻译：半导体部件能够控制计算机系统中的多个半导体部件之间的信息传输。半导体部件包括能够通过共享线路发送第一类型的信号的第一信号发生器和能够在线路上发送第二类型的信号的第二信号发生器。它还包括能够控制第一信号发生器的第一逻辑器件和能够控制第二信号发生器的第二逻辑器件。

18. 发明授权

US09100693B2 Methods and apparatuses for securing playback content 有权
标题翻译：保护播放内容的方法和装置
公开(公告)号：US09100693B2
公开(公告)日：2015-08-04
申请号：US12796502
申请日：2010-06-08
申请人： Balaji Vembu , Suryaprasad Kareenahalli , Daniel Nemiroff , Zohar Bogin , Raul Gutierrez
发明人： Balaji Vembu , Suryaprasad Kareenahalli , Daniel Nemiroff , Zohar Bogin , Raul Gutierrez
IPC分类号： H04L29/06 , H04N21/4405 , H04N21/426 , H04N21/4408 , G06F21/10
CPC分类号： H04N21/4405 , G06F21/10 , H04N21/4181 , H04N21/42623 , H04N21/4408
摘要： An apparatus for secured playback is presented. In one embodiment, the apparatus includes a controller that includes a key derivation module to manage authentication and key derivation. In one embodiment, the apparatus provides a video decryption key to a graphics engine if video data portions in a data stream are retrievable without having to decrypt the data stream. In one embodiment, the apparatus also includes a decryption module to decrypt a part of data in conjunction with an encryption key to generate video information and video data. The controller then writes an encrypted version of the video data to a video buffer of a graphics engine.
摘要翻译：提出了一种用于安全播放的设备。在一个实施例中，该装置包括控制器，其包括用于管理认证和密钥推导的密钥导出模块。在一个实施例中，如果可以检索数据流中的视频数据部分而不必对数据流进行解密，则该装置向图形引擎提供视频解密密钥。在一个实施例中，该装置还包括解密模块，用于结合加密密钥对一部分数据进行解密以产生视频信息和视频数据。然后，控制器将视频数据的加密版本写入图形引擎的视频缓冲器。

19. 发明申请

US20100169883A1 PROVIDING MULTIPLE VIRTUAL DEVICE CONTROLLERS BY REDIRECTING AN INTERRUPT FROM A PHYSICAL DEVICE CONTROLLER 有权
标题翻译：通过重定向物理设备控制器的中断来提供多个虚拟设备控制器
公开(公告)号：US20100169883A1
公开(公告)日：2010-07-01
申请号：US12347970
申请日：2008-12-31
申请人： Zohar Bogin , Suryaprasad Kareenahaili , Rajeev K. Nalawadi , Michael Tabet , Darren Abramson
发明人： Zohar Bogin , Suryaprasad Kareenahaili , Rajeev K. Nalawadi , Michael Tabet , Darren Abramson
IPC分类号： G06F9/455
CPC分类号： G06F13/24 , G06F9/45533 , G06F9/45558 , G06F9/4812
摘要： Embodiments of apparatuses, methods, and systems for providing multiple virtual device controllers by redirecting an interrupt from a physical device controller are disclosed. In one embodiment, an apparatus includes a processor, a physical device controller, and virtualization logic. The virtualization logic is to receive a first interrupt from the physical device controller, and in response, send a second interrupt to the processor from one of a plurality of virtual device controllers.
摘要翻译：公开了通过从物理设备控制器重定向中断来提供多个虚拟设备控制器的设备，方法和系统的实施例。在一个实施例中，装置包括处理器，物理设备控制器和虚拟化逻辑。虚拟化逻辑是从物理设备控制器接收第一中断，并且作为响应，从多个虚拟设备控制器之一向处理器发送第二中断。

20. 发明授权

US07612780B2 Optimized memory addressing 有权
标题翻译：优化的内存寻址
公开(公告)号：US07612780B2
公开(公告)日：2009-11-03
申请号：US11784342
申请日：2007-04-06
申请人： David E Freker , Aditya Sreenivas , Zohar Bogin , Anoop Mukker , Tuong Trieu
发明人： David E Freker , Aditya Sreenivas , Zohar Bogin , Anoop Mukker , Tuong Trieu
IPC分类号： G09G5/399 , G06F13/00 , G09G5/39
CPC分类号： G06F13/1684
摘要： Embodiments of the present invention relate to accessing a first pair of adjacent data blocks using a first channel of a dual channel memory device; and simultaneously accessing a second pair of adjacent data blocks using a second channel of the memory device, the second pair being spaced apart from the first pair by a predetermined interval.
摘要翻译：本发明的实施例涉及使用双通道存储器件的第一通道访问第一对相邻数据块; 并且使用所述存储器件的第二通道同时访问第二对相邻数据块，所述第二对与所述第一对间隔开预定间隔。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式