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    • 11. 发明授权
    • Voltage providing circuit
    • 电压提供电路
    • US07400188B2
    • 2008-07-15
    • US11365640
    • 2006-02-28
    • Yong-Zhao HuangYun Li
    • Yong-Zhao HuangYun Li
    • G05F1/10H03L7/00
    • G11C5/14
    • A voltage providing circuit includes a protective circuit and a power supply circuit. The protective circuit includes a first transistor. A first control signal is input to a collector of the first transistor, a second control signal is input to a base of the first transistor, an emitter of the first transistor is grounded. The collector of the first transistor is connected to the power supply circuit. The second control signal and the first control signal jointly control the power supply circuit to be turned on or turned off. When the second control signal is at a low level, the first transistor is turned off and the power supply circuit is turned off. When the second control signal is at a high level, the first transistor is turned on and the power supply circuit is turned on. Thus, the providing circuit can prevent the electronic component from being damaged when a computer is restarted.
    • 电压提供电路包括保护电路和电源电路。 保护电路包括第一晶体管。 第一控制信号被输入到第一晶体管的集电极,第二控制信号被输入到第一晶体管的基极,第一晶体管的发射极接地。 第一晶体管的集电极连接到电源电路。 第二控制信号和第一控制信号共同控制电源电路被接通或断开。 当第二控制信号为低电平时,第一晶体管截止,电源电路断开。 当第二控制信号为高电平时,第一晶体管导通,电源电路接通。 因此,当计算机重启时,提供电路可以防止电子部件损坏。
    • 12. 发明授权
    • System and method for designing a delayer emulation model
    • 用于设计延迟器仿真模型的系统和方法
    • US07356794B2
    • 2008-04-08
    • US11285661
    • 2005-11-21
    • Wu JiangYun Li
    • Wu JiangYun Li
    • G06F17/50
    • G06F17/5045
    • A system for designing a delayer emulation model (1) includes a delayer emulation model generating apparatus (2). The delay emulation model generating apparatus includes: a delay circuit defining module (20) for defining delay parameters of a delay circuit, and generating the delay circuit; a delay signal setting module (21) for setting a delay interval for the transition from a high voltage to a low voltage and a delay interval for the transition from a low voltage to a high voltage of an input delay signal; a voltage regulation circuit defining module (22) for defining voltage parameters of a voltage regulation circuit, and generating the voltage regulation circuit; a voltage regulating module (23) for regulating a voltage of the input delay signal from the delay circuit according to requirements of an output delay signal; and a model calling module (24) for generating the delayer emulation model by means of calling the delay circuit and the voltage regulation circuit.
    • 一种用于设计延迟器仿真模型(1)的系统包括延迟器仿真模型生成装置(2)。 延迟仿真模型生成装置包括:延迟电路定义模块,用于定义延迟电路的延迟参数,并产生延迟电路; 延迟信号设定模块(21),用于设定从高压到低电压的转变的延迟间隔和用于从输入延迟信号的低电压转换到高电压的延迟间隔; 电压调节电路限定模块(22),用于定义电压调节电路的电压参数,并产生电压调节电路; 电压调节模块(23),用于根据输出延迟信号的要求调节来自延迟电路的输入延迟信号的电压; 以及用于通过调用延迟电路和电压调节电路产生延迟器仿真模型的模型调用模块(24)。
    • 15. 发明申请
    • Supply voltage switching circuit
    • 电源电压开关电路
    • US20060132199A1
    • 2006-06-22
    • US11300760
    • 2005-12-15
    • Wu JiangYong-Zhao HuangYun Li
    • Wu JiangYong-Zhao HuangYun Li
    • H03B1/00
    • H03K17/162Y10T307/62Y10T307/696Y10T307/724
    • A supply voltage switching circuit for a computer includes a chipset, a first transistor, a second transistor, and a third transistor. The chipset includes a first MOSFET and a second MOSFET. A 5V system voltage and a 5V standby voltage are respectively inputted to sources of the first MOSFET and the second MOSFET. Gates of the first MOSFET and the second MOSFET are respectively coupled to collectors of the second transistor and the third transistor. A base of the first transistor is coupled to a terminal for receiving a control signal from the computer. The 5V standby voltage is inputted to a collector of the first transistor. Bases of the second transistor and the third transistor are coupled to the collector of the first transistor. A 12V system voltage and the 5V standby voltage are respectively inputted to collectors of the second transistor and the third transistor.
    • 用于计算机的电源电压切换电路包括芯片组,第一晶体管,第二晶体管和第三晶体管。 该芯片组包括第一MOSFET和第二MOSFET。 5V系统电压和5V待机电压分别输入到第一MOSFET和第二MOSFET的源极。 第一MOSFET和第二MOSFET的栅极分别耦合到第二晶体管和第三晶体管的集电极。 第一晶体管的基极耦合到用于从计算机接收控制信号的端子。 5V待机电压被输入到第一晶体管的集电极。 第二晶体管和第三晶体管的基极耦合到第一晶体管的集电极。 12V系统电压和5V待机电压分别输入到第二晶体管和第三晶体管的集电极。
    • 16. 发明申请
    • System and method for designing a delayer emulation model
    • 用于设计延迟器仿真模型的系统和方法
    • US20060112358A1
    • 2006-05-25
    • US11285661
    • 2005-11-21
    • Wu JiangYun Li
    • Wu JiangYun Li
    • G06F17/50G06F9/455
    • G06F17/5045
    • A system for designing a delayer emulation model (1) includes a delayer emulation model generating apparatus (2). The delay emulation model generating apparatus includes: a delay circuit defining module (20) for defining delay parameters of a delay circuit, and generating the delay circuit; a delay signal setting module (21) for setting a delay interval for the transition from a high voltage to a low voltage and a delay interval for the transition from a low voltage to a high voltage of an input delay signal; a voltage regulation circuit defining module (22) for defining voltage parameters of a voltage regulation circuit, and generating the voltage regulation circuit; a voltage regulating module (23) for regulating a voltage of the input delay signal from the delay circuit according to requirements of an output delay signal; and a model calling module (24) for generating the delayer emulation model by means of calling the delay circuit and the voltage regulation circuit.
    • 一种用于设计延迟器仿真模型(1)的系统包括延迟器仿真模型生成装置(2)。 延迟仿真模型生成装置包括:延迟电路定义模块,用于定义延迟电路的延迟参数,并产生延迟电路; 延迟信号设定模块(21),用于设定从高压到低电压的转变的延迟间隔和用于从输入延迟信号的低电压转换到高电压的延迟间隔; 电压调节电路限定模块(22),用于定义电压调节电路的电压参数,并产生电压调节电路; 电压调节模块(23),用于根据输出延迟信号的要求调节来自延迟电路的输入延迟信号的电压; 以及用于通过调用延迟电路和电压调节电路产生延迟器仿真模型的模型调用模块(24)。