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11. 发明申请

US20140056175A1 INTEGRATED DEVICE MANAGMENT OVER ETHERNET NETWORK 有权
标题翻译：以太网网络中的集成设备管理
公开(公告)号：US20140056175A1
公开(公告)日：2014-02-27
申请号：US14071231
申请日：2013-11-04
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Alexander P. Campbell , Keshav G. Kamble , Vijoy A. Pandey
IPC分类号： H04L12/24
CPC分类号： H04L41/0803 , H04L12/56 , H04L49/15 , H04L49/351 , H04L49/65
摘要： A clustered network may include a plurality of switch boxes where a master switch box may communicate and control hardware devices in remote switch boxes. The switch boxes in the network may each include a multiplexer, for example, a field programmable array (FPGA) that may process message requests related to hardware devices of a switch box. If the hardware device is in a remote switch box, then the FPGA of the master switch box may process the status data from the remote switch box so that a local processor in the master switch box can read the status data.
摘要翻译：集群网络可以包括多个开关盒，其中主开关盒可以在远程开关盒中通信和控制硬件设备。网络中的开关盒可以各自包括多路复用器，例如可以处理与开关盒的硬件设备相关的消息请求的现场可编程阵列（FPGA）。如果硬件设备位于远程开关盒中，则主开关盒的FPGA可以处理来自远程开关盒的状态数据，以便主开关盒中的本地处理器可以读取状态数据。

12. 发明申请

US20160188516A1 PASS-THROUGH CONVERGED NETWORK ADAPTOR (CNA) USING EXISTING ETHERNET SWITCHING DEVICE 有权
标题翻译：通过使用现有以太网交换设备的通用转换网络适配器（CNA）
公开(公告)号：US20160188516A1
公开(公告)日：2016-06-30
申请号：US15060522
申请日：2016-03-03
申请人： International Business Machines Corporation
发明人： Alexander P. Campbell , David Iles , Keshav G. Kamble , Dar-Ren Leu , Vijoy A. Pandey
IPC分类号： G06F13/40 , G06F13/28 , G06F13/38 , G06F13/42
CPC分类号： G06F13/4022 , G06F13/20 , G06F13/28 , G06F13/385 , G06F13/4282
摘要： According to one embodiment, a method includes performing functionality of a management plane and a control plane for a switch system using a processor of an external host coupled to the switch system via one or more peripheral component interconnect express (PCIe) ports. The method also includes providing a direct memory access (DMA) facility between the external host and switching logic of the switch system. The switch system includes a PCIe interface block coupled to PCIe ports configured to couple to external PCIe devices. Also, the PCIe interface block includes logic configured to provide DMA for each PCIe lane thereof. The switch system also includes multiple switched Ethernet ports configured to couple to one or more external Ethernet devices and switching logic configured to switch between the multiple switched Ethernet ports and the PCIe ports using DMA and a local processor coupled to the PCIe interface block.
摘要翻译：根据一个实施例，一种方法包括使用经由一个或多个外围组件互连快速（PCIe）端口耦合到交换机系统的外部主机的处理器来执行交换机系统的管理平面和控制平面的功能。该方法还包括在外部主机和交换机系统的交换逻辑之间提供直接存储器访问（DMA）设施。交换机系统包括耦合到被配置为耦合到外部PCIe设备的PCIe端口的PCIe接口块。而且，PCIe接口块包括被配置为为其每个PCIe通道提供DMA的逻辑。交换机系统还包括配置成耦合到一个或多个外部以太网设备的多个交换以太网端口，以及被配置为使用DMA和耦合到PCIe接口块的本地处理器在多个交换以太网端口和PCIe端口之间切换的交换逻辑。

13. 发明申请

US20160154766A1 PROVIDING I2C BUS OVER ETHERNET 有权
标题翻译：在以太网上提供I2C总线
公开(公告)号：US20160154766A1
公开(公告)日：2016-06-02
申请号：US15003751
申请日：2016-01-21
申请人： International Business Machines Corporation
发明人： Alexander P. Campbell , Keshav G. Kamble , Vijoy A. Pandey
IPC分类号： G06F13/42 , G06F13/40
CPC分类号： G06F13/4282 , G06F13/24 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F21/85 , G06F2213/2424 , H04L12/4633 , H04L12/4641 , H04L45/44 , H04L49/351 , H04L63/08 , H04L63/162
摘要： In one embodiment, a method includes receiving a request from a remote distributed fabric protocol (DFP) system master, using a dedicated processor of a DFP system member, to register local I2C devices on the DFP system member, and sending an acknowledgement including a list of local I2C bus devices back to the DFP system master using the dedicated processor of the DFP system member. The acknowledgement present on the DFP system member. In another embodiment, a system includes a local processor, one or more local I2C bus devices, and a dedicated processor electrically coupled to the local I2C bus devices. The dedicated processor is configured to route interrupts from the local I2C bus devices to the local processor, and expose the local I2C devices to a remote DFP system master by sending details of the local I2C bus devices to the remote DFP system master.
摘要翻译：在一个实施例中，一种方法包括使用DFP系统成员的专用处理器从远程分布式结构协议（DFP）系统主机接收请求，以在DFP系统成员上注册本地I2C设备，以及发送包括列表的确认的本地I2C总线设备使用DFP系统成员的专用处理器返回到DFP系统主站。 DFP系统成员上的确认。在另一个实施例中，系统包括本地处理器，一个或多个本地I2C总线设备和电耦合到本地I2C总线设备的专用处理器。专用处理器配置为将中断从本地I2C总线设备传送到本地处理器，并通过将本地I2C总线设备的详细信息发送到远程DFP系统主站，将本地I2C设备公开到远程DFP系统主站。

14. 发明申请

US20150139246A1 PROVIDING REAL-TIME INTERRUPTS OVER ETHERNET 有权
标题翻译：提供以太网上的实时中断
公开(公告)号：US20150139246A1
公开(公告)日：2015-05-21
申请号：US14606966
申请日：2015-01-27
申请人： International Business Machines Corporation
发明人： Alexander P. Campbell , Keshav G. Kamble , Vijoy A. Pandey
IPC分类号： H04L12/931 , H04L12/46 , H04L12/721
CPC分类号： H04L49/351 , G06F13/24 , G06F13/32 , H04L12/4633 , H04L45/44 , H04L49/35 , H04L49/70
摘要： In one embodiment, a method includes sending a request to one or more distributed fabric protocol (DFP) system members in order to retrieve one or more events from the one or more DFP system members, receiving one or more acknowledgements to the request from the one or more DFP system members at a local network switch of a DFP system master, upon receipt of at least one packet in which the one or more events are encapsulated as data: decoding the at least one packet to retrieve details of the one or more events using a dedicated processor of the DFP system master, creating and sending a message signaled interrupt (MSI) comprising the details of the one or more events to a local processor of the DFP system master using the dedicated processor, and reading the MSI using the local processor of the DFP system master.
摘要翻译：在一个实施例中，一种方法包括向一个或多个分布式结构协议（DFP）系统成员发送请求，以从一个或多个DFP系统成员检索一个或多个事件，从该一个或多个DFP系统成员接收对该请求的一个或多个确认在DFP系统主设备的本地网络交换机上接收到至少一个分组，其中所述一个或多个事件被封装为数据：解码所述至少一个分组以检索所述一个或多个事件的细节使用DFP系统主站的专用处理器，使用专用处理器创建和发送包含一个或多个事件的详细信息的消息信号中断（MSI）到DFP系统主站的本地处理器，并使用本地处理器的DFP系统主控。

15. 发明申请

US20140198638A1 LOW-LATENCY LOSSLESS SWITCH FABRIC FOR USE IN A DATA CENTER 有权
标题翻译：低数据无缝开关织物用于数据中心
公开(公告)号：US20140198638A1
公开(公告)日：2014-07-17
申请号：US13741346
申请日：2013-01-14
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Alexander P. Campbell , Keshav G. Kamble , Vijoy A. Pandey
IPC分类号： H04L12/56
CPC分类号： H04L47/122 , H04L47/12 , H04L47/20 , H04L47/32 , H04L49/206 , H04L49/25 , H04L49/50
摘要： In one embodiment, a system includes a switch configured for communicating with a low-latency switch and a buffered switch, the switch having a processor adapted for executing logic, logic adapted for receiving a packet at an ingress port of a switch, logic adapted for receiving congestion information, logic adapted for determining that at least one congestion condition is net based on at least the congestion information, logic adapted for applying a packet forwarding policy to the packet when the at least one congestion condition is met, logic adapted for forwarding the packet to a buffered switch when the packet satisfies the packet forwarding policy, and logic adapted for forwarding the packet to a low-latency switch when the at least one congestion condition is not met.
摘要翻译：在一个实施例中，系统包括被配置为与低延迟交换机和缓冲交换机通信的交换机，该交换机具有适于执行逻辑的处理器，适于在交换机的入口处接收分组的逻辑，适于接收拥塞信息，适于基于至少所述拥塞信息来确定至少一个拥塞状况为网络的逻辑;适于在满足所述至少一个拥塞状况时将分组转发策略应用于所述分组的逻辑的逻辑，适于转发所述拥塞信息的逻辑当分组满足分组转发策略时，分组到缓冲交换机，以及适于在不满足至少一个拥塞状况时将分组转发到低延迟交换机的逻辑。

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