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11. 发明申请

US20110022921A1 COMPACT DECODING OF PUNCTURED BLOCK CODES 有权
标题翻译：冲击块编码的紧凑解码
公开(公告)号：US20110022921A1
公开(公告)日：2011-01-27
申请号：US12506327
申请日：2009-07-21
申请人： Eran SHARON , Idan ALROD , Simon LITSYN
发明人： Eran SHARON , Idan ALROD , Simon LITSYN
IPC分类号： H03M13/05 , G06F11/10
CPC分类号： H03M13/6362 , G06F11/1068 , H03M13/1111 , H03M13/15
摘要： k input bits are encoded according to a code with which is associated a m×n=m+k parity check matrix H. The resulting codeword is punctured, with n′
摘要翻译： k个输入位根据与m×n = m + k个奇偶校验矩阵H相关联的代码进行编码。所得码字被打孔，n'

12. 发明申请

US20100082885A1 METHOD AND SYSTEM FOR ADAPTIVE CODING IN FLASH MEMORIES 失效
标题翻译：闪存中自适应编码的方法和系统
公开(公告)号：US20100082885A1
公开(公告)日：2010-04-01
申请号：US12567771
申请日：2009-09-27
申请人： Simon LITSYN , Eran SHARON , Idan ALROD , Menahem LASSER
发明人： Simon LITSYN , Eran SHARON , Idan ALROD , Menahem LASSER
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G11C16/3404 , G06F11/1072 , G11C7/1006 , G11C11/5628 , G11C29/00 , G11C2211/5641
摘要： Bits are stored by attempting to set parameter value(s) of (a) cell(s) to represent some of the bits. In accordance with the attempt, an adaptive mapping of the bits to value ranges is provided and the value(s) is/are adjusted accordingly as needed. Or, to store (a) bit(s) in (a) cell(s), a default mapping of the bit(s) to a predetermined set of value ranges is provided and an attempt is made to set the cell value(s) accordingly. If, for one of the cells, the attempt sets the value such that the desired range is inaccessible, an adaptive mapping is provided such that the desired range is accessible. Or, to store (a) bit(s) in (a) cell(s), several mappings of the bit(s) to a predetermined set of ranges is provided. Responsive to an attempt to set the cell value(s) according to one of the mappings, the mapping to actually use is selected.
摘要翻译：通过尝试设置（a）单元的参数值来表示某些位来存储位。根据该尝试，提供了比特到值范围的自适应映射，并且根据需要相应地调整该值。或者，为了将（a）位（a）存储在（a）单元中，提供了该位的默认映射到预定的一组值范围，并尝试设置单元值（s ）。如果对于其中一个小区，尝试将值设置为使得期望的范围不可访问，则提供自适应映射，使得期望的范围是可访问的。或者，为了将（a）位（a）存储在（a）单元中，提供了该位的几个映射到预定的范围集合。响应于根据映射之一设置单元格值，选择实际使用的映射。

13. 发明申请

US20090319860A1 OVERCOMING LDPC TRAPPING SETS BY DECODER RESET 审中-公开
标题翻译：通过解码器复位来覆盖LDPC陷波器
公开(公告)号：US20090319860A1
公开(公告)日：2009-12-24
申请号：US12469790
申请日：2009-05-21
申请人： Eran SHARON , Idan ALROD , Simon LITSYN
发明人： Eran SHARON , Idan ALROD , Simon LITSYN
IPC分类号： H03M13/00 , G06F12/02 , G06F12/00
CPC分类号： H03M13/1131 , H03M13/1111 , H03M13/2951 , H03M13/3738
摘要： To decode, in a plurality of iterations, a representation, imported from a channel, of a codeword that encodes K information bits as N>K codeword bits, estimates of the codeword bits are updated by exchanging messages between N bit nodes and N−K check nodes of a graph. If the decoding has failed to converge according to a predetermined failure criterion and if the codeword bit estimates satisfy a criterion symptomatic of the graph including a trapping set, at least a portion of the messages are reset before continuing the iterations. Alternatively, if the decoding fails to converge according to a predetermined failure criterion, at least a portion of the messages that are sent from the bit nodes are truncated before continuing the iterations.
摘要翻译：为了在多个迭代中将从信道导入的代码字解码为将K个信息比特编码为N> K个码字比特的码字，通过在N个比特节点和NK个检查节点之间交换消息来更新码字比特的估计的图表。如果解码未能根据预定的故障准则收敛，并且如果码字比特估计满足包括陷印集的图形的症状的标准，则在继续迭代之前，至少部分消息被重置。或者，如果解码根据预定的故障准则不能收敛，则在继续迭代之前，将从比特节点发送的消息的至少一部分截断。

14. 发明申请

US20130294157A1 READING DATA FROM MULTI-LEVEL CELL MEMORY 有权
标题翻译：从多级单元读取数据
公开(公告)号：US20130294157A1
公开(公告)日：2013-11-07
申请号：US13465308
申请日：2012-05-07
申请人： Eran SHARON , Idan ALROD
发明人： Eran SHARON , Idan ALROD
IPC分类号： G11C16/26
CPC分类号： G06F11/1072 , G11C11/5642 , G11C11/5671
摘要： A method at a data storage device includes determining a first hard bit of a first logical page, the first hard bit corresponding to a particular cell of the MLC memory. A second hard bit of a second logical page is sensed. The second hard bit corresponds to the particular cell. The first hard bit is used as a soft bit of the second logical page to provide reliability information during a decode operation of the second logical page.
摘要翻译：数据存储设备的方法包括确定第一逻辑页的第一硬比特，对应于MLC存储器的特定单元的第一硬比特。感测到第二个逻辑页面的第二个硬位。第二个硬比特对应于特定的小区。第一硬比特用作第二逻辑页的软比特，以在第二逻辑页的解码操作期间提供可靠性信息。

15. 发明申请

US20120224421A1 SYSTEM AND METHOD OF DECODING DATA FROM MEMORY BASED ON SENSING INFORMATION AND DECODED DATA OF NEIGHBORING STORAGE ELEMENTS 有权
标题翻译：基于感知信息记录数据和相邻存储元素解码数据的系统和方法
公开(公告)号：US20120224421A1
公开(公告)日：2012-09-06
申请号：US13401038
申请日：2012-02-21
申请人： Simon LITSYN , Idan ALROD , Eran SHARON
发明人： Simon LITSYN , Idan ALROD , Eran SHARON
IPC分类号： G11C16/08
CPC分类号： G11C16/08 , G11C16/349
摘要： Systems and methods to decode data stored in a data storage device are disclosed. Data bits stored in a first group of storage elements are decoded using data in a second group of storage elements together with physical characteristics of the second group of storage elements to aid in the decoding of the first group of storage elements.
摘要翻译：公开了对存储在数据存储装置中的数据进行解码的系统和方法。存储在第一组存储元件中的数据位使用第二组存储元件中的数据以及第二组存储元件的物理特性来解码，以帮助解码第一组存储元件。

16. 发明申请

US20110305080A1 Post-Facto Correction for Cross Coupling in a Flash Memory 有权
标题翻译：闪存中交叉耦合的事后修正
公开(公告)号：US20110305080A1
公开(公告)日：2011-12-15
申请号：US13183341
申请日：2011-07-14
申请人： Idan ALROD , Eran SHARON
发明人： Idan ALROD , Eran SHARON
IPC分类号： G11C16/04
CPC分类号： G11C11/5642 , G11C16/3418 , G11C2211/5634
摘要： A method of storing and reading data, using a memory that includes a plurality of cells (e.g. flash cells), such that data are stored in the cells by setting respective values of a physical parameter of the cells (e.g. threshold voltage) to be indicative of the data, and such that data are read from the cells by measuring those values. One of the cells and its neighbors are read. The data stored in the cell are estimated, based on the measurements and on respective extents to which the neighbors disturb the reading. Preferably, the method also includes determining those respective extents to which the neighbors disturb the reading, for example based on the measurements themselves.
摘要翻译：一种使用包括多个单元（例如闪存单元）的存储器来存储和读取数据的方法，使得通过将单元的物理参数（例如阈值电压）的相应值设置为指示来存储在单元中的数据的数据，并且通过测量这些值从单元读取数据。读取其中一个单元及其邻居。存储在单元中的数据基于测量以及相邻的干扰读数的相应范围来估计。优选地，该方法还包括例如基于测量本身来确定邻近者对其进行干扰的相应范围。

17. 发明申请

US20110264981A1 ERROR CORRECTION DECODING BY TRIAL AND ERROR 审中-公开
标题翻译：错误修正通过尝试和错误解码
公开(公告)号：US20110264981A1
公开(公告)日：2011-10-27
申请号：US13176758
申请日：2011-07-06
申请人： Idan ALROD , Eran SHARON , Simon LITSYN
发明人： Idan ALROD , Eran SHARON , Simon LITSYN
IPC分类号： H03M13/05 , G06F11/10
CPC分类号： H03M13/3738 , H03M13/3707 , H03M13/6502 , H03M13/6511
摘要： A representation of a codeword is decoded by applying a first decoder of the codeword to the representation of the codeword. If applying the first decoder fails to decode the representation of the codeword then a second decoder of the codeword is applied to the representation of the codeword. Preferably, applying the first decoder consumes less power and is faster than applying the second decoder. Data are ported by encoding the data as a codeword, exporting the codeword to a corrupting medium, importing a representation of the codeword, and applying a first decoder to the representation of the codeword. If applying the first decoder fails to decode the representation of the codeword then a second decoder of the codeword is applied to the representation of the codeword.
摘要翻译：通过将码字的第一解码器应用于码字的表示来解码码字的表示。如果应用第一解码器不能解码码字的表示，则码字的第二解码器被应用于码字的表示。优选地，应用第一解码器消耗较少的功率并且比应用第二解码器更快。数据通过将数据编码为码字来移植，将码字导出到破坏性介质，导入码字的表示，以及将第一解码器应用于码字的表示。如果应用第一解码器不能解码码字的表示，则码字的第二解码器被应用于码字的表示。

18. 发明申请

US20110093652A1 MULTI-BIT-PER-CELL FLASH MEMORY DEVICE WITH NON-BIJECTIVE MAPPING 有权
标题翻译：具有非定向映射的多位单元闪速存储器件
公开(公告)号：US20110093652A1
公开(公告)日：2011-04-21
申请号：US12977097
申请日：2010-12-23
申请人： Eran SHARON , Idan ALROD
发明人： Eran SHARON , Idan ALROD
IPC分类号： G06F12/00 , G11C16/04
CPC分类号： G06F11/1072 , G11C7/1006 , G11C11/5628 , G11C16/10 , G11C16/34 , G11C29/24 , G11C2211/5641
摘要： To store input data in a plurality of memory cells, a mapping function of bit sequences to physical parameter states of the cells is provided. The cells are programmed, in accordance with the mapping function, to store the input data, in a way that would store uniformly distributed data with a programming state distribution other than any native state distribution of the mapping function. To store input data in a single memory cell, a mapping function of bit sequences to states of a physical parameter of the cell, such that if uniformly distributed data were stored in a plurality of such memory cells then the states of the physical parameter of the cells would be distributed non-uniformly, is provided. The memory cell is programmed to store the input data in accordance with the mapping function.
摘要翻译：为了将输入数据存储在多个存储单元中，提供了比特序列到单元的物理参数状态的映射函数。根据映射函数，单元格被编程以存储输入数据，其方式将以除映射函数的任何本机状态分布之外的编程状态分布来存储均匀分布的数据。将输入数据存储在单个存储器单元中，将位序列的映射功能存储到单元的物理参数的状态，使得如果均匀分布的数据被存储在多个这样的存储器单元中，则存储器的物理参数的状态细胞将被分布不均匀。存储单元被编程为根据映射函数存储输入数据。

19. 发明申请

US20110029754A1 MULTI-BIT-PER-CELL FLASH MEMORY DEVICE WITH NON-BIJECTIVE MAPPING 有权
标题翻译：具有非定向映射的多位单元闪速存储器件
公开(公告)号：US20110029754A1
公开(公告)日：2011-02-03
申请号：US12906095
申请日：2010-10-17
申请人： Simon LITSYN , Eran SHARON , Idan ALROD
发明人： Simon LITSYN , Eran SHARON , Idan ALROD
IPC分类号： G06F12/06
CPC分类号： G11C16/10 , G06F11/1072 , G11C7/1006 , G11C11/56 , G11C11/5628 , G11C16/0483 , G11C16/34 , G11C29/42 , G11C2211/5641
摘要： To store a plurality of input bits, the bits are mapped to a corresponding programmed state of one or more memory cells and the cell(s) is/are programmed to that corresponding programmed state. The mapping may be many-to-one or may be an “into” generalized Gray mapping. The cell(s) is/are read to provide a read state value that is transformed into a plurality of output bits, for example by maximum likelihood decoding or by mapping the read state value into a plurality of soft bits and then decoding the soft bits.
摘要翻译：为了存储多个输入位，这些位被映射到一个或多个存储器单元的相应的编程状态，并且单元被编程为相应的编程状态。映射可以是多对一的或者可以是“到”广义灰色映射。读取单元以提供被转换成多个输出位的读取状态值，例如通过最大似然解码或通过将读取状态值映射到多个软比特中，然后解码软比特。

20. 发明申请

US20100192043A1 INTERRUPTION CRITERIA FOR BLOCK DECODING 有权
标题翻译：用于块解码的中断标准
公开(公告)号：US20100192043A1
公开(公告)日：2010-07-29
申请号：US12646995
申请日：2009-12-24
申请人： Idan ALROD , Eran SHARON , Simon LITSYN
发明人： Idan ALROD , Eran SHARON , Simon LITSYN
IPC分类号： H03M13/15 , G06F11/10
CPC分类号： G06F11/10 , H03M13/1111 , H03M13/1131 , H03M13/2951 , H03M13/3738
摘要： While decoding a representation, imported from a channel, of a codeword that encodes K information bits as N>K codeword bits, by updating estimates of the codeword bits in a plurality of iterations, the iterations are interrupted upon satisfaction of an interruption criterion that is either an order-dependent interruption criterion or an interruption criterion that includes an estimate of mutual information of the codeword and a vector that is used in the decoding iterations. Either the iterations are terminated or the iterations are resumed after one or more elements of one or more vectors used in the iterations is/are modified.
摘要翻译：在将通过编码K个信息比特的码字作为N> K个码字比特的码字进行解码时，通过更新多个迭代中的码字比特的估计，在满足中断标准的情况下中断迭代无论是依赖于顺序的中断标准还是包括码字的互信息的估计和在解码迭代中使用的向量的中断标准。在迭代中使用的一个或多个向量的一个或多个元素被修改之后，迭代终止或迭代被恢复。

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