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    • 11. 发明授权
    • Integrated electrostatic discharge (ESD) device
    • 集成静电放电(ESD)器件
    • US08891213B2
    • 2014-11-18
    • US13244292
    • 2011-09-24
    • Chi Kang LiuTa Lee YuQuan Li
    • Chi Kang LiuTa Lee YuQuan Li
    • H02H9/00H01L27/02H01L29/78H02H3/22H02H3/02H02H3/08
    • H01L27/0259H01L29/7835
    • A semiconductor device for ESD protection includes a semiconductor substrate of a first conductivity type and a well region of a second conductivity type formed within the substrate. The well region is characterized by a first depth. The device includes an MOS transistor, a first bipolar transistor, and a second bipolar transistor. The MOS transistor includes a first lightly doped drain (LDD) region of a second depth within the well region, and a drain region and an emitter region within in the first LDD region. The emitter region is characterized by a second conductivity type. The first bipolar transistor is associated with the emitter region, the first LDD region, and the well region, and is characterized by a first trigger voltage. The second bipolar transistor is associated with the first LDD region, the well region, and the substrate, and is characterized by a second trigger voltage.
    • 用于ESD保护的半导体器件包括形成在衬底内的第一导电类型的半导体衬底和第二导电类型的阱区。 井区的特征在于第一深度。 该器件包括MOS晶体管,第一双极晶体管和第二双极晶体管。 MOS晶体管包括在阱区内的第二深度的第一轻掺杂漏极(LDD)区域,以及在第一LDD区域内的漏极区域和发射极区域。 发射极区域的特征在于第二导电类型。 第一双极晶体管与发射极区域,第一LDD区域和阱区域相关联,并且其特征在于第一触发电压。 第二双极晶体管与第一LDD区,阱区和衬底相关联,并且其特征在于第二触发电压。
    • 13. 发明申请
    • INTEGRATED ELECTROSTATIC DISCHARGE (ESD) DEVICE
    • 集成静电放电(ESD)器件
    • US20120014021A1
    • 2012-01-19
    • US13244292
    • 2011-09-24
    • Chi Kang LiuTA Lee YuQuan Li
    • Chi Kang LiuTA Lee YuQuan Li
    • H02H9/04H01L21/332
    • H01L27/0259H01L29/7835
    • A semiconductor device for ESD protection includes a semiconductor substrate of a first conductivity type and a well region of a second conductivity type formed within the substrate. The well region is characterized by a first depth. The device includes an MOS transistor, a first bipolar transistor, and a second bipolar transistor. The MOS transistor includes a first lightly doped drain (LDD) region of a second depth within the well region, and a drain region and an emitter region within in the first LDD region. The emitter region is characterized by a second conductivity type. The first bipolar transistor is associated with the emitter region, the first LDD region, and the well region, and is characterized by a first trigger voltage. The second bipolar transistor is associated with the first LDD region, the well region, and the substrate, and is characterized by a second trigger voltage.
    • 用于ESD保护的半导体器件包括形成在衬底内的第一导电类型的半导体衬底和第二导电类型的阱区。 井区的特征在于第一深度。 该器件包括MOS晶体管,第一双极晶体管和第二双极晶体管。 MOS晶体管包括在阱区内的第二深度的第一轻掺杂漏极(LDD)区域,以及在第一LDD区域内的漏极区域和发射极区域。 发射极区域的特征在于第二导电类型。 第一双极晶体管与发射极区域,第一LDD区域和阱区域相关联,并且其特征在于第一触发电压。 第二双极晶体管与第一LDD区,阱区和衬底相关联,并且其特征在于第二触发电压。
    • 15. 发明申请
    • Touch Sensing Device and Method
    • 触摸感应装置和方法
    • US20100188366A1
    • 2010-07-29
    • US12692309
    • 2010-01-22
    • Chi Kang LiuGuo-Kiang Hung
    • Chi Kang LiuGuo-Kiang Hung
    • G06F3/041
    • G06F3/0416G06F3/044
    • A touch sensing device capable of accurately detecting a touched position on a touch panel includes a touch panel, a conversion unit and a calculation unit. The touch panel having a plurality of horizontal sensing lines and vertical sensing lines generates a plurality of horizontal sensing signals and vertical sensing signals in response to a touch on the touch panel. The conversion unit generates a plurality of two-dimensional (2D) sensing signals according to the horizontal and vertical sensing signals. The calculation unit determines a touched position on the touch panel according to the 2D sensing signals.
    • 能够精确地检测触摸面板上的触摸位置的触摸感测装置包括触摸面板,转换单元和计算单元。 具有多个水平感测线和垂直感测线的触摸面板响应于触摸面板上的触摸而产生多个水平感测信号和垂直感测信号。 转换单元根据水平和垂直感测信号产生多个二维(2D)感测信号。 计算单元根据2D感测信号确定触摸面板上的触摸位置。
    • 16. 发明授权
    • Touch sensing device and method
    • 触摸感应装置及方法
    • US08421765B2
    • 2013-04-16
    • US12692309
    • 2010-01-22
    • Chi Kang LiuGuo-Kiang Hung
    • Chi Kang LiuGuo-Kiang Hung
    • G06F3/041
    • G06F3/0416G06F3/044
    • A touch sensing device capable of accurately detecting a touched position on a touch panel includes a touch panel, a conversion unit and a calculation unit. The touch panel having a plurality of horizontal sensing lines and vertical sensing lines generates a plurality of horizontal sensing signals and vertical sensing signals in response to a touch on the touch panel. The conversion unit generates a plurality of two-dimensional (2D) sensing signals according to the horizontal and vertical sensing signals. The calculation unit determines a touched position on the touch panel according to the 2D sensing signals.
    • 能够精确地检测触摸面板上的触摸位置的触摸感测装置包括触摸面板,转换单元和计算单元。 具有多个水平感测线和垂直感测线的触摸面板响应于触摸面板上的触摸而产生多个水平感测信号和垂直感测信号。 转换单元根据水平和垂直感测信号产生多个二维(2D)感测信号。 计算单元根据2D感测信号确定触摸面板上的触摸位置。
    • 17. 发明授权
    • Integrated electrostatic discharge (ESD) device
    • 集成静电放电(ESD)器件
    • US08053843B2
    • 2011-11-08
    • US12483195
    • 2009-06-11
    • Chi Kang LiuTa Lee YuQuan Li
    • Chi Kang LiuTa Lee YuQuan Li
    • H01L27/06
    • H01L27/0259H01L29/7835
    • A semiconductor device for ESD protection includes a semiconductor substrate of a first conductivity type and a well region of a second conductivity type formed within the substrate. The well region is characterized by a first depth. The device includes an MOS transistor, a first bipolar transistor, and a second bipolar transistor. The MOS transistor includes a first lightly doped drain (LDD) region of a second depth within the well region, and a drain region and an emitter region within in the first LDD region. The emitter region is characterized by a second conductivity type. The first bipolar transistor is associated with the emitter region, the first LDD region, and the well region, and is characterized by a first trigger voltage. The second bipolar transistor is associated with the first LDD region, the well region, and the substrate, and is characterized by a second trigger voltage.
    • 用于ESD保护的半导体器件包括形成在衬底内的第一导电类型的半导体衬底和第二导电类型的阱区。 井区的特征在于第一深度。 该器件包括MOS晶体管,第一双极晶体管和第二双极晶体管。 MOS晶体管包括在阱区内的第二深度的第一轻掺杂漏极(LDD)区域,以及在第一LDD区域内的漏极区域和发射极区域。 发射极区域的特征在于第二导电类型。 第一双极晶体管与发射极区域,第一LDD区域和阱区域相关联,并且其特征在于第一触发电压。 第二双极晶体管与第一LDD区,阱区和衬底相关联,并且其特征在于第二触发电压。
    • 18. 发明授权
    • Integrated electrostatic discharge (ESD) device
    • 集成静电放电(ESD)器件
    • US08817435B2
    • 2014-08-26
    • US13291093
    • 2011-11-07
    • Chi Kang LiuTa Lee YuQuan Li
    • Chi Kang LiuTa Lee YuQuan Li
    • H02H9/00H02H3/20H02H9/04H01L27/088H01L29/76
    • H01L27/0259H01L29/7835
    • A method for making a semiconductor device includes providing a substrate of a first conductivity type and having a surface region, forming a well region of a second conductivity type and having a first depth in the substrate, adding a gate dielectric layer overlying the surface region, adding a gate layer overlying the gate dielectric layer, forming a first LDD region of the first conductivity type and having a second depth within the well region, forming an emitter region of the second conductivity type within the first LDD region, and forming a second LDD region of the first conductivity type with the well region, a channel region separates the first and second LDD regions. The method further includes forming a source region being of the first conductivity type within the second LDD region and adding an output pad coupled to both the drain and emitter regions.
    • 一种制造半导体器件的方法包括提供第一导电类型的衬底,并具有表面区域,形成第二导电类型的阱区域并且在衬底中具有第一深度,添加覆盖在表面区域上的栅极电介质层, 添加覆盖所述栅介质层的栅极层,形成所述第一导电类型的第一LDD区,并且在所述阱区内具有第二深度,在所述第一LDD区内形成所述第二导电类型的发射极区,以及形成第二LDD 具有阱区的第一导电类型的区域,沟道区域分离第一和第二LDD区域。 该方法还包括在第二LDD区域内形成具有第一导电类型的源极区域,并且将耦合到漏极和发射极区域的输出焊盘相加。
    • 19. 发明申请
    • Driving Circuit on LCD Panel and Associated Control Method
    • LCD面板驱动电路及相关控制方法
    • US20100277458A1
    • 2010-11-04
    • US12769901
    • 2010-04-29
    • Chi Kang LiuChin-Wei LinMin-Nan Hsieh
    • Chi Kang LiuChin-Wei LinMin-Nan Hsieh
    • G06F3/038
    • G09G3/3688G09G2330/06
    • A driving circuit on a liquid crystal display (LCD) panel and associated control method is provided. The LCD panel connected to a display control circuit via a flexible print circuit (FPC) includes a master source driver, for outputting a digital image signal in compliance with a first electrical specification via an FPC board and converting the digital image signal to a gate driving signal and a slave source driving signal, which are in compliance with a second electrical specification; a gate driver, for receiving the gate driving signal in compliance with the second electrical specification; and a slave source driver, for receiving the slave source driving signal in compliance with the second electrical specification. The master source driver, the slave source driver and the gate driver drive a thin-film transistor (TFT) on the LCD panel.
    • 提供了液晶显示器(LCD)面板上的驱动电路和相关的控制方法。 通过柔性印刷电路(FPC)连接到显示控制电路的LCD面板包括主源驱动器,用于经由FPC板输出符合第一电气规范的数字图像信号,并将数字图像信号转换为门驱动 信号和从源驱动信号,其符合第二电气规范; 门驱动器,用于接收符合第二电气规范的门驱动信号; 和从源驱动器,用于接收符合第二电气规范的从源驱动信号。 主源驱动器,从源驱动器和栅极驱动器驱动LCD面板上的薄膜晶体管(TFT)。
    • 20. 发明授权
    • Low voltage trigger and save area electrostatic discharge device
    • 低电压触发和保存区域静电放电装置
    • US07265422B2
    • 2007-09-04
    • US11215492
    • 2005-08-29
    • Talee YuChi Kang Liu
    • Talee YuChi Kang Liu
    • H01L23/62
    • H01L27/0259
    • Techniques for ESD protection are provided. An ESD protection device includes a first well region and a second well region disposed in a semiconductor substrate, with an isolation region therebetween. N+ implant regions are disposed in the second well region and are coupled in common at a first node. NLDD regions are disposed between the N+ implant regions, and pocket implants underlie each of the NLDD regions. Current discharge paths are defined by corresponding NLDD regions and pocket implants when a voltage of the first node exceeds a breakdown voltage. In a specific embodiment, the breakdown voltage is less than a breakdown voltage for a logic gate oxide.
    • 提供ESD保护技术。 ESD保护装置包括设置在半导体衬底中的第一阱区和第二阱区,其间具有隔离区。 N +注入区域设置在第二阱区域中并且在第一节点处共同耦合。 NLDD区域设置在N +植入区域之间,并且口袋植入物构成每个NLDD区域的基础。 当第一节点的电压超过击穿电压时,当前的放电路径由相应的NLDD区域和口袋植入物限定。 在具体实施例中,击穿电压小于逻辑栅极氧化物的击穿电压。