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11. 发明授权

US6111833A Data decoder 失效
标题翻译：数据解码器
公开(公告)号：US6111833A
公开(公告)日：2000-08-29
申请号：US930162
申请日：1997-10-03
申请人： Toshiyuki Nakagawa , Hiroyuki Ino , Shunji Yoshimura , Shinichi Kai
发明人： Toshiyuki Nakagawa , Hiroyuki Ino , Shunji Yoshimura , Shinichi Kai
IPC分类号： G11B20/10 , G11B20/14 , G11B20/18 , H03M5/14 , H04L25/49 , G11B7/00
CPC分类号： H04L25/4906 , G11B20/10009 , G11B20/1426 , G11B20/18 , H03M5/145
摘要： In a data decoding apparatus of this invention, level of a reproduction RF signal 7a at the time of the binary level judgment of channel bit is temporarily stored into a RF signal level memory section 20. The portions which do not satisfy the conditions of the minimum run length and the maximum run length of the same symbols within the channel bit data train are respectively detected by a (d'-1) detecting section 16 and a (k'+1) detecting section 17. This data decoding apparatus comprises correction bit position detecting sections 18, 19 for outputting correction bit position designation signals on the basis of level of the RF signal at the time of the binary level judgment stored in the RF signal level memory section 20, and a bit data inversion correcting section 15 for inverting logic level of data at bit position designated on the basis of the correction bit position designation signals 18a, 18b, 19a, 19b. In the case where there exists any portion which does not satisfy the conditions of the minimum run length and/or the maximum run length of the same symbols within channel bit data obtained by binarizing a signal which has been read out from the recording medium, correction is implemented to the channel bit data, thereby making it possible to improve the bit error rate, and to ensure skew margin.
摘要翻译： PCT No.PCT / JP97 / 00336 Sec。 371日期1997年10月3日第 102（e）日期1997年10月3日PCT 1997年2月7日提交PCT公布。 WO97 / 29485 PCT公开号日期：1997年8月14日在本发明的数据解码装置中，通道位的二进制判定时的再现RF信号7a的电平临时存储到RF信号电平存储部20中。不满足的部分信道位数据序列中相同符号的最小游程长度和最大游程长度的条件分别由（d'-1）检测部分16和（k'+ 1）检测部分17检测。该数据解码装置包括校正位位置检测部分18,19，用于根据存储在RF信号电平存储部分20中的二进制电平判断时的RF信号的电平输出校正位位置指定信号，以及位数据反转校正部分15，用于反转基于校正位位置指定信号18a，18b，19a，19b指定的比特位置的数据的逻辑电平。在通过对从记录介质读出的信号进行二值化获得的通道位数据中存在不满足最小游程长度的条件和/或相同符号的最大游程长度的部分的情况下，被实现到通道位数据，从而使得可以提高误码率，并且确保倾斜余量。

12. 发明授权

US6014096A Data decoding method and device 失效
标题翻译：数据解码方法及装置
公开(公告)号：US6014096A
公开(公告)日：2000-01-11
申请号：US947429
申请日：1997-10-08
申请人： Toshiyuki Nakagawa , Hiroyuki Ino , Shunji Yoshimura , Shinichi Kai , Yoshihide Shimpuku , Michihiko Iida , Tetsuji Kawashima , Shoji Sato
发明人： Toshiyuki Nakagawa , Hiroyuki Ino , Shunji Yoshimura , Shinichi Kai , Yoshihide Shimpuku , Michihiko Iida , Tetsuji Kawashima , Shoji Sato
IPC分类号： G11B20/10 , G11B20/14 , H03M7/00 , H03M7/14 , H04L25/49 , H03M5/06 , G11B5/09 , H03M7/46
CPC分类号： G11B20/1426 , G11B20/10009
摘要： If there is any portion in channel bit data obtained on converting a signal read out from a recording medium into a bi-level signal which fails to satisfy a condition concerning a minimum run length or a maximum run length of the same symbol, the channel bit data is corrected to improve the bit error rate to secure a skew margin. To this end, channel bit data not satisfying a minimum run length d' of the same symbol is detected by a (d'-1) detector 4 using n-tupled clocks obtained on n-tupling channel clocks of playback data by a bit clock generator 2, where n is an integer not less than 2. A correction position of the channel bit data having the run length of the same symbol equal to (d'-1) is designated by a correction bit position designating unit 5. A data correction unit 6 then corrects the channel bit data so that the minimum run length of the same symbol will be equal to d'.
摘要翻译：如果在将从记录介质读出的信号转换成不能满足与相同符号的最小游程长度或最大游程长度有关的条件的双电平信号中获得的通道位数据中存在任何部分，则通道位校正数据以提高误码率以确保偏斜裕度。为此，由（d'-1）检测器4检测不满足相同符号的最小游程长度d'的通道位数据，使用通过位时钟在重放数据的n个tupling通道时钟上获得的n个元组时钟发生器2，其中n是不小于2的整数。具有相同符号的游程长度等于（d'-1）的通道位数据的校正位置由校正位位置指定单元5指定。数据校正单元6然后校正通道位数据，使得相同符号的最小游程长度将等于d'。

13. 发明授权

US5400023A Modulating method and demodulating method as well as modulating apparatus and demodulating apparatus 失效
标题翻译：调制方法和解调方法以及调制装置和解调装置
公开(公告)号：US5400023A
公开(公告)日：1995-03-21
申请号：US29133
申请日：1993-03-10
申请人： Hiroyuki Ino , Yoshihide Shimpuku , Yasuyuki Chaki , Toshiyuki Nakagawa
发明人： Hiroyuki Ino , Yoshihide Shimpuku , Yasuyuki Chaki , Toshiyuki Nakagawa
IPC分类号： G11B20/14 , H03M5/14 , H03M7/46
CPC分类号： H03M5/145 , G11B20/1426
摘要： A modulating method and apparatus and a demodulating method and apparatus in which a variable length code (d, k;m, n;r) which can provide a greater minimum reversal distance to allow recording of a higher density than ever is provided. According to the modulating method and apparatus, digital data of a basic data length of m bits is modulated into a variable length code (d, k;m, n;r) of a basic code length of n bits, and where the distance between adjacent ones of the digital data is represented by T, the minimum reversal distance of the variable length code is equal to or greater than 2.0 T and the minimum length of a run of a same symbol is equal to or greater than 4. The demodulating apparatus demodulates the digital data back into the variable length code and comprises storage means for storing therein a plurality of tables for converting the digital data into the variable length code, discriminating means for discriminating the binding length of the digital data, and selecting means for selecting one of the tables in accordance with a result of discrimination of the discriminating means.
摘要翻译：提供了可以提供更大的最小反转距离以允许记录比以往更高密度的可变长度码（d，k; m，n; r）的调制方法和装置以及解调方法和装置。根据调制方法和装置，m比特的基本数据长度的数字数据被调制成n比特的基本码长度的可变长度码（d，k; m，n; r），并且其中数字数据中的相邻数字由T表示，可变长度码的最小反转距离等于或大于2.0T，同一符号的行程的最小长度等于或大于4.解调装置将数字数据解调回可变长度码，并且包括用于在其中存储用于将数字数据转换成可变长度码的多个表的存储装置，用于鉴别数字数据的绑定长度的鉴别装置，以及用于选择一个根据识别装置的辨别结果。

14. 发明授权

US09829208B2 Operating terminal for air conditioner 有权
公开(公告)号：US09829208B2
公开(公告)日：2017-11-28
申请号：US14384742
申请日：2013-01-09
申请人： Hiroyuki Ino , Hidetoshi Muramatsu
发明人： Hiroyuki Ino , Hidetoshi Muramatsu
IPC分类号： G05B21/00 , F24F11/00 , G08C17/02 , G05D23/19
CPC分类号： F24F11/0009 , F24F11/30 , F24F11/56 , G05D23/1917 , G08C17/02
摘要： An operating terminal that is capable of controlling an air conditioner including an indoor device and an outdoor device. The operating terminal includes a display unit that displays at least state information of an air conditioner, a memory that stores therein setting information recorded on an outdoor/indoor control substrate, a communication unit that performs information communication with the indoor device, and an information processing unit that reads setting information set in the outdoor/indoor control substrate through the communication unit, records this setting information 32a in the memory, and causes the display unit to display the setting information.

15. 发明授权

US09325430B2 Communication system and communication apparatus 有权
标题翻译：通信系统和通信设备
公开(公告)号：US09325430B2
公开(公告)日：2016-04-26
申请号：US13177750
申请日：2011-07-07
申请人： Hiroyuki Ino
发明人： Hiroyuki Ino
IPC分类号： H04B13/00 , G06K19/07 , G06K19/067 , A61B5/00 , A61B5/024 , A61B5/0245
CPC分类号： H04B13/005 , A61B5/0024 , A61B5/0028 , A61B5/02438 , A61B5/0245 , A61B2560/0209 , A61B2560/0214 , G06K19/0672 , G06K19/0724 , G06K19/0726
摘要： A communication system includes: an interrogator transmitting an interrogation signal while switching a carrier-wave frequency and receiving a response signal; and a plurality of responders each having a unique resonant frequency and returning the response signal in response to the interrogation signal with the own resonant frequency.
摘要翻译：通信系统包括：询问器，在切换载波频率并接收响应信号的同时发送询问信号; 以及多个响应器，每个响应器具有唯一的谐振频率，并且响应于具有自身谐振频率的询问信号返回响应信号。

16. 发明申请

US20120013446A1 COMMUNICATION SYSTEM AND COMMUNICATION APPARATUS 有权
标题翻译：通信系统和通信设备
公开(公告)号：US20120013446A1
公开(公告)日：2012-01-19
申请号：US13177750
申请日：2011-07-07
申请人： Hiroyuki Ino
发明人： Hiroyuki Ino
IPC分类号： G06K7/01
CPC分类号： H04B13/005 , A61B5/0024 , A61B5/0028 , A61B5/02438 , A61B5/0245 , A61B2560/0209 , A61B2560/0214 , G06K19/0672 , G06K19/0724 , G06K19/0726
摘要： A communication system includes: an interrogator transmitting an interrogation signal while switching a carrier-wave frequency and receiving a response signal; and a plurality of responders each having a unique resonant frequency and returning the response signal in response to the interrogation signal with the own resonant frequency.
摘要翻译：通信系统包括：询问器，在切换载波频率并接收响应信号的同时发送询问信号; 以及多个响应器，每个响应器具有唯一的谐振频率，并且响应于具有自身谐振频率的询问信号返回响应信号。

17. 发明申请

US20100316171A1 DATA PROCESSING APPARATUS AND METHOD, RECEIVING APPARATUS AND METHOD, SYNCHRONOUS DETECTION APPARATUS AND METHOD, AND COMPUTER PROGRAM 失效
标题翻译：数据处理装置和方法，接收装置和方法，同步检测装置和方法以及计算机程序
公开(公告)号：US20100316171A1
公开(公告)日：2010-12-16
申请号：US12779253
申请日：2010-05-13
申请人： Hiroyuki Ino
发明人： Hiroyuki Ino
IPC分类号： H04L27/06 , G06F17/15
CPC分类号： H04L7/042
摘要： A data processing apparatus includes a first correlation operation unit which performs a mutual correlation operation of a first input series and a second input series, a threshold value operation unit which calculates a threshold value based on the first input series, a first comparison unit which compares a first mutual correlation value with the threshold value, a search window setting unit which sets a search window for detecting the second input series to the first input series on the basis of the comparison result, a hard decision unit which performs binarization of the first input series, a second correlation operation unit which performs a mutual correlation operation of a first input hard decision value, and a detection position determining unit which searches for a maximum value of the mutual correlation value within the search window and determines the detection time of the maximum value.
摘要翻译：数据处理装置包括执行第一输入序列和第二输入序列的互相关操作的第一相关运算单元，基于第一输入序列计算阈值的阈值运算单元，比较具有阈值的第一相互相关值，搜索窗口设置单元，其基于比较结果将用于检测第二输入序列的搜索窗口设置为第一输入序列;硬判决单元，其执行第一输入的二值化系列，执行第一输入硬判决值的相互关联操作的第二相关运算单元和检索位置确定单元，其在搜索窗口内搜索相互相关值的最大值，并确定最大值的检测时间值。

18. 发明授权

US06347390B1 Data encoding method and device, data decoding method and device, and data supply medium 失效
标题翻译：数据编码方法及装置，数据解码方法及装置及数据提供媒介
公开(公告)号：US06347390B1
公开(公告)日：2002-02-12
申请号：US09354240
申请日：1999-07-16
申请人： Hiroyuki Ino
发明人： Hiroyuki Ino
IPC分类号： G06F1100
CPC分类号： H03M5/145 , G11B20/1426 , G11B2020/1438
摘要： In encoding method and device for encoding m-bit data to an n-bit code, the n-bit code is generated according to a finite state transition diagram representing the restriction of ADS and RDS received by a code sequence; two states contained in a state assembly set as start points of the n-bit code in the finite state transition diagram exist at symmetrical positions with respect to the center point of the finite state transition diagram, at symmetrical positions with respect to the ADS axis passing through the center point of the finite state transition diagram or at the symmetrical positions with respect to the RDS axis passing the center point of the finite state transition diagram; the m-bit data are encoded to an n-bit code word having as a start point a predetermined state contained in a state assembly set as start points of the code; and an n-bit code word having as a start point another state contained in a state assembly set as start points by the code is obtained by further converting the encoded code word.
摘要翻译：在将m位数据编码为n位代码的编码方法和装置中，根据表示由代码序列接收的ADS和RDS的限制的有限状态转移图来生成n位代码; 作为有限状态转移图中的n位代码的起始点的状态组合中包含的两个状态存在于相对于有限状态转移图的中心点的对称位置，相对于ADS轴通过的对称位置通过有限状态转换图的中心点或相对于通过有限状态转换图的中心点的RDS轴的对称位置; m位数据被编码为具有作为起始点的预定状态的n位代码字，该状态组合被设置为代码的起始点; 并且通过进一步转换编码的代码字，获得作为开始点的包含在通过代码设置为起始点的状态组合中的另一状态的n位代码字。

19. 发明授权

US5861825A Method and device for code modulation, method and device for code demodulation, and method and device for decoding 失效
标题翻译：用于码调制的方法和装置，用于码解调的方法和装置，以及用于解码的方法和装置
公开(公告)号：US5861825A
公开(公告)日：1999-01-19
申请号：US816349
申请日：1997-03-13
申请人： Hiroyuki Ino
发明人： Hiroyuki Ino
IPC分类号： H03M5/14 , H03M13/31 , H03M13/41 , H03M7/00
CPC分类号： H03M13/4107 , H03M13/31 , H03M5/145 , G11B20/10055 , G11B20/10296
摘要： 5*3 states are arranged on a plane composed of the horizontal axis and vertical axis, 2-bit data of 01, 10, 00, and 11 are assigned to the state transitions in the up, down, right, and left-directions respectively in the 3*5 states. A 20-bit code is generated by 10 times the state transitions. 2.sup.16 20-bit codes are prepared and these codes have a one-to-one correspondence to 16-bit data (2.sup.16). The end point of the previous state transition is the starting point of the next state transition, and 16-bit data are converted successively to 20-bit codes while the state transitions occur continuously. In the manner as described above, the conversion efficiency in PR (1, 1) is improved.
摘要翻译： 5 * 3状态布置在由水平轴和垂直轴组成的平面上，01,10,00和11的2位数据分别分配给上，下，右和左方向的状态转换在3 * 5州。 20位代码由状态转换的10倍产生。 216个20位代码被准备好，并且这些代码与16位数据（216）具有一一对应关系。先前状态转移的结束点是下一状态转换的起点，16位数据连续转换为20位代码，同时状态转换连续发生。以上述方式，提高了PR（1,1）的转换效率。

20. 发明授权

US07139146B2 Signal processing apparatus and method, and digital data reproducing apparatus 失效
标题翻译：信号处理装置和方法以及数字数据再现装置
公开(公告)号：US07139146B2
公开(公告)日：2006-11-21
申请号：US10484427
申请日：2003-05-22
申请人： Tomoyuki Hiura , Hiroyuki Ino
发明人： Tomoyuki Hiura , Hiroyuki Ino
IPC分类号： G11B5/09
CPC分类号： H03H17/0288 , G11B20/10009 , G11B20/10046 , G11B20/10055 , G11B20/10083 , G11B20/10101
摘要： A replay signal, obtained on reproducing a recording medium, on which has been recorded a digital signal, is supplied to an input terminal (1), and quantized by an A/D converter (8). The so quantized signal is processed by an integrator (20), formed by a first order IIR filter, so as to be adjusted in gain by an amplifier (21). The quantized replay signal is also processed by a differentiator formed by a combination of a first order FIR filter (22) and a first order IIR filter (23) so as to be then adjusted in gain by an amplifier (24). The resulting signal is then supplied to an adder (25) where it is subtracted from an output signal of the amplifier (21). In this manner, the differentiation/integration equalizer, formed by an analog circuit, is constructed by a digital circuit of a simplified configuration without raising the number of orders of the filters. The replay signal is processed by differentiation/integration such as to satisfy the equalization standard.
摘要翻译：在再现已经记录了数字信号的记录介质上获得的重放信号被提供给输入端（1），由A / D转换器（8）进行量化。这样量化的信号由由第一级IIR滤波器形成的积分器（20）处理，以便由放大器（21）调节增益。量化的重放信号也由由一阶FIR滤波器（22）和一阶IIR滤波器（23）的组合形成的微分器处理，以便然后由放大器（24）调节增益。然后将所得到的信号提供给加法器（25），在该加法器中从放大器（21）的输出信号中减去该加法器。以这种方式，由模拟电路形成的微分/积分均衡器由简化配置的数字电路构成，而不增加滤波器的次数。重放信号通过差分/积分来处理，以满足均衡标准。

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