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    • 19. 发明授权
    • Method of forming conductive layer and semiconductor device
    • 形成导电层和半导体器件的方法
    • US08173542B2
    • 2012-05-08
    • US12634619
    • 2009-12-09
    • Takashi Sakaki
    • Takashi Sakaki
    • H01L23/52
    • H01L21/76898H01L23/481H01L2924/0002H01L2924/12044H01L2924/00012H01L2924/00
    • Provided are a method of forming a conductive layer on an inner portion of a through-electrode in which uniform adhesion property of plating in the inner portion of a through-hole is enhanced and a tact time is short, and a semiconductor device. The method of forming a conductive layer includes: a first plating step of forming a first plating layer on the inner portion of the through-hole; a plating suppression layer forming step of forming a plating suppression layer including a material different from a material of the first plating layer in an opening portion of the through-hole after the first plating step; and a second plating step of forming a second plating layer by plating on the inner portion of the through-hole after the plating suppression layer forming step.
    • 提供一种在贯通电极的内部形成导电层的方法,其中贯通电极的内部部分中的镀层的均匀粘合性能增强并且节拍时间短,并且半导体器件。 形成导电层的方法包括:在通孔的内部形成第一镀层的第一镀层步骤; 电镀抑制层形成步骤,在第一电镀步骤之后,在所述通孔的开口部分中形成包括与所述第一镀层的材料不同的材料的镀覆抑制层; 以及第二电镀步骤,在镀覆抑制层形成步骤之后通过电镀在通孔的内部上形成第二镀层。