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11. 发明授权

US09015380B2 Exchanging message data in a distributed computer system 有权
标题翻译：在分布式计算机系统中交换消息数据
公开(公告)号：US09015380B2
公开(公告)日：2015-04-21
申请号：US13547165
申请日：2012-07-12
申请人： Christoph Raisch , Jan-Bernd Themann , Jonas Eymann , Moritz Prinz , Enrique Marcial-Simon , Thomas Ilsche
发明人： Christoph Raisch , Jan-Bernd Themann , Jonas Eymann , Moritz Prinz , Enrique Marcial-Simon , Thomas Ilsche
IPC分类号： G06F3/00 , G06F12/02
CPC分类号： G06F12/02 , G06F13/4027
摘要： A method for exchanging message data in a distributed computer system between a sending and a receiving hardware system. The sending hardware system includes a first memory system and a receiving hardware system which includes a second memory system with a second data buffer and a second memory region. The sending hardware system and the receiving hardware system are coupled via a non-transparent bridge unit. The method includes allocating empty memory, writing information about the empty memory, copying payload data directly from the sending hardware system to the empty memory locations, and writing information about the copied payload data to the second data buffer of the second memory system inside the receiving hardware system. A computer program product for carrying out the method is also provided.
摘要翻译：一种用于在发送和接收硬件系统之间的分布式计算机系统中交换消息数据的方法。发送硬件系统包括第一存储器系统和接收硬件系统，其包括具有第二数据缓冲器和第二存储器区域的第二存储器系统。发送硬件系统和接收硬件系统通过不透明的桥接单元耦合。该方法包括分配空存储器，写入关于空存储器的信息，将有效载荷数据直接从发送硬件系统复制到空存储器单元，以及将关于复制的有效载荷数据的信息写入到接收器内的第二存储器系统的第二数据缓冲器硬件系统。还提供了一种用于执行该方法的计算机程序产品。

12. 发明申请

US20110302481A1 Translation Between A First Communication Protocol And A Second Communication Protocol 失效
标题翻译：第一个通信协议和第二个通信协议之间的翻译
公开(公告)号：US20110302481A1
公开(公告)日：2011-12-08
申请号：US13150486
申请日：2011-06-01
申请人： Jean L. Calvignac , Daniel G. Eisenhauer , Ashish A. More , Anil Pothireddy , Christoph Raisch , Saravanan Sethuraman , Vibhor K. Srivastava , Jan-Bernd Themann
发明人： Jean L. Calvignac , Daniel G. Eisenhauer , Ashish A. More , Anil Pothireddy , Christoph Raisch , Saravanan Sethuraman , Vibhor K. Srivastava , Jan-Bernd Themann
IPC分类号： H04J3/22 , G06F11/10 , H03M13/09
CPC分类号： H04L69/08 , H03M13/09
摘要： Translating between a first communication protocol used by a first network component and a second communication protocol used by a second network, where translating includes: receiving, by a network engine adapter operating independently from the first and second network components, data packets from the first and second network components; and performing, by the network engine, a combined communication protocol based on the first communication protocol and the second communication protocol, including manipulating data packets of at least one of the first communication protocol or the second communication protocol, thereby offloading performance requirements for the combined communication protocol from the first and second network components.
摘要翻译：在由第一网络组件使用的第一通信协议和由第二网络使用的第二通信协议之间进行翻译，其中转换包括：由独立于第一和第二网络组件的网络引擎适配器接收来自第一和第二网络组件的数据分组第二网络组件; 以及由网络引擎执行基于第一通信协议和第二通信协议的组合通信协议，包括操纵第一通信协议或第二通信协议中的至少一个的数据分组，由此卸载组合的性能要求来自第一和第二网络组件的通信协议。

13. 发明申请

US20080181245A1 System and Method for Multicore Communication Processing 有权
标题翻译：多核通信处理系统与方法
公开(公告)号：US20080181245A1
公开(公告)日：2008-07-31
申请号：US11669419
申请日：2007-01-31
申请人： Claude Basso , Jean L. Calvignac , Chih-jen Chang , Philippe Damon , Herman D. Dierks , Christoph Raisch , Jan-Bernd Themann , Natarajan Vaidhyanathan , Fabrice J. Verplanken , Colin B. Verrilli
发明人： Claude Basso , Jean L. Calvignac , Chih-jen Chang , Philippe Damon , Herman D. Dierks , Christoph Raisch , Jan-Bernd Themann , Natarajan Vaidhyanathan , Fabrice J. Verplanken , Colin B. Verrilli
IPC分类号： H04L12/56
CPC分类号： H04L47/50
摘要： A system and method for multicore processing of communications between data processing devices are provided. With the mechanisms of the illustrative embodiments, a set of techniques that enables sustaining media speed by distributing transmit and receive-side processing over multiple processing cores is provided. In addition, these techniques also enable designing multi-threaded network interface controller (NIC) hardware that efficiently hides the latency of direct memory access (DMA) operations associated with data packet transfers over an input/output (I/O) bus. Multiple processing cores may operate concurrently using separate instances of a communication protocol stack and device drivers to process data packets for transmission with separate hardware implemented send queue managers in a network adapter processing these data packets for transmission. Multiple hardware receive packet processors in the network adapter may be used, along with a flow classification engine, to route received data packets to appropriate receive queues and processing cores for processing.
摘要翻译：提供了一种用于数据处理设备之间的通信的多核处理的系统和方法。利用说明性实施例的机制，提供了一组通过在多个处理核上分发发送和接收侧处理来维持媒体速度的技术。此外，这些技术还可以设计出多线程网络接口控制器（NIC）硬件，可有效地隐藏通过输入/输出（I / O）总线传输数据分组的直接存储器访问（DMA）操作的延迟。多个处理核心可以使用通信协议栈和设备驱动程序的单独实例同时运行，以处理用于传输的数据分组，其中单独的硬件实现了处理这些数据分组以进行传输的网络适配器中的发送队列管理器。可以使用网络适配器中的多个硬件接收分组处理器以及流分类引擎将接收到的数据分组路由到适当的接收队列和处理核心进行处理。

14. 发明授权

US08589776B2 Translation between a first communication protocol and a second communication protocol 失效
标题翻译：第一通信协议和第二通信协议之间的转换
公开(公告)号：US08589776B2
公开(公告)日：2013-11-19
申请号：US13150486
申请日：2011-06-01
申请人： Jean L. Calvignac , Daniel G. Eisenhauer , Ashish A. More , Anil Pothireddy , Christoph Raisch , Saravanan Sethuraman , Vibhor K. Srivastava , Jan-Bernd Themann
发明人： Jean L. Calvignac , Daniel G. Eisenhauer , Ashish A. More , Anil Pothireddy , Christoph Raisch , Saravanan Sethuraman , Vibhor K. Srivastava , Jan-Bernd Themann
IPC分类号： G06F11/10
CPC分类号： H04L69/08 , H03M13/09
摘要： Translating between a first communication protocol used by a first network component and a second communication protocol used by a second network, where translating includes: receiving, by a network engine adapter operating independently from the first and second network components, data packets from the first and second network components; and performing, by the network engine, a combined communication protocol based on the first communication protocol and the second communication protocol, including manipulating data packets of at least one of the first communication protocol or the second communication protocol, thereby offloading performance requirements for the combined communication protocol from the first and second network components.
摘要翻译：在由第一网络组件使用的第一通信协议和由第二网络使用的第二通信协议之间进行翻译，其中转换包括：由独立于第一和第二网络组件的网络引擎适配器接收来自第一和第二网络组件的数据分组第二网络组件; 以及由网络引擎执行基于第一通信协议和第二通信协议的组合通信协议，包括操纵第一通信协议或第二通信协议中的至少一个的数据分组，由此卸载组合的性能要求来自第一和第二网络组件的通信协议。

15. 发明授权

US08302109B2 Synchronization optimized queuing system 失效
标题翻译：同步优化排队系统
公开(公告)号：US08302109B2
公开(公告)日：2012-10-30
申请号：US12391373
申请日：2009-02-24
申请人： Lakshminarayana Arimilli , Claude Basso , Piyush Chaudhary , Bernard C. Drerup , Jody B. Joyner , Jan-Bernd Themann , Christoph Raisch , Colin B. Verrilli
发明人： Lakshminarayana Arimilli , Claude Basso , Piyush Chaudhary , Bernard C. Drerup , Jody B. Joyner , Jan-Bernd Themann , Christoph Raisch , Colin B. Verrilli
IPC分类号： G06F3/03
CPC分类号： G06F9/545 , G06F9/546
摘要： A synchronization optimized queuing method and device to minimize software/hardware interaction in network interface hardware during an end-of-initiative process, including network adapter queue implementations for network interface hardware for optimized communication in a computer system. An end-of-initiative procedure to ensure that the network interface hardware has received an interrupt enable and to recheck the interrupt queue is unnecessary in the present invention.
摘要翻译：一种同步优化的排队方法和设备，用于最大程度地减少网络接口硬件中的软件/硬件交互，包括用于计算机系统中优化通信的网络接口硬件的网络适配器队列实现。在本发明中，确保网络接口硬件已经接收到中断使能并重新检查中断队列的最终主动性过程是不必要的。

16. 发明申请

US20110107347A1 Generic Transport Layer Mechanism For Firmware Communication 有权
标题翻译：通用传输层机制用于固件通信
公开(公告)号：US20110107347A1
公开(公告)日：2011-05-05
申请号：US12915175
申请日：2010-10-29
申请人： Christoph Raisch , Marco Kraemer , Jan-Bernd Themann
发明人： Christoph Raisch , Marco Kraemer , Jan-Bernd Themann
IPC分类号： G06F9/46
CPC分类号： G06F9/45533 , G06F9/441 , G06F9/541 , G06F9/546 , H04L49/90 , H04L69/326 , H04L69/329
摘要： A computing system including a communication network architecture with a transport layer mechanism. The computing system is capable of supporting a multitude of different application protocols involving information and/or data exchange between an operating system instance and various firmware services. The computing system may include an operating system instance with a Generic Transport Driver supporting the application protocols in the operating system instance, a firmware service connected to a Generic Transport Facility via a Generic Firmware Service Interface and a virtual machine with a Generic Transport Passthrough. The Generic Transport Driver of the operating system instance exchanges communication protocol data with the Generic Transport Facility of the firmware component via the generic Transport Passthrough.
摘要翻译：一种包括具有传输层机制的通信网络架构的计算系统。计算系统能够支持涉及操作系统实例和各种固件服务之间的信息和/或数据交换的众多不同应用协议。计算系统可以包括具有支持操作系统实例中的应用协议的通用传输驱动器的操作系统实例，经由通用固件服务接口连接到通用传输设备的固件服务和具有通用传输直通的虚拟机。操作系统实例的通用传输驱动程序通过通用传输直通与固件组件的通用传输设施交换通信协议数据。

17. 发明申请

US20100217905A1 Synchronization Optimized Queuing System 失效
标题翻译：同步优化排队系统
公开(公告)号：US20100217905A1
公开(公告)日：2010-08-26
申请号：US12391373
申请日：2009-02-24
申请人： Lakshminarayana Arimilli , Claude Basso , Piyush Chaudhary , Benard C. Drerup , Jody B. Joyner , Jan-Bernd Themann , Christoph Raisch , Colin B. Verrilli
发明人： Lakshminarayana Arimilli , Claude Basso , Piyush Chaudhary , Benard C. Drerup , Jody B. Joyner , Jan-Bernd Themann , Christoph Raisch , Colin B. Verrilli
IPC分类号： G06F13/24 , G06F9/54
CPC分类号： G06F9/545 , G06F9/546
摘要： A synchronization optimized queuing method and device to minimize software/hardware interaction in network interface hardware during an end-of-initiative process, including network adapter queue implementations for network interface hardware for optimized communication in a computer system. An end-of-initiative procedure to ensure that the network interface hardware has received an interrupt enable and to recheck the interrupt queue is unnecessary in the present invention.
摘要翻译：一种同步优化的排队方法和设备，用于最大程度地减少网络接口硬件中的软件/硬件交互，包括用于计算机系统中优化通信的网络接口硬件的网络适配器队列实现。在本发明中，确保网络接口硬件已经接收到中断使能并重新检查中断队列的最终主动性过程是不必要的。

18. 发明授权

US08386659B2 Configuration adaptation layer for mapping I/O device resources 失效
标题翻译：用于映射I / O设备资源的配置适配层
公开(公告)号：US08386659B2
公开(公告)日：2013-02-26
申请号：US12892651
申请日：2010-09-28
申请人： Michael Jung , Hans-Helge Lehmann , Elke G. Nass , Christoph Raisch
发明人： Michael Jung , Hans-Helge Lehmann , Elke G. Nass , Christoph Raisch
IPC分类号： G06F3/00
CPC分类号： G06F9/4411 , G06F9/45558 , G06F2009/45579
摘要： A configuration adaptation layer (CAL) for I/O devices such as I/O adapters is provided. This configuration adaptation layer (CAL) explicitly provides a mapping between adapter functions and adapter resources in a way such that it is senseable in-band by the computer system using the adapter, e.g., by a virtual machine monitor.
摘要翻译：提供了I / O设备（如I / O适配器）的配置适配层（CAL）。该配置适配层（CAL）以这样的方式显式地提供适配器功能和适配器资源之间的映射，使得其可以由计算机系统使用适配器例如由虚拟机监视器进行带内感测。

19. 发明授权

US07234004B2 Method, apparatus and program product for low latency I/O adapter queuing in a computer system 失效
标题翻译：计算机系统中用于低延迟I / O适配器排队的方法，装置和程序产品
公开(公告)号：US07234004B2
公开(公告)日：2007-06-19
申请号：US11001392
申请日：2004-12-01
申请人： Christoph Raisch
发明人： Christoph Raisch
IPC分类号： G06F3/00 , G06F13/00
CPC分类号： G06F13/385
摘要： In a computer system, an I/O adapter comprises at least one I/O request mailbox for receiving I/O requests and data from a CPU. The mailbox is connected to at least one I/O request queue storage for storing a plurality of I/O requests and related data or main memory addresses received by the mailbox. A credit register is provided for storing the filling state of the queue storage. A connection network is designed and operated to transfer the contents of the credit register to the CPU for checking the filling state of the queue storage, to transfer an I/O request and related data to a queue of a selected request mailbox, and to activate a doorbell apparatus for signalling to the I/O adapter to process the I/O request including an access to the main memory by the I/O adapter if required.
摘要翻译：在计算机系统中，I / O适配器包括用于从CPU接收I / O请求和数据的至少一个I / O请求邮箱。该邮箱被连接到至少一个I / O请求队列存储器，用于存储由邮箱接收的多个I / O请求和相关数据或主存储器地址。提供了用于存储队列存储器的填充状态的信用寄存器。连接网络被设计和操作以将信用寄存器的内容传送到CPU以检查队列存储器的填充状态，将I / O请求和相关数据传送到所选请求邮箱的队列，并激活用于向I / O适配器发信号以便处理I / O请求的门铃装置，包括如果需要，I / O适配器访问主存储器。

20. 发明授权

US09195623B2 Multiple address spaces per adapter with address translation 有权
标题翻译：每个适配器具有地址转换的多个地址空间
公开(公告)号：US09195623B2
公开(公告)日：2015-11-24
申请号：US12821174
申请日：2010-06-23
申请人： David Craddock , Thomas A. Gregg , Christoph Raisch
发明人： David Craddock , Thomas A. Gregg , Christoph Raisch
IPC分类号： G06F3/00 , G06F13/28 , G06F12/00 , G06F13/36 , G06F9/26 , G06F12/10
CPC分类号： G06F13/28 , G06F12/1081
摘要： A plurality of address spaces are assigned to an adapter. To select a particular address space for the adapter, a requestor identifier and address space identifier provided in a request by the adapter are used. Each address space may have a different address translation mechanism associated therewith.
摘要翻译：多个地址空间被分配给适配器。为了选择适配器的特定地址空间，使用在适配器的请求中提供的请求者标识符和地址空间标识符。每个地址空间可以具有与其相关联的不同的地址转换机制。

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