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11. 发明授权

US07705646B2 Threshold correction circuit, integrated circuit with threshold correction function, and circuit board with threshold correction function 失效
标题翻译：阈值校正电路，具有阈值校正功能的集成电路和具有阈值校正功能的电路板
公开(公告)号：US07705646B2
公开(公告)日：2010-04-27
申请号：US12240188
申请日：2008-09-29
申请人： Noriyuki Matsui
发明人： Noriyuki Matsui
IPC分类号： H03K5/01
CPC分类号： H03K5/082 , H03K5/1252
摘要： In order to monitor various types of noises which are to be introduced on signals through signal lines on a circuit board and automatically adjust the thresholds for signal state discriminations to make it possible to surely make a signal state discrimination without being affected by these noises even if the amplitude of a signal is reduced for higher-speed transmission and lowered electric power, there is provided a configuration comprising a signal generation unit generating a noise monitor signal; a noise monitor signal line receiving and propagating the noise monitor signal; a noise detection unit detecting a noise which has been introduced into that noise monitor signal propagated through the noise monitor signal line and which affects a state discrimination using a threshold; and a threshold adjustment unit, if the noise detection unit detects the noise, adjusting the threshold such that the state discrimination is not affected by the noise.
摘要翻译：为了监视通过电路板上的信号线引入信号的各种噪声，并自动调整信号状态鉴别的阈值，使得有可能确定地进行信号状态判别而不受这些噪声的影响，即使信号的振幅降低，以实现高速传输和降低电力，提供了包括产生噪声监测信号的信号产生单元的结构; 噪声监测信号线接收并传播噪声监测信号; 噪声检测单元，其检测已经被引入到通过噪声监视信号线传播的噪声监测信号中并且影响使用阈值的状态判别的噪声; 以及阈值调整单元，如果噪声检测单元检测到噪声，则调整阈值使得状态判别不受噪声影响。

12. 发明授权

US06822898B2 Multi-value nonvolatile semiconductor memory device 失效
公开(公告)号：US06822898B2
公开(公告)日：2004-11-23
申请号：US10755350
申请日：2004-01-13
申请人： Noriyuki Matsui
发明人： Noriyuki Matsui
IPC分类号： G11C1604
CPC分类号： G11C11/5628 , G11C11/5642
摘要： A multi-value memory that has an improved data maintain period has been disclosed and, in a multi-value nonvolatile semiconductor memory device comprising a multi-value memory cell having a floating-gate and able to store at least three values, the threshold values of the multi-value memory cell are set from a state in which the threshold values designate at least two boundary values that identify at least three values to a state in which a fixed quantity of charges are injected into the floating gate in a data write operation, the read data is determined from the relationship between the threshold values of the multi-value memory cell and the (at least) two boundary values, and increments (margins) A1, A2 and A3 in the threshold value from threshold values VT1, VT2 and VT3, which are the lower limits of ranges, due to the injection of charges into the floating gate in the data write operation are set so that the increment is larger for data corresponding to a state in which a larger quantity of charges are injected.

13. 发明授权

US5883839A Waveform stabilizing drive circuit for modularized memory 失效
标题翻译：用于模块化存储器的波形稳定驱动电路
公开(公告)号：US5883839A
公开(公告)日：1999-03-16
申请号：US944552
申请日：1997-10-07
申请人： Masaki Tosaka , Yuzo Usui , Noriyuki Matsui , Masao Matsuda , Kazunori Kasuga
发明人： Masaki Tosaka , Yuzo Usui , Noriyuki Matsui , Masao Matsuda , Kazunori Kasuga
IPC分类号： G06F13/16 , G06F3/00 , G06F12/00 , G11C5/06 , G11C7/00 , G11C7/22 , G11C8/18 , G11C11/401
CPC分类号： G11C5/063 , G11C7/00 , G11C7/22 , G11C8/18
摘要： A memory drive circuit includes at least one memory module constructed of a plurality of memory elements, a memory controller for driving said memory module, and a buffer, disposed between the memory module and the memory controller, for receiving a drive signal from the memory controller and transmitting the received drive signal to the memory module. Signal reflection noises produced in the memory module are absorbed by the buffer.
摘要翻译：存储器驱动电路包括由多个存储器元件构成的至少一个存储器模块，用于驱动所述存储器模块的存储器控制器和设置在存储器模块和存储器控制器之间的缓冲器，用于从存储器控制器接收驱动信号并将所接收的驱动信号发送到存储器模块。在存储器模块中产生的信号反射噪声被缓冲器吸收。

14. 发明授权

US5396466A Method of testing bit lines of a memory unit 失效
标题翻译：测试存储器单元的位线的方法
公开(公告)号：US5396466A
公开(公告)日：1995-03-07
申请号：US214449
申请日：1994-03-17
申请人： Rikizo Nakano , Noriyuki Matsui
发明人： Rikizo Nakano , Noriyuki Matsui
IPC分类号： G11C29/02 , G11C29/10 , G11C7/00
CPC分类号： G11C29/02 , G11C29/10
摘要： A method of testing bit lines of a memory unit includes the steps of alternately writing a set of first binary values and a set of inverted first binary values to blocks having even block values and to blocks having odd block values for all storage elements within each of a plurality of blocks of the memory unit; setting the memory unit to a stressed condition; alternately reading pieces of binary data from first-row storage elements of the blocks having even block values and from final-row storage elements of the blocks having odd block values by repeatedly inverting a row value of a memory address and incrementing a block value of the memory address for each block; setting the memory unit to a normal condition; and repeating the first setting step, the alternate reading step, and the second setting step for all the columns of the plurality of the blocks.
摘要翻译：一种测试存储器单元的位线的方法包括以下步骤：将一组第一二进制值和一组倒置的第一二进制值交替地写入具有偶数块值的块以及具有奇数块值的块，存储单元的多个块; 将存储单元设置为受压状态; 从具有偶数块值的块的第一行存储元件中读取二进制数据，并通过重复地反转存储器地址的行值并递增该块值的块值，并从具有奇数块值的块的最终行存储元件中交替地读取二进制数据每个块的存储器地址; 将存储单元设置为正常状态; 并且对于多个块的所有列重复第一设置步骤，替代阅读步骤和第二设置步骤。

15. 发明授权

US08840115B2 Wide range temperature and pressure hydraulic cylinder sealing system 有权
标题翻译：宽范围温压液压缸密封系统
公开(公告)号：US08840115B2
公开(公告)日：2014-09-23
申请号：US11684318
申请日：2007-03-09
申请人： Joel T. Johnson , Benjamin E. Westbrook , Noriyuki Matsui , Yoshiyuki Abe , Takeshi Wakana , Mathias Burkert
发明人： Joel T. Johnson , Benjamin E. Westbrook , Noriyuki Matsui , Yoshiyuki Abe , Takeshi Wakana , Mathias Burkert
IPC分类号： F16J15/32 , F16J15/00 , F16J15/56
CPC分类号： F16J15/56 , F16J15/002
摘要： A seal system for a reciprocating cylinder includes a buffer seal, a rod seal, and a wiper seal. The buffer seal includes a dynamic seal lip and a static lip extending from a hinge portion. The hinge portion of the static lip allows fluid to escape past the outer diameter of the seal when the rod is retracted thereby releasing any pressure build-up between the rod seal and buffer seal. The axial face portion of the dynamic seal lip includes axially extending notches therein. The notches prevent the buffer seal from sticking to the axial wall of the groove and provide a consistent path for the fluid to energize the annular groove between the static and dynamic lips during the extension phase which is necessary for the function of the seal. The back-up ring is an integrated part of the buffer seal, used to provide superior extrusion resistance. The rod seal includes an annular seal body having a dynamic seal lip angularly extending radially inwardly and axially from the seal body, and a static lip angularly extending radially outwardly and axially from the seal body. An axial face portion of the dynamic seal lip and the static lip each include radially extending notches therein. The notches prevent the seal from sticking to the axial walls of the groove the rod seal is installed in and provides a consistent path for the fluid to energize the annular groove created by the static and dynamic lip during the extension phase. The back-up ring is an integrated part of the rod seal, used to provide superior extrusion resistance.
摘要翻译：用于往复式气缸的密封系统包括缓冲密封件，杆密封件和擦拭器密封件。缓冲密封件包括动态密封唇缘和从铰链部分延伸的静态唇缘。当杆缩回时，静态唇缘的铰链部分允许流体逃离密封件的外径，从而释放杆密封件和缓冲密封件之间的任何压力积聚。动态密封唇的轴向面部分包括其中轴向延伸的凹口。凹口防止缓冲密封件粘附到凹槽的轴向壁上，并提供一致的路径，用于在密封功能所需的延伸阶段期间使流体在静态和动态唇缘之间激励环形凹槽。备用环是缓冲密封件的集成部件，用于提供优异的挤出阻力。杆密封件包括环形密封体，其具有从密封体径向向内和轴向成角度地延伸的动态密封唇，以及从密封体径向向外并且轴向地成角度地延伸的静态唇缘。动态密封唇缘和静态唇缘的轴向面部各自包括径向延伸的凹口。凹口防止密封件粘附到凹槽的轴向壁上，杆密封件安装在该轴向壁中，并且提供一致的路径，以使流体在延伸阶段期间由静态和动态唇缘产生的环形凹槽通电。支撑环是杆密封件的集成部件，用于提供优异的挤压阻力。

16. 发明授权

US08056903B2 Rod sealing system 有权
标题翻译：杆密封系统
公开(公告)号：US08056903B2
公开(公告)日：2011-11-15
申请号：US12086211
申请日：2006-12-05
申请人： Noriyuki Matsui , Manabu Hirano , Yoshihiro Kuzumaki , Kuniyoshi Saito , Hayato Takada
发明人： Noriyuki Matsui , Manabu Hirano , Yoshihiro Kuzumaki , Kuniyoshi Saito , Hayato Takada
IPC分类号： F16J15/16
CPC分类号： C09K3/1021 , C08G18/10 , C08G18/44 , C08G2140/00 , C08G18/3206
摘要： In a rod sealing system, which comprises a buffer ring, a rod seal, and a dust seal, provided successively in this order from a fluid hydraulic side toward the outside in an annular clearance between two members in reciprocating motion, the buffer ring is made up of a thermoplastic polyurethane molding product obtained by subjecting a thermoplastic polyurethane molding product prepared by reaction of (A) a high molecular weight polycarbonatediol having a number average molecular weight Mn of 500-6,000, (B) an aromatic diisocyanate, and (C) a low molecular weight diol as a chain elongation agent in an NCO/OH ratio of 0.95-1.20, to heat treatment under conditions that a glass transition point (Tg) of hard phases becomes 170° C. or higher, preferably 170-230° C., and an endothermic peak area (ΔH) at Tg becomes 5 J/g or more, by differential scanning calorimetry. The buffer ring made up of the thermoplastic polyurethane molding product has a distinguished heat resistance capable of withstanding the service environmental temperature, particularly maximum 120° C., compression set characteristics, follow-up to eccentricity, etc.
摘要翻译：在包括缓冲环，杆密封和防尘密封的杆密封系统中，以往复运动中的两个构件之间的环形间隙从液压侧朝向外部依次提供缓冲环，制成缓冲环（A）数均分子量Mn为500〜6000的高分子量聚碳酸酯二醇，（B）芳香族二异氰酸酯和（C）的反应制得的热塑性聚氨酯成型体，作为NCO / OH比为0.95-1.20的链延长剂的低分子量二醇，在硬相的玻璃化转变温度（Tg）为170℃以上，优选为170〜230℃的条件下进行热处理通过差示扫描量热法测定Tg的吸热峰面积（＆Dgr; H）为5J / g以上。由热塑性聚氨酯成型制品制成的缓冲环具有耐受使用环境温度，特别是最大120℃，压缩永久变形特性，偏心率等特性的耐热性。

17. 发明申请

US20100125587A1 ELECTRONIC FILE MANAGEMENT SYSTEM 审中-公开
标题翻译：电子文件管理系统
公开(公告)号：US20100125587A1
公开(公告)日：2010-05-20
申请号：US12572572
申请日：2009-10-02
申请人： Noriyuki Matsui , Misako Tanabe
发明人： Noriyuki Matsui , Misako Tanabe
IPC分类号： G06F17/30 , G06F15/16 , G06F12/00
CPC分类号： G06Q10/107
摘要： An electronic file management system includes a terminal device and a management server. The terminal device includes a terminal storage, a data transmitter, and a first data delete unit. The terminal storage stores an electronic file. The data transmitter transmits the electronic file stored in the terminal storage. The first data delete unit deletes the electronic file stored in the terminal storage. The management server is communicably connected to the terminal device. The management server includes a data receiver and a data storage. The data receiver receives the electronic file from the terminal device. The data storage stores the electronic file received from the terminal device. The first data delete unit deletes the electronic file stored in the terminal storage after the data transmitter has transmitted the electronic file stored in the terminal storage to the management server.
摘要翻译：电子文件管理系统包括终端装置和管理服务器。终端装置包括终端存储器，数据发送器和第一数据删除单元。终端存储器存储电子文件。数据发送器发送存储在终端存储器中的电子文件。第一数据删除单元删除存储在终端存储器中的电子文件。管理服务器可通信地连接到终端设备。管理服务器包括数据接收器和数据存储器。数据接收器从终端设备接收电子文件。数据存储器存储从终端设备接收的电子文件。在数据发送器将存储在终端存储器中的电子文件发送到管理服务器之后，第一数据删除单元删除存储在终端存储器中的电子文件。

18. 发明授权

US07392444B2 Non-volatile memory evaluating method and non-volatile memory 有权
标题翻译：非易失性存储器评估方法和非易失性存储器
公开(公告)号：US07392444B2
公开(公告)日：2008-06-24
申请号：US10898958
申请日：2004-07-27
申请人： Noriyuki Matsui
发明人： Noriyuki Matsui
IPC分类号： G11C29/00
CPC分类号： G11C29/50004 , G11C16/04 , G11C29/08 , G11C29/50
摘要： The present method generates a greater number of hot holes than those generated by normal write/erase operations, thereby making it possible to evaluate an operation of a non-volatile memory with respect to hot holes. The present method performs a write operation to the non-volatile memory at lower temperatures than normal temperatures at normal use or/and at a lower operation voltage than a normal operation voltage at normal use, so as to generate a greater number of hot holes than those generated by normal write/erase operations between floating gates and drains of the memory, and then evaluates the operation of the memory while exposing it to the normal operation temperatures. This method is applicable to reliability tests of non-volatile memories such as FLASH memories.
摘要翻译：本方法产生比通常的写入/擦除操作产生的那些更多的热孔，从而可以评估非易失性存储器相对于热孔的操作。本方法在正常使用时的正常温度或正常使用时的正常工作电压以下的工作电压的温度比正常使用时的正常温度低的温度进行写入动作，以产生比通常使用的正常工作电压更多的热孔由浮动栅极和存储器的漏极之间的正常写/擦除操作产生的，然后评估存储器的操作，同时将其暴露于正常工作温度。该方法适用于诸如FLASH存储器的非易失性存储器的可靠性测试。

19. 发明申请

US20070214244A1 System configuration information comparison device and computer program 审中-公开
标题翻译：系统配置信息比较装置和计算机程序
公开(公告)号：US20070214244A1
公开(公告)日：2007-09-13
申请号：US11709122
申请日：2007-02-22
申请人： Tomoya Hitokoto , Noriyuki Matsui , Yoko Nakagawa , Kazutaka Oki
发明人： Tomoya Hitokoto , Noriyuki Matsui , Yoko Nakagawa , Kazutaka Oki
IPC分类号： G06F15/177
CPC分类号： G06F9/44505
摘要： A system configuration information comparison device and a computer program are provided that allow easy comparison of system configuration information and a parameter sheet. The invention provides a system configuration information comparison device (130) that includes a receiving portion that receives system configuration information (112) and a parameter sheet (120); a comparison portion that compares the system configuration information (112) and sections of the parameter sheet (120) that correspond with the system configuration information (112); and an output portion that outputs a comparison report (140) for the system configuration information (112) and the parameter sheet (120) based on the result of the comparison of the system configuration information (112) and the sections of the parameter sheet (120) that correspond with the system configuration information (112).
摘要翻译：提供了系统配置信息比较装置和计算机程序，其容易地比较系统配置信息和参数表。本发明提供了一种系统配置信息比较装置，包括接收系统配置信息（112）和参数表（120）的接收部分; 比较系统配置信息（112）和与系统配置信息（112）相对应的参数表（120）的部分的比较部分; 以及输出部，其基于系统配置信息（112）和参数表的部分（112）的比较结果输出用于系统配置信息（112）和参数表（120）的比较报告（140） 120），其与系统配置信息（112）相对应。

20. 发明申请

US20050210344A1 Non-volatile memory evaluating method and non-volatile memory 有权
标题翻译：非易失性存储器评估方法和非易失性存储器
公开(公告)号：US20050210344A1
公开(公告)日：2005-09-22
申请号：US10898958
申请日：2004-07-27
申请人： Noriyuki Matsui
发明人： Noriyuki Matsui
IPC分类号： G11C16/02 , G01R31/28 , G11C29/00 , G11C29/06 , G11C29/08 , G11C29/14 , G11C29/50 , H01L21/66 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： G11C29/50004 , G11C16/04 , G11C29/08 , G11C29/50
摘要： The present method generates a greater number of hot holes than those generated by normal write/erase operations, thereby making it possible to evaluate an operation of a non-volatile memory with respect to hot holes. The present method performs a write operation to the non-volatile memory at lower temperatures than normal temperatures at normal use or/and at a lower operation voltage than a normal operation voltage at normal use, so as to generate a greater number of hot holes than those generated by normal write/erase operations between floating gates and drains of the memory, and then evaluates the operation of the memory while exposing it to the normal operation temperatures. This method is applicable to reliability tests of non-volatile memories such as FLASH memories.
摘要翻译：本方法产生比通常的写入/擦除操作产生的那些更多的热孔，从而可以评估非易失性存储器相对于热孔的操作。本方法在正常使用时的正常温度或正常使用时的正常工作电压以下的工作电压的温度比正常使用时的正常温度低的温度进行写入动作，以产生比通常使用的正常工作电压更多的热孔由浮动栅极和存储器的漏极之间的正常写/擦除操作产生的，然后评估存储器的操作，同时将其暴露于正常工作温度。该方法适用于诸如FLASH存储器的非易失性存储器的可靠性测试。

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