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11. 发明授权

US06229289B1 Power converter mode transitioning method and apparatus 有权
标题翻译：电力转换器模式转换方法和装置
公开(公告)号：US06229289B1
公开(公告)日：2001-05-08
申请号：US09513339
申请日：2000-02-25
申请人： Alessandro Piovaccari , Carl A. Ramsey , Eric H. Naviasky
发明人： Alessandro Piovaccari , Carl A. Ramsey , Eric H. Naviasky
IPC分类号： G05F140
CPC分类号： H02M3/1588 , H02M2001/0045 , Y02B70/1466
摘要： A method and apparatus are provided for transitioning a power converter between a switched mode of operation and a linear regulator mode of operation. The power converter operates according to one or more intermediate modes of operation in which the switched mode and linear regulator modes cooperate to produce a shared power converter output. The power converter transitions between the various modes of operation in response to changes in circuit parametric conditions as defined by a series of state transition diagrams. Power converter output voltage is maintained in regulation during all modes of operation and transitions therebetween. The method and apparatus includes an integrated device that may be operated as a switch or a variable resistance device.
摘要翻译：提供了一种用于在切换操作模式和线性调节器操作模式之间转换功率转换器的方法和装置。功率转换器根据其中开关模式和线性调节器模式协作以产生共享功率转换器输出的一种或多种中间工作模式来操作。功率转换器响应于由一系列状态转换图定义的电路参数条件的变化，在各种操作模式之间转变。功率变换器输出电压在所有工作模式和转换期间保持调节。该方法和装置包括可作为开关或可变电阻装置操作的集成装置。

12. 发明授权

US4903023A Subranging analog-to-digital converter with digital error correction 失效
标题翻译：使用数字错误校正将模数转换器进行分组
公开(公告)号：US4903023A
公开(公告)日：1990-02-20
申请号：US174253
申请日：1988-03-28
申请人： William P. Evans , Eric H. Naviasky
发明人： William P. Evans , Eric H. Naviasky
IPC分类号： H03M1/10 , H03M1/16
CPC分类号： H03M1/1038 , H03M1/167
摘要： An analog-to-digital converter having error correction in the digital stages of the converter. A calibration microprocessor executes a correction value program prior to, or interspaced with, the normal operation of the converter. From either of two calibration programs, appropriate digital correction values are stored into a digital memory. The analog input signal is converted to a digital signal by a main range analog-to-digital converter, with the output of the converter addressing the memory containing the error correction values. The main range digital value is reconverted to an analog signal which is compared to the original input signal to determine the difference therebetween. This analog difference is converted to a digital signal and combined with the main range digital signal and the addressed correction values to produce the digital output signal of the conversion system.
摘要翻译：在转换器的数字级中具有误差校正的模拟 - 数字转换器。校准微处理器在转换器的正常操作之前或之间执行校正值程序。从两个校准程序中的任一个中，将合适的数字校正值存储到数字存储器中。模拟输入信号由主范围模数转换器转换为数字信号，转换器的输出寻址包含误差校正值的存储器。主范围数字值被重新转换为与原始输入信号进行比较的模拟信号，以确定它们之间的差异。该模拟差异转换为数字信号，并与主范围数字信号和寻址的校正值相结合，以产生转换系统的数字输出信号。

13. 发明授权

US4841480A Cross-tie memory system 失效
标题翻译：交叉记忆体系统
公开(公告)号：US4841480A
公开(公告)日：1989-06-20
申请号：US107122
申请日：1987-10-09
申请人： Donald R. Lampe , Mark A. Mentzer , Eric H. Naviasky
发明人： Donald R. Lampe , Mark A. Mentzer , Eric H. Naviasky
IPC分类号： G11C19/08
CPC分类号： G11C19/0875 , G11C19/0841 , G11C19/0866
摘要： Double complementary storage is provided for a single binary digit in a quad store cross-tie memory. A correlated double sampling signal processing system is used to increase data signal level and facilitate discrimination in cross-tie memories. A method is also provided for accomplishing write and read functions in a quad store cross-tie memory using only a single pulse for either function. A set of four memory elements, arranged in two row-aligned complementary pairs, stores a single data bit, and is under four column conductors for reading data, two row conductors, and a write conductor for writing data.
摘要翻译：在一个四分之一交叉领带存储器中为单个二进制数字提供双重互补存储。相关的双采样信号处理系统用于增加数据信号电平，并促进交叉连接存储器中的辨别。还提供了一种用于在仅用于任一功能的单个脉冲的四存储交叉连接存储器中完成写入和读取功能的方法。一组四列存储器元件，排列成两排对齐的互补对，存储单个数据位，并且位于用于读取数据的四列导体下，用于读取数据的两行导体和写导体。

14. 发明授权

US4770842A Common bus multinode sensor system 失效
公开(公告)号：US4770842A
公开(公告)日：1988-09-13
申请号：US934238
申请日：1986-11-20
申请人： Thomas F. Kelly , Eric H. Naviasky , Daniel W. Jefferies , William P. Evans , John R. Smith
发明人： Thomas F. Kelly , Eric H. Naviasky , Daniel W. Jefferies , William P. Evans , John R. Smith
IPC分类号： G08C15/00 , G08C15/02 , G08C15/04 , G21C17/00 , H04Q9/00 , G21C7/36
CPC分类号： G08C15/04
摘要： The present invention is a multimode sensor system that transmits power down a common bus coaxial cable typically using an alternating current power source. Each remote unit connected to the coaxial cable and through an isolation transformer converts the alternating current power to direct current power for an integrated circuit bus interface. The interface is connected to the sensors. The interface is externally pin programmable to provide a carrier at a frequency for a channel assigned to the remote unit. The carrier is provided by a ripple counter producing a frequency divided signal compared to a fixed reference frequency, where the result of the comparison controls a voltage controlled oscillator. When plural low frequency analog signals are to be transmitted over the common bus, an on-chip multiplexer multiplexes the signals to an off-chip, external analog-to-digital converter. The analog-to-digital converter loads an on chip parallel to serial register that applies each bit of the sampled signal serially to an on chip Manchester encoder. The encoder modifies the input voltage of the voltage controlled oscillator operating at the carrier frequency. The oscillator signal is applied to the coaxial cable. Receivers at the end of the coaxial cable are each tunable to a designated carrier frequency and each decode the respective encoded signal. If a high frequency analog signal is supplied to the voltage controlled oscillator, the carrier is modulated by the high frequency signal and the receiver demodulates the signal. The integrated circuit is arranged so that the digital circuitry is generally isolated from the analog circuitry so noise immunity is enhanced.

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