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    • 11. 发明授权
    • Power surge management for high performance integrated circuit
    • 电源浪涌管理用于高性能集成电路
    • US5963023A
    • 1999-10-05
    • US99691
    • 1998-06-18
    • Dennis James HerrellThomas P. Dolbear
    • Dennis James HerrellThomas P. Dolbear
    • G05F3/24G06F1/30H01L23/498H01L23/50H02J1/02H05K1/11G05F1/40H03K17/12
    • H01L23/49827G06F1/305H01L23/49838H01L23/50H02J1/02G05F3/24H01L2924/0002H01L2924/3011H05K1/112H05K2201/10545H05K2201/10734
    • An integrated circuit chip configuration, e.g., a microprocessor, includes feedback control circuitry defined thereon to control mid-frequency components of current demand of the integrated circuit chip and thereby regulate power supply voltage to within design tolerances of the integrated circuit chip. Such mid-frequency components can be generated by directed changes in operating frequency of the integrated circuit chip or by cyclic or episodic variations in circuit activity, e.g., instruction sequence dependent variations. When generated, such mid-frequency components can excite mid-frequency resonances in a power distribution system and generate power supply voltage disturbances. In some configurations, the integrated circuit chip includes current dump circuitry defining a controlled impedance path between first and second power supply voltage terminals of the integrated circuit chip. The controlled impedance path allows the feedback control circuitry to actuate a variable current draw so as to reduce mid-frequency components of overall current demand of the integrated circuit chip and thereby regulate power supply voltage disturbances. In other configurations, the feedback control circuitry is coupled to on-chip clock circuits, e.g., a phase-locked loop (PLL), to actuate variations in a clock signal supplied to the integrated circuit chip and thereby regulate power supply voltage disturbances.
    • 诸如微处理器的集成电路芯片配置包括在其上限定的反馈控制电路,以控制集成电路芯片的电流需求的中频分量,从而将电源电压调整到集成电路芯片的设计容限内。 这样的中频分量可以通过集成电路芯片的工作频率的定向改变或电路活动中的循环或偶然变化(例如指令序列相关变化)来产生。 当产生时,这种中频分量可以激发配电系统中的中频谐振并产生电源电压干扰。 在一些配置中,集成电路芯片包括限定在集成电路芯片的第一和第二电源电压端子之间的受控阻抗路径的电流转储电路。 受控阻抗路径允许反馈控制电路致动可变电流汲取,以减少集成电路芯片的总电流需求的中频分量,从而调节电源电压干扰。 在其他配置中,反馈控制电路耦合到片上时钟电路,例如锁相环(PLL),以激励提供给集成电路芯片的时钟信号的变化,从而调节电源电压干扰。