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    • 11. 发明授权
    • Display device and driving method thereof
    • 显示装置及其驱动方法
    • US07808494B2
    • 2010-10-05
    • US11241211
    • 2005-09-30
    • Yong-Soon LeePo-Yun ParkNam-Soo KangHaeng-Won ParkSeung-Hwan Moon
    • Yong-Soon LeePo-Yun ParkNam-Soo KangHaeng-Won ParkSeung-Hwan Moon
    • G09G5/00
    • G09G3/3648G02F1/136286G09G3/3614G09G3/3677G09G2300/0408G09G2300/0426G09G2310/0251G09G2320/0219G09G2320/0233H01L27/124
    • A display device that employs fewer IC chips and lends itself to cost-efficient manufacturing is presented. The device includes: a plurality of pixel rows including first and second pixels alternately arranged; a plurality of first and second gate lines disposed above and below the pixel rows and applying first and second gate-on voltages to the first and the second pixels, respectively; data lines intersecting the first and the second gate lines, each data line disposed between the first and the second pixels in a pair of first and second pixels and applying data voltages to the first and the second pixels; first and second gate drivers applying the first and the second gate-on voltages to the first and the second gate lines; and a data driver applying the data voltages to the data lines, wherein the second gate-on voltage is applied earlier than the first gate-on voltages by a predetermined time.
    • 提出了一种使用更少的IC芯片并适合于经济高效的制造的显示装置。 该装置包括:交替布置的包括第一和第二像素的多个像素行; 多个第一和第二栅极线设置在像素行的上方和下方,分别向第一和第二像素施加第一和第二栅极导通电压; 数据线与第一和第二栅极线相交,每条数据线布置在一对第一和第二像素中的第一和第二像素之间,并将数据电压施加到第一和第二像素; 第一和第二栅极驱动器将第一和第二栅极导通电压施加到第一和第二栅极线; 以及将数据电压施加到数据线的数据驱动器,其中第二栅极导通电压早于第一栅极导通电压施加预定时间。
    • 15. 发明申请
    • Display device and method for driving the same
    • 显示装置及其驱动方法
    • US20080055214A1
    • 2008-03-06
    • US11704484
    • 2007-02-08
    • Nam-Soo KangMyeong-Su KimHaeng-Won ParkYong-Soon Lee
    • Nam-Soo KangMyeong-Su KimHaeng-Won ParkYong-Soon Lee
    • G09G3/36
    • G09G3/20G09G3/3611G09G3/3648G09G3/3685G09G2310/027G09G2330/021G09G2370/08
    • A driver for driving a display device having a plurality of pixels connected to a plurality of data lines includes: a signal controller that creates a plurality of image signal groups and a plurality of identification codes corresponding to the plurality of image signal groups; and a plurality of data driving circuits each of which receives at least two identification codes of the plurality of identification codes and the image signal groups corresponding to the at least two identification codes, converts the image signals into data signals, and outputs the data signals to the data lines. In the driver, each of the data driving circuits compares the at least two identification codes, selects one of the image signal groups according to the result of the comparison, converts the image signals belonging to the one image signal group into the data signals, and outputs the other image signal groups to another data driving circuit. The identification codes are assigned to the image signal groups and the data driving integrated circuit selects the corresponding image signal group on the basis of the result of comparison between the identification codes, which makes it possible to prevent the image signal group from being transmitted to a non-corresponding data driving integrated circuit due to an error between the signal controller and the data driver.
    • 用于驱动具有连接到多个数据线的多个像素的显示装置的驱动器包括:信号控制器,其创建多个图像信号组和与多个图像信号组对应的多个识别码; 以及多个数据驱动电路,每个数据驱动电路接收所述多个识别码中的至少两个识别码和与所述至少两个识别码对应的图像信号组,将图像信号转换为数据信号,并将数据信号输出到 数据线。 在驱动器中,每个数据驱动电路将至少两个识别码进行比较,根据比较结果选择一个图像信号组,将属于一个图像信号组的图像信号转换为数据信号,以及 将其他图像信号组输出到另一数据驱动电路。 识别码被分配给图像信号组,并且数据驱动集成电路基于识别码之间的比较结果来选择对应的图像信号组,这使得可以防止图像信号组被发送到 非对应的数据驱动集成电路由于信号控制器和数据驱动器之间的错误。
    • 17. 发明申请
    • DISPLAY DEVICE
    • 显示设备
    • US20110254882A1
    • 2011-10-20
    • US13173687
    • 2011-06-30
    • Seung-Hwan MoonNam-Soo KangSu-Hyun Kwon
    • Seung-Hwan MoonNam-Soo KangSu-Hyun Kwon
    • G09G5/10
    • G09G3/3688G09G2300/0426G09G2310/0218G09G2310/0248G09G2310/027G09G2330/023G09G2370/08
    • A display device with reduced power consumption has pixels coupled with data lines and arranged in a matrix, a signal controller processing input image signals and outputting output image signals, and a data driver applying data voltages, corresponding to output image signals, to the data lines. When all the input image signals have either a first or second value, the output image signals have the first value. The signal controller generates a polarity signal for determining data voltage polarity, and when all the input image signals have either a first or second value, data voltages corresponding to the input image signals have a polarity equivalent to a polarity of previously applied data voltages. The signal controller generates a control signal for controlling the data driver's clock synchronization circuit, and the control signal halts the clock synchronization circuit when an operating frequency is lower than a predetermined value.
    • 具有降低的功耗的显示装置具有与数据线耦合并且以矩阵形式布置的像素,信号控制器处理输入图像信号并输出​​输出图像信号,以及数据驱动器,将对应于输出图像信号的数据电压施加到数据线 。 当所有输入图像信号具有第一或第二值时,输出图像信号具有第一值。 信号控制器产生用于确定数据电压极性的极性信号,并且当所有输入图像信号都具有第一或第二值时,对应于输入图像信号的数据电压具有与先前施加的数据电压的极性相等的极性。 信号控制器产生用于控制数据驱动器的时钟同步电路的控制信号,并且当工作频率低于预定值时,控制信号停止时钟同步电路。
    • 19. 发明授权
    • Method of driving transistor
    • 驱动晶体管的方法
    • US07646841B2
    • 2010-01-12
    • US11697764
    • 2007-04-09
    • Seung-Hwan MoonNam-Soo KangKyung-Eun LeeBack-Won LeeJi-Hoon Kim
    • Seung-Hwan MoonNam-Soo KangKyung-Eun LeeBack-Won LeeJi-Hoon Kim
    • G11C19/00
    • G09G3/20G09G2310/0267G09G2310/0286G11C19/28
    • A shift register has multiple stages each of which includes a pull-up part to generate a current gate line driving signal having a first state in response to a first control signal and a clock signal, a pull-down part to generate the current gate line driving signal having a second state in response to a second control signal, a pull-up driver to generate the first control signal to control the pull-up part in response to a previous gate line driving signal provided from a previous stage, a following gate line driving signal provided from a following stage, and an input voltage signal externally provided, and a pull-down driver to generate the second control signal to control the pull-down part in response to a third control signal provided from the pull-up driver and the input voltage signal, in which the second control signal swings between first and second voltage levels in association with the input voltage signal that swings between predetermined voltage levels.
    • 移位寄存器具有多个级,其中每一级包括上拉部分,用于响应于第一控制信号和时钟信号产生具有第一状态的电流栅极线驱动信号,产生电流栅极线的下拉部分 响应于第二控制信号具有第二状态的驱动信号;上拉驱动器,用于响应于从先前级提供的先前的栅极线驱动信号产生第一控制信号以控制上拉部分;跟随门 从后级提供的线路驱动信号和外部提供的输入电压信号,以及下拉驱动器,以产生第二控制信号,以响应于从上拉驱动器提供的第三控制信号来控制下拉部分 以及输入电压信号,其中第二控制信号与在预定电压电平之间摆动的输入电压信号相关联的第一和第二电压电平之间摆动。
    • 20. 发明授权
    • Method of driving transistor and shift register performing the same
    • 驱动晶体管的方法和执行相同的移位寄存器
    • US07317779B2
    • 2008-01-08
    • US10771797
    • 2004-02-04
    • Seung-Hwan MoonNam-Soo KangKyung-Eun LeeBack-Won LeeJi-Hoon Kim
    • Seung-Hwan MoonNam-Soo KangKyung-Eun LeeBack-Won LeeJi-Hoon Kim
    • G11C19/00
    • G09G3/20G09G2310/0267G09G2310/0286G11C19/28
    • A shift register has multiple stages each of which includes a pull-up part to generate a current gate line driving signal having a first state in response to a first control signal and a clock signal, a pull-down part to generate the current gate line driving signal having a second state in response to a second control signal, a pull-up driver to generate the first control signal to control the pull-up part in response to a previous gate line driving signal provided from a previous stage, a following gate line driving signal provided from a following stage, and an input voltage signal externally provided, and a pull-down driver to generate the second control signal to control the pull-down part in response to a third control signal provided from the pull-up driver and the input voltage signal, in which the second control signal swings between first and second voltage levels in association with the input voltage signal that swings between predetermined voltage levels.
    • 移位寄存器具有多个级,其中每一级包括上拉部分,用于响应于第一控制信号和时钟信号产生具有第一状态的电流栅极线驱动信号,产生电流栅极线的下拉部分 响应于第二控制信号具有第二状态的驱动信号;上拉驱动器,用于响应于从先前级提供的先前的栅极线驱动信号产生第一控制信号以控制上拉部分;跟随门 从后级提供的线路驱动信号和外部提供的输入电压信号,以及下拉驱动器,以产生第二控制信号,以响应于从上拉驱动器提供的第三控制信号来控制下拉部分 以及输入电压信号,其中第二控制信号与在预定电压电平之间摆动的输入电压信号相关联的第一和第二电压电平之间摆动。